1
2
3
4
5
6
7
8
9
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/stddef.h>
13#include <linux/fs.h>
14#include <linux/sched.h>
15#include <linux/ioport.h>
16#include <linux/mm.h>
17#include <linux/bootmem.h>
18#include <linux/console.h>
19#include <linux/initrd.h>
20#include <linux/major.h>
21#include <linux/root_dev.h>
22#include <linux/seq_file.h>
23#include <linux/timex.h>
24#include <linux/screen_info.h>
25#include <linux/cpu.h>
26#include <linux/nodemask.h>
27#include <linux/pfn.h>
28
29#include <asm/processor.h>
30#include <asm/pgtable.h>
31#include <asm/io.h>
32#include <asm/mmu_context.h>
33#include <asm/m32r.h>
34#include <asm/setup.h>
35#include <asm/sections.h>
36
37#ifdef CONFIG_MMU
38extern void init_mmu(void);
39#endif
40
41extern char _end[];
42
43
44
45
46struct cpuinfo_m32r boot_cpu_data;
47
48#ifdef CONFIG_BLK_DEV_RAM
49extern int rd_doload;
50extern int rd_prompt;
51extern int rd_image_start;
52#endif
53
54#if defined(CONFIG_VGA_CONSOLE)
55struct screen_info screen_info = {
56 .orig_video_lines = 25,
57 .orig_video_cols = 80,
58 .orig_video_mode = 0,
59 .orig_video_ega_bx = 0,
60 .orig_video_isVGA = 1,
61 .orig_video_points = 8
62};
63#endif
64
65extern int root_mountflags;
66
67static char __initdata command_line[COMMAND_LINE_SIZE];
68
69static struct resource data_resource = {
70 .name = "Kernel data",
71 .start = 0,
72 .end = 0,
73 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
74};
75
76static struct resource code_resource = {
77 .name = "Kernel code",
78 .start = 0,
79 .end = 0,
80 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
81};
82
83unsigned long memory_start;
84EXPORT_SYMBOL(memory_start);
85
86unsigned long memory_end;
87EXPORT_SYMBOL(memory_end);
88
89void __init setup_arch(char **);
90int get_cpuinfo(char *);
91
92static __inline__ void parse_mem_cmdline(char ** cmdline_p)
93{
94 char c = ' ';
95 char *to = command_line;
96 char *from = COMMAND_LINE;
97 int len = 0;
98 int usermem = 0;
99
100
101 memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
102 boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
103
104 memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET;
105 memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE;
106
107 for ( ; ; ) {
108 if (c == ' ' && !memcmp(from, "mem=", 4)) {
109 if (to != command_line)
110 to--;
111
112 {
113 unsigned long mem_size;
114
115 usermem = 1;
116 mem_size = memparse(from+4, &from);
117 memory_end = memory_start + mem_size;
118 }
119 }
120 c = *(from++);
121 if (!c)
122 break;
123
124 if (COMMAND_LINE_SIZE <= ++len)
125 break;
126
127 *(to++) = c;
128 }
129 *to = '\0';
130 *cmdline_p = command_line;
131 if (usermem)
132 printk(KERN_INFO "user-defined physical RAM map:\n");
133}
134
135#ifndef CONFIG_DISCONTIGMEM
136static unsigned long __init setup_memory(void)
137{
138 unsigned long start_pfn, max_low_pfn, bootmap_size;
139
140 start_pfn = PFN_UP( __pa(_end) );
141 max_low_pfn = PFN_DOWN( __pa(memory_end) );
142
143
144
145
146 bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
147 CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn);
148
149
150
151
152 {
153 unsigned long curr_pfn;
154 unsigned long last_pfn;
155 unsigned long pages;
156
157
158
159
160 curr_pfn = PFN_UP(__pa(memory_start));
161
162
163
164
165 last_pfn = PFN_DOWN(__pa(memory_end));
166
167 if (last_pfn > max_low_pfn)
168 last_pfn = max_low_pfn;
169
170 pages = last_pfn - curr_pfn;
171 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages));
172 }
173
174
175
176
177
178
179
180
181 reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE,
182 (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1)
183 - CONFIG_MEMORY_START,
184 BOOTMEM_DEFAULT);
185
186
187
188
189
190 reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE, BOOTMEM_DEFAULT);
191
192
193
194
195#ifdef CONFIG_MEMHOLE
196 reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE,
197 BOOTMEM_DEFAULT);
198#endif
199
200#ifdef CONFIG_BLK_DEV_INITRD
201 if (LOADER_TYPE && INITRD_START) {
202 if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
203 reserve_bootmem(INITRD_START, INITRD_SIZE,
204 BOOTMEM_DEFAULT);
205 initrd_start = INITRD_START + PAGE_OFFSET;
206 initrd_end = initrd_start + INITRD_SIZE;
207 printk("initrd:start[%08lx],size[%08lx]\n",
208 initrd_start, INITRD_SIZE);
209 } else {
210 printk("initrd extends beyond end of memory "
211 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
212 INITRD_START + INITRD_SIZE,
213 max_low_pfn << PAGE_SHIFT);
214
215 initrd_start = 0;
216 }
217 }
218#endif
219
220 return max_low_pfn;
221}
222#else
223extern unsigned long setup_memory(void);
224#endif
225
226void __init setup_arch(char **cmdline_p)
227{
228 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
229
230 boot_cpu_data.cpu_clock = M32R_CPUCLK;
231 boot_cpu_data.bus_clock = M32R_BUSCLK;
232 boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE;
233
234#ifdef CONFIG_BLK_DEV_RAM
235 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
236 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
237 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
238#endif
239
240 if (!MOUNT_ROOT_RDONLY)
241 root_mountflags &= ~MS_RDONLY;
242
243#ifdef CONFIG_VT
244#if defined(CONFIG_VGA_CONSOLE)
245 conswitchp = &vga_con;
246#elif defined(CONFIG_DUMMY_CONSOLE)
247 conswitchp = &dummy_con;
248#endif
249#endif
250
251#ifdef CONFIG_DISCONTIGMEM
252 nodes_clear(node_online_map);
253 node_set_online(0);
254 node_set_online(1);
255#endif
256
257 init_mm.start_code = (unsigned long) _text;
258 init_mm.end_code = (unsigned long) _etext;
259 init_mm.end_data = (unsigned long) _edata;
260 init_mm.brk = (unsigned long) _end;
261
262 code_resource.start = virt_to_phys(_text);
263 code_resource.end = virt_to_phys(_etext)-1;
264 data_resource.start = virt_to_phys(_etext);
265 data_resource.end = virt_to_phys(_edata)-1;
266
267 parse_mem_cmdline(cmdline_p);
268
269 setup_memory();
270
271 paging_init();
272}
273
274static struct cpu cpu_devices[NR_CPUS];
275
276static int __init topology_init(void)
277{
278 int i;
279
280 for_each_present_cpu(i)
281 register_cpu(&cpu_devices[i], i);
282
283 return 0;
284}
285
286subsys_initcall(topology_init);
287
288#ifdef CONFIG_PROC_FS
289
290
291
292static int show_cpuinfo(struct seq_file *m, void *v)
293{
294 struct cpuinfo_m32r *c = v;
295 unsigned long cpu = c - cpu_data;
296
297#ifdef CONFIG_SMP
298 if (!cpu_online(cpu))
299 return 0;
300#endif
301
302 seq_printf(m, "processor\t: %ld\n", cpu);
303
304#if defined(CONFIG_CHIP_VDEC2)
305 seq_printf(m, "cpu family\t: VDEC2\n"
306 "cache size\t: Unknown\n");
307#elif defined(CONFIG_CHIP_M32700)
308 seq_printf(m,"cpu family\t: M32700\n"
309 "cache size\t: I-8KB/D-8KB\n");
310#elif defined(CONFIG_CHIP_M32102)
311 seq_printf(m,"cpu family\t: M32102\n"
312 "cache size\t: I-8KB\n");
313#elif defined(CONFIG_CHIP_OPSP)
314 seq_printf(m,"cpu family\t: OPSP\n"
315 "cache size\t: I-8KB/D-8KB\n");
316#elif defined(CONFIG_CHIP_MP)
317 seq_printf(m, "cpu family\t: M32R-MP\n"
318 "cache size\t: I-xxKB/D-xxKB\n");
319#elif defined(CONFIG_CHIP_M32104)
320 seq_printf(m,"cpu family\t: M32104\n"
321 "cache size\t: I-8KB/D-8KB\n");
322#else
323 seq_printf(m, "cpu family\t: Unknown\n");
324#endif
325 seq_printf(m, "bogomips\t: %lu.%02lu\n",
326 c->loops_per_jiffy/(500000/HZ),
327 (c->loops_per_jiffy/(5000/HZ)) % 100);
328#if defined(CONFIG_PLAT_MAPPI)
329 seq_printf(m, "Machine\t\t: Mappi Evaluation board\n");
330#elif defined(CONFIG_PLAT_MAPPI2)
331 seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n");
332#elif defined(CONFIG_PLAT_MAPPI3)
333 seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n");
334#elif defined(CONFIG_PLAT_M32700UT)
335 seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n");
336#elif defined(CONFIG_PLAT_OPSPUT)
337 seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n");
338#elif defined(CONFIG_PLAT_USRV)
339 seq_printf(m, "Machine\t\t: uServer\n");
340#elif defined(CONFIG_PLAT_OAKS32R)
341 seq_printf(m, "Machine\t\t: OAKS32R\n");
342#elif defined(CONFIG_PLAT_M32104UT)
343 seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n");
344#else
345 seq_printf(m, "Machine\t\t: Unknown\n");
346#endif
347
348#define PRINT_CLOCK(name, value) \
349 seq_printf(m, name " clock\t: %d.%02dMHz\n", \
350 ((value) / 1000000), ((value) % 1000000)/10000)
351
352 PRINT_CLOCK("CPU", (int)c->cpu_clock);
353 PRINT_CLOCK("Bus", (int)c->bus_clock);
354
355 seq_printf(m, "\n");
356
357 return 0;
358}
359
360static void *c_start(struct seq_file *m, loff_t *pos)
361{
362 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
363}
364
365static void *c_next(struct seq_file *m, void *v, loff_t *pos)
366{
367 ++*pos;
368 return c_start(m, pos);
369}
370
371static void c_stop(struct seq_file *m, void *v)
372{
373}
374
375const struct seq_operations cpuinfo_op = {
376 .start = c_start,
377 .next = c_next,
378 .stop = c_stop,
379 .show = show_cpuinfo,
380};
381#endif
382
383unsigned long cpu_initialized __initdata = 0;
384
385
386
387
388
389
390
391#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
392 || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
393 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
394void __init cpu_init (void)
395{
396 int cpu_id = smp_processor_id();
397
398 if (test_and_set_bit(cpu_id, &cpu_initialized)) {
399 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
400 for ( ; ; )
401 local_irq_enable();
402 }
403 printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
404
405
406 atomic_inc(&init_mm.mm_count);
407 current->active_mm = &init_mm;
408 if (current->mm)
409 BUG();
410
411
412 current_thread_info()->status = 0;
413 clear_used_math();
414
415#ifdef CONFIG_MMU
416
417 init_mmu();
418#endif
419
420
421 outl(0x00070000, M32R_ICU_IMASK_PORTL);
422}
423#endif
424
