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33#include <linux/init.h>
34#include <linux/threads.h>
35#include <asm/processor.h>
36#include <asm/page.h>
37#include <asm/mmu.h>
38#include <asm/pgtable.h>
39#include <asm/cputable.h>
40#include <asm/thread_info.h>
41#include <asm/ppc_asm.h>
42#include <asm/asm-offsets.h>
43#include <asm/cache.h>
44#include <asm/ptrace.h>
45#include "head_booke.h"
46
47
48
49
50
51
52
53
54
55
56
57
58 __HEAD
59_ENTRY(_stext);
60_ENTRY(_start);
61
62
63
64
65 nop
66
67
68 bl get_phys_addr
69 mr r30,r3
70 mr r31,r4
71
72 li r25,0
73 li r24,0
74 li r23,0
75
76#ifdef CONFIG_RELOCATABLE
77 LOAD_REG_ADDR_PIC(r3, _stext)
78
79
80 bl get_phys_addr
81 mr r23,r3
82 mr r25,r4
83
84 bl 0f
850: mflr r8
86 addis r3,r8,(is_second_reloc - 0b)@ha
87 lwz r19,(is_second_reloc - 0b)@l(r3)
88
89
90 cmpwi r19,1
91 bne 1f
92
93
94
95
96
97
98
99
100
101
102 lis r3,PAGE_OFFSET@h
103
104 addis r4,r8,(kernstart_addr - 0b)@ha
105 addi r4,r4,(kernstart_addr - 0b)@l
106 lwz r5,4(r4)
107
108 addis r6,r8,(memstart_addr - 0b)@ha
109 addi r6,r6,(memstart_addr - 0b)@l
110 lwz r7,4(r6)
111
112 subf r5,r7,r5
113 add r3,r3,r5
114 b 2f
115
1161:
117
118
119
120
121
122
123 lis r4,KERNELBASE@h
124 ori r4,r4,KERNELBASE@l
125 rlwinm r6,r25,0,0x3ffffff
126 rlwinm r5,r4,0,0x3ffffff
127 subf r3,r5,r6
128 add r3,r4,r3
129
1302: bl relocate
131
132
133
134
135
136 cmpwi r19,1
137 beq set_ivor
138#endif
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159_ENTRY(__early_start)
160
161#define ENTRY_MAPPING_BOOT_SETUP
162#include "fsl_booke_entry_mapping.S"
163#undef ENTRY_MAPPING_BOOT_SETUP
164
165set_ivor:
166
167 SET_IVOR(0, CriticalInput);
168 SET_IVOR(1, MachineCheck);
169 SET_IVOR(2, DataStorage);
170 SET_IVOR(3, InstructionStorage);
171 SET_IVOR(4, ExternalInput);
172 SET_IVOR(5, Alignment);
173 SET_IVOR(6, Program);
174 SET_IVOR(7, FloatingPointUnavailable);
175 SET_IVOR(8, SystemCall);
176 SET_IVOR(9, AuxillaryProcessorUnavailable);
177 SET_IVOR(10, Decrementer);
178 SET_IVOR(11, FixedIntervalTimer);
179 SET_IVOR(12, WatchdogTimer);
180 SET_IVOR(13, DataTLBError);
181 SET_IVOR(14, InstructionTLBError);
182 SET_IVOR(15, DebugCrit);
183
184
185 lis r4,interrupt_base@h
186 mtspr SPRN_IVPR,r4
187
188
189 li r2,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l
190#ifdef CONFIG_E200
191 oris r2,r2,MAS4_TLBSELD(1)@h
192#endif
193 mtspr SPRN_MAS4, r2
194
195
196
197 mfspr r2,SPRN_HID0
198 oris r2,r2,HID0_DOZE@h
199 mtspr SPRN_HID0, r2
200#endif
201
202
203
204
205
206
207 lis r2,DBCR0_IDM@h
208 mtspr SPRN_DBCR0,r2
209 isync
210
211 li r2,-1
212 mtspr SPRN_DBSR,r2
213#endif
214
215#ifdef CONFIG_SMP
216
217
218
219 LOAD_REG_ADDR_PIC(r24, boot_cpuid)
220 lwz r24, 0(r24)
221 cmpwi r24, -1
222 mfspr r24,SPRN_PIR
223 bne __secondary_start
224#endif
225
226
227
228
229
230
231 lis r2,init_task@h
232 ori r2,r2,init_task@l
233
234
235 addi r4,r2,THREAD
236 mtspr SPRN_SPRG_THREAD,r4
237
238
239 lis r1,init_thread_union@h
240 ori r1,r1,init_thread_union@l
241 li r0,0
242 stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
243
244 CURRENT_THREAD_INFO(r22, r1)
245 stw r24, TI_CPU(r22)
246
247 bl early_init
248
249#ifdef CONFIG_RELOCATABLE
250 mr r3,r30
251 mr r4,r31
252#ifdef CONFIG_PHYS_64BIT
253 mr r5,r23
254 mr r6,r25
255#else
256 mr r5,r25
257#endif
258 bl relocate_init
259#endif
260
261#ifdef CONFIG_DYNAMIC_MEMSTART
262 lis r3,kernstart_addr@ha
263 la r3,kernstart_addr@l(r3)
264#ifdef CONFIG_PHYS_64BIT
265 stw r23,0(r3)
266 stw r25,4(r3)
267#else
268 stw r25,0(r3)
269#endif
270#endif
271
272
273
274
275 mr r3,r30
276 mr r4,r31
277 bl machine_init
278 bl MMU_init
279
280
281 lis r6, swapper_pg_dir@h
282 ori r6, r6, swapper_pg_dir@l
283 lis r5, abatron_pteptrs@h
284 ori r5, r5, abatron_pteptrs@l
285 lis r4, KERNELBASE@h
286 ori r4, r4, KERNELBASE@l
287 stw r5, 0(r4)
288 stw r6, 0(r5)
289
290
291 lis r4,start_kernel@h
292 ori r4,r4,start_kernel@l
293 lis r3,MSR_KERNEL@h
294 ori r3,r3,MSR_KERNEL@l
295 mtspr SPRN_SRR0,r4
296 mtspr SPRN_SRR1,r3
297 rfi
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312#ifdef CONFIG_PTE_64BIT
313#ifdef CONFIG_HUGETLB_PAGE
314#define FIND_PTE \
315 rlwinm r12, r10, 13, 19, 29; \
316 lwzx r11, r12, r11; \
317 rlwinm. r12, r11, 0, 0, 20; \
318 blt 1000f; \
319 beq 2f; \
320 oris r11, r11, PD_HUGE@h; \
321 andi. r10, r11, HUGEPD_SHIFT_MASK@l; \
322 xor r12, r10, r11; \
323 b 1001f; \
3241000: rlwimi r12, r10, 23, 20, 28; \
325 li r10, 0; \
3261001: lwz r11, 4(r12);
327#else
328#define FIND_PTE \
329 rlwinm r12, r10, 13, 19, 29; \
330 lwzx r11, r12, r11; \
331 rlwinm. r12, r11, 0, 0, 20; \
332 beq 2f; \
333 rlwimi r12, r10, 23, 20, 28; \
334 lwz r11, 4(r12);
335#endif
336#else
337#define FIND_PTE \
338 rlwimi r11, r10, 12, 20, 29; \
339 lwz r11, 0(r11); \
340 rlwinm. r12, r11, 0, 0, 19; \
341 beq 2f; \
342 rlwimi r12, r10, 22, 20, 29; \
343 lwz r11, 0(r12);
344#endif
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363interrupt_base:
364
365 CRITICAL_EXCEPTION(0x0100, CRITICAL, CriticalInput, unknown_exception)
366
367
368#ifdef CONFIG_E200
369
370 CRITICAL_EXCEPTION(0x0200, MACHINE_CHECK, MachineCheck, \
371 machine_check_exception)
372#else
373 MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
374#endif
375
376
377 START_EXCEPTION(DataStorage)
378 NORMAL_EXCEPTION_PROLOG(DATA_STORAGE)
379 mfspr r5,SPRN_ESR
380 stw r5,_ESR(r11)
381 mfspr r4,SPRN_DEAR
382 andis. r10,r5,(ESR_ILK|ESR_DLK)@h
383 bne 1f
384 EXC_XFER_LITE(0x0300, handle_page_fault)
3851:
386 addi r3,r1,STACK_FRAME_OVERHEAD
387 EXC_XFER_EE_LITE(0x0300, CacheLockingException)
388
389
390 INSTRUCTION_STORAGE_EXCEPTION
391
392
393 EXCEPTION(0x0500, EXTERNAL, ExternalInput, do_IRQ, EXC_XFER_LITE)
394
395
396 ALIGNMENT_EXCEPTION
397
398
399 PROGRAM_EXCEPTION
400
401
402#ifdef CONFIG_PPC_FPU
403 FP_UNAVAILABLE_EXCEPTION
404#else
405#ifdef CONFIG_E200
406
407 EXCEPTION(0x0800, FP_UNAVAIL, FloatingPointUnavailable, \
408 program_check_exception, EXC_XFER_EE)
409#else
410 EXCEPTION(0x0800, FP_UNAVAIL, FloatingPointUnavailable, \
411 unknown_exception, EXC_XFER_EE)
412#endif
413#endif
414
415
416 START_EXCEPTION(SystemCall)
417 NORMAL_EXCEPTION_PROLOG(SYSCALL)
418 EXC_XFER_EE_LITE(0x0c00, DoSyscall)
419
420
421 EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \
422 unknown_exception, EXC_XFER_EE)
423
424
425 DECREMENTER_EXCEPTION
426
427
428
429 EXCEPTION(0x3100, FIT, FixedIntervalTimer, \
430 unknown_exception, EXC_XFER_EE)
431
432
433#ifdef CONFIG_BOOKE_WDT
434 CRITICAL_EXCEPTION(0x3200, WATCHDOG, WatchdogTimer, WatchdogException)
435#else
436 CRITICAL_EXCEPTION(0x3200, WATCHDOG, WatchdogTimer, unknown_exception)
437#endif
438
439
440 START_EXCEPTION(DataTLBError)
441 mtspr SPRN_SPRG_WSCRATCH0, r10
442 mfspr r10, SPRN_SPRG_THREAD
443 stw r11, THREAD_NORMSAVE(0)(r10)
444#ifdef CONFIG_KVM_BOOKE_HV
445BEGIN_FTR_SECTION
446 mfspr r11, SPRN_SRR1
447END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
448#endif
449 stw r12, THREAD_NORMSAVE(1)(r10)
450 stw r13, THREAD_NORMSAVE(2)(r10)
451 mfcr r13
452 stw r13, THREAD_NORMSAVE(3)(r10)
453 DO_KVM BOOKE_INTERRUPT_DTLB_MISS SPRN_SRR1
454 mfspr r10, SPRN_DEAR
455
456
457
458
459 lis r11, PAGE_OFFSET@h
460 cmplw 5, r10, r11
461 blt 5, 3f
462 lis r11, swapper_pg_dir@h
463 ori r11, r11, swapper_pg_dir@l
464
465 mfspr r12,SPRN_MAS1
466 rlwinm r12,r12,0,16,1
467 mtspr SPRN_MAS1,r12
468
469 b 4f
470
471
4723:
473 mfspr r11,SPRN_SPRG_THREAD
474 lwz r11,PGDIR(r11)
475
4764:
477
478
479
480
481
482
483
484
485
486
487
488
489
490 mfspr r12,SPRN_ESR
491#ifdef CONFIG_PTE_64BIT
492 li r13,_PAGE_PRESENT
493 oris r13,r13,_PAGE_ACCESSED@h
494#else
495 li r13,_PAGE_PRESENT|_PAGE_ACCESSED
496#endif
497 rlwimi r13,r12,11,29,29
498
499 FIND_PTE
500 andc. r13,r13,r11
501
502#ifdef CONFIG_PTE_64BIT
503#ifdef CONFIG_SMP
504 subf r13,r11,r12
505 lwzx r13,r11,r13
506#else
507 lwz r13,0(r12)
508#endif
509#endif
510
511 bne 2f
512
513
514 b finish_tlb_load
5152:
516
517
518
519 mfspr r10, SPRN_SPRG_THREAD
520 lwz r11, THREAD_NORMSAVE(3)(r10)
521 mtcr r11
522 lwz r13, THREAD_NORMSAVE(2)(r10)
523 lwz r12, THREAD_NORMSAVE(1)(r10)
524 lwz r11, THREAD_NORMSAVE(0)(r10)
525 mfspr r10, SPRN_SPRG_RSCRATCH0
526 b DataStorage
527
528
529
530
531
532
533
534 START_EXCEPTION(InstructionTLBError)
535 mtspr SPRN_SPRG_WSCRATCH0, r10
536 mfspr r10, SPRN_SPRG_THREAD
537 stw r11, THREAD_NORMSAVE(0)(r10)
538#ifdef CONFIG_KVM_BOOKE_HV
539BEGIN_FTR_SECTION
540 mfspr r11, SPRN_SRR1
541END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
542#endif
543 stw r12, THREAD_NORMSAVE(1)(r10)
544 stw r13, THREAD_NORMSAVE(2)(r10)
545 mfcr r13
546 stw r13, THREAD_NORMSAVE(3)(r10)
547 DO_KVM BOOKE_INTERRUPT_ITLB_MISS SPRN_SRR1
548 mfspr r10, SPRN_SRR0
549
550
551
552
553 lis r11, PAGE_OFFSET@h
554 cmplw 5, r10, r11
555 blt 5, 3f
556 lis r11, swapper_pg_dir@h
557 ori r11, r11, swapper_pg_dir@l
558
559 mfspr r12,SPRN_MAS1
560 rlwinm r12,r12,0,16,1
561 mtspr SPRN_MAS1,r12
562
563
564#ifdef CONFIG_PTE_64BIT
565 li r13,_PAGE_PRESENT | _PAGE_BAP_SX
566 oris r13,r13,_PAGE_ACCESSED@h
567#else
568 li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
569#endif
570 b 4f
571
572
5733:
574 mfspr r11,SPRN_SPRG_THREAD
575 lwz r11,PGDIR(r11)
576
577
578#ifdef CONFIG_PTE_64BIT
579 li r13,_PAGE_PRESENT | _PAGE_BAP_UX
580 oris r13,r13,_PAGE_ACCESSED@h
581#else
582 li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
583#endif
584
5854:
586 FIND_PTE
587 andc. r13,r13,r11
588
589#ifdef CONFIG_PTE_64BIT
590#ifdef CONFIG_SMP
591 subf r13,r11,r12
592 lwzx r13,r11,r13
593#else
594 lwz r13,0(r12)
595#endif
596#endif
597
598 bne 2f
599
600
601 b finish_tlb_load
602
6032:
604
605
606
607 mfspr r10, SPRN_SPRG_THREAD
608 lwz r11, THREAD_NORMSAVE(3)(r10)
609 mtcr r11
610 lwz r13, THREAD_NORMSAVE(2)(r10)
611 lwz r12, THREAD_NORMSAVE(1)(r10)
612 lwz r11, THREAD_NORMSAVE(0)(r10)
613 mfspr r10, SPRN_SPRG_RSCRATCH0
614 b InstructionStorage
615
616
617#ifdef CONFIG_SPE
618
619 START_EXCEPTION(SPEUnavailable)
620 NORMAL_EXCEPTION_PROLOG(SPE_UNAVAIL)
621 beq 1f
622 bl load_up_spe
623 b fast_exception_return
6241: addi r3,r1,STACK_FRAME_OVERHEAD
625 EXC_XFER_EE_LITE(0x2010, KernelSPE)
626
627 EXCEPTION(0x2020, SPE_UNAVAIL, SPEUnavailable, \
628 unknown_exception, EXC_XFER_EE)
629#endif
630
631
632#ifdef CONFIG_SPE
633 EXCEPTION(0x2030, SPE_FP_DATA, SPEFloatingPointData,
634 SPEFloatingPointException, EXC_XFER_EE)
635
636
637 EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \
638 SPEFloatingPointRoundException, EXC_XFER_EE)
639
640 EXCEPTION(0x2040, SPE_FP_DATA, SPEFloatingPointData,
641 unknown_exception, EXC_XFER_EE)
642 EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \
643 unknown_exception, EXC_XFER_EE)
644#endif
645
646
647
648 EXCEPTION(0x2060, PERFORMANCE_MONITOR, PerformanceMonitor, \
649 performance_monitor_exception, EXC_XFER_STD)
650
651 EXCEPTION(0x2070, DOORBELL, Doorbell, doorbell_exception, EXC_XFER_STD)
652
653 CRITICAL_EXCEPTION(0x2080, DOORBELL_CRITICAL, \
654 CriticalDoorbell, unknown_exception)
655
656
657 DEBUG_DEBUG_EXCEPTION
658 DEBUG_CRIT_EXCEPTION
659
660 GUEST_DOORBELL_EXCEPTION
661
662 CRITICAL_EXCEPTION(0, GUEST_DBELL_CRIT, CriticalGuestDoorbell, \
663 unknown_exception)
664
665
666 EXCEPTION(0, HV_SYSCALL, Hypercall, unknown_exception, EXC_XFER_EE)
667
668
669 EXCEPTION(0, HV_PRIV, Ehvpriv, unknown_exception, EXC_XFER_EE)
670
671interrupt_end:
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689finish_tlb_load:
690#ifdef CONFIG_HUGETLB_PAGE
691 cmpwi 6, r10, 0
692 beq 6, finish_tlb_load_cont
693
694
695 mfspr r12, SPRN_SPRG_THREAD
696 stw r14, THREAD_NORMSAVE(4)(r12)
697 stw r15, THREAD_NORMSAVE(5)(r12)
698 stw r16, THREAD_NORMSAVE(6)(r12)
699 stw r17, THREAD_NORMSAVE(7)(r12)
700
701
702#ifdef CONFIG_SMP
703 lwz r12, THREAD_INFO-THREAD(r12)
704 lwz r15, TI_CPU(r12)
705 lis r14, __per_cpu_offset@h
706 ori r14, r14, __per_cpu_offset@l
707 rlwinm r15, r15, 2, 0, 29
708 lwzx r16, r14, r15
709#else
710 li r16, 0
711#endif
712 lis r17, next_tlbcam_idx@h
713 ori r17, r17, next_tlbcam_idx@l
714 add r17, r17, r16
715 lwz r15, 0(r17)
716
717 lis r14, MAS0_TLBSEL(1)@h
718 rlwimi r14, r15, 16, 4, 15
719 mtspr SPRN_MAS0, r14
720
721
722 mfspr r16, SPRN_TLB1CFG
723 andi. r16, r16, 0xfff
724
725
726 addi r15, r15, 1
727 cmpw r15, r16
728 blt 100f
729 lis r14, tlbcam_index@h
730 ori r14, r14, tlbcam_index@l
731 lwz r15, 0(r14)
732100: stw r15, 0(r17)
733
734
735
736
737
738 subi r15, r10, 10
739 mfspr r16, SPRN_MAS1
740 rlwimi r16, r15, 7, 20, 24
741 mtspr SPRN_MAS1, r16
742
743
744 mr r14, r10
745
746
747
748#endif
749
750
751
752
753
754
755
756finish_tlb_load_cont:
757#ifdef CONFIG_PTE_64BIT
758 rlwinm r12, r11, 32-2, 26, 31
759 andi. r10, r11, _PAGE_DIRTY
760 bne 1f
761 li r10, MAS3_SW | MAS3_UW
762 andc r12, r12, r10
7631: rlwimi r12, r13, 20, 0, 11
764 rlwimi r12, r11, 20, 12, 19
7652: mtspr SPRN_MAS3, r12
766BEGIN_MMU_FTR_SECTION
767 srwi r10, r13, 12
768 mtspr SPRN_MAS7, r10
769END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
770#else
771 li r10, (_PAGE_EXEC | _PAGE_PRESENT)
772 mr r13, r11
773 rlwimi r10, r11, 31, 29, 29
774 and r12, r11, r10
775 andi. r10, r11, _PAGE_USER
776 slwi r10, r12, 1
777 or r10, r10, r12
778 iseleq r12, r12, r10
779 rlwimi r13, r12, 0, 20, 31
780 mtspr SPRN_MAS3, r13
781#endif
782
783 mfspr r12, SPRN_MAS2
784#ifdef CONFIG_PTE_64BIT
785 rlwimi r12, r11, 32-19, 27, 31
786#else
787 rlwimi r12, r11, 26, 27, 31
788#endif
789#ifdef CONFIG_HUGETLB_PAGE
790 beq 6, 3f
791 li r13, 1
792 slw r13, r13, r14
793 subi r13, r13, 1
794 rlwinm r13, r13, 0, 0, 19
795 andc r12, r12, r13
796#endif
7973: mtspr SPRN_MAS2, r12
798
799#ifdef CONFIG_E200
800
801 mfspr r12, SPRN_MAS0
802
803
804 mfspr r11, SPRN_TLB1CFG
805 andi. r11, r11, 0xfff
806
807
808 andi. r13, r12, 0xfff
809 addi r13, r13, 1
810 cmpw 0, r13, r11
811 addi r12, r12, 1
812
813
814 blt 7f
815
816
817 lis r13, tlbcam_index@ha
818 lwz r13, tlbcam_index@l(r13)
819 rlwimi r12, r13, 0, 20, 31
8207:
821 mtspr SPRN_MAS0,r12
822#endif
823
824tlb_write_entry:
825 tlbwe
826
827
828 mfspr r10, SPRN_SPRG_THREAD
829#ifdef CONFIG_HUGETLB_PAGE
830 beq 6, 8f
831 lwz r14, THREAD_NORMSAVE(4)(r10)
832 lwz r15, THREAD_NORMSAVE(5)(r10)
833 lwz r16, THREAD_NORMSAVE(6)(r10)
834 lwz r17, THREAD_NORMSAVE(7)(r10)
835#endif
8368: lwz r11, THREAD_NORMSAVE(3)(r10)
837 mtcr r11
838 lwz r13, THREAD_NORMSAVE(2)(r10)
839 lwz r12, THREAD_NORMSAVE(1)(r10)
840 lwz r11, THREAD_NORMSAVE(0)(r10)
841 mfspr r10, SPRN_SPRG_RSCRATCH0
842 rfi
843
844#ifdef CONFIG_SPE
845
846
847
848_GLOBAL(load_up_spe)
849
850
851
852
853
854
855
856 mfmsr r5
857 oris r5,r5,MSR_SPE@h
858 mtmsr r5
859 isync
860
861 oris r9,r9,MSR_SPE@h
862 mfspr r5,SPRN_SPRG_THREAD
863 li r4,1
864 li r10,THREAD_ACC
865 stw r4,THREAD_USED_SPE(r5)
866 evlddx evr4,r10,r5
867 evmra evr4,evr4
868 REST_32EVRS(0,r10,r5,THREAD_EVR0)
869 blr
870
871
872
873
874
875KernelSPE:
876 lwz r3,_MSR(r1)
877 oris r3,r3,MSR_SPE@h
878 stw r3,_MSR(r1)
879#ifdef CONFIG_PRINTK
880 lis r3,87f@h
881 ori r3,r3,87f@l
882 mr r4,r2
883 lwz r5,_NIP(r1)
884 bl printk
885#endif
886 b ret_from_except
887#ifdef CONFIG_PRINTK
88887: .string "SPE used in kernel (task=%p, pc=%x) \n"
889#endif
890 .align 4,0
891
892#endif
893
894
895
896
897
898get_phys_addr:
899 mfmsr r8
900 mfspr r9,SPRN_PID
901 rlwinm r9,r9,16,0x3fff0000
902 rlwimi r9,r8,28,0x00000001
903 mtspr SPRN_MAS6,r9
904
905 tlbsx 0,r3
906
907 mfspr r8,SPRN_MAS1
908 mfspr r12,SPRN_MAS3
909 rlwinm r9,r8,25,0x1f
910 li r10,1024
911 slw r10,r10,r9
912 addi r10,r10,-1
913 and r11,r3,r10
914 andc r4,r12,r10
915 or r4,r4,r11
916#ifdef CONFIG_PHYS_64BIT
917 mfspr r3,SPRN_MAS7
918#endif
919 blr
920
921
922
923
924
925#ifdef CONFIG_E200
926
927_GLOBAL(__setup_e200_ivors)
928 li r3,DebugDebug@l
929 mtspr SPRN_IVOR15,r3
930 li r3,SPEUnavailable@l
931 mtspr SPRN_IVOR32,r3
932 li r3,SPEFloatingPointData@l
933 mtspr SPRN_IVOR33,r3
934 li r3,SPEFloatingPointRound@l
935 mtspr SPRN_IVOR34,r3
936 sync
937 blr
938#endif
939
940#ifdef CONFIG_E500
941#ifndef CONFIG_PPC_E500MC
942
943_GLOBAL(__setup_e500_ivors)
944 li r3,DebugCrit@l
945 mtspr SPRN_IVOR15,r3
946 li r3,SPEUnavailable@l
947 mtspr SPRN_IVOR32,r3
948 li r3,SPEFloatingPointData@l
949 mtspr SPRN_IVOR33,r3
950 li r3,SPEFloatingPointRound@l
951 mtspr SPRN_IVOR34,r3
952 li r3,PerformanceMonitor@l
953 mtspr SPRN_IVOR35,r3
954 sync
955 blr
956#else
957
958_GLOBAL(__setup_e500mc_ivors)
959 li r3,DebugDebug@l
960 mtspr SPRN_IVOR15,r3
961 li r3,PerformanceMonitor@l
962 mtspr SPRN_IVOR35,r3
963 li r3,Doorbell@l
964 mtspr SPRN_IVOR36,r3
965 li r3,CriticalDoorbell@l
966 mtspr SPRN_IVOR37,r3
967 sync
968 blr
969
970
971_GLOBAL(__setup_ehv_ivors)
972 li r3,GuestDoorbell@l
973 mtspr SPRN_IVOR38,r3
974 li r3,CriticalGuestDoorbell@l
975 mtspr SPRN_IVOR39,r3
976 li r3,Hypercall@l
977 mtspr SPRN_IVOR40,r3
978 li r3,Ehvpriv@l
979 mtspr SPRN_IVOR41,r3
980 sync
981 blr
982#endif
983#endif
984
985#ifdef CONFIG_SPE
986
987
988
989
990_GLOBAL(__giveup_spe)
991 addi r3,r3,THREAD
992 lwz r5,PT_REGS(r3)
993 cmpi 0,r5,0
994 SAVE_32EVRS(0, r4, r3, THREAD_EVR0)
995 evxor evr6, evr6, evr6
996 evmwumiaa evr6, evr6, evr6
997 li r4,THREAD_ACC
998 evstddx evr6, r4, r3
999 beq 1f
1000 lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
1001 lis r3,MSR_SPE@h
1002 andc r4,r4,r3
1003 stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
10041:
1005 blr
1006#endif
1007
1008
1009
1010
1011
1012
1013_GLOBAL(abort)
1014 li r13,0
1015 mtspr SPRN_DBCR0,r13
1016 isync
1017 mfmsr r13
1018 ori r13,r13,MSR_DE@l
1019 mtmsr r13
1020 isync
1021 mfspr r13,SPRN_DBCR0
1022 lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
1023 mtspr SPRN_DBCR0,r13
1024 isync
1025
1026_GLOBAL(set_context)
1027
1028#ifdef CONFIG_BDI_SWITCH
1029
1030
1031
1032 lis r5, abatron_pteptrs@h
1033 ori r5, r5, abatron_pteptrs@l
1034 stw r4, 0x4(r5)
1035#endif
1036 mtspr SPRN_PID,r3
1037 isync
1038 blr
1039
1040#ifdef CONFIG_SMP
1041
1042 .globl __secondary_start
1043__secondary_start:
1044 LOAD_REG_ADDR_PIC(r3, tlbcam_index)
1045 lwz r3,0(r3)
1046 mtctr r3
1047 li r26,0
1048
1049 bl switch_to_as1
1050 mr r27,r3
1051
10521: mr r3,r26
1053 bl loadcam_entry
1054 addi r26,r26,1
1055 bdnz 1b
1056 mr r3,r27
1057 LOAD_REG_ADDR_PIC(r4, memstart_addr)
1058 lwz r4,0(r4)
1059 mr r5,r25
1060 rlwinm r5,r5,0,~0x3ffffff
1061 subf r4,r5,r4
1062 li r5,0
1063 li r6,0
1064 bl restore_to_as0
1065
1066
1067 lis r3,__secondary_hold_acknowledge@h
1068 ori r3,r3,__secondary_hold_acknowledge@l
1069 stw r24,0(r3)
1070
1071 li r3,0
1072 mr r4,r24
1073 bl call_setup_cpu
1074
1075
1076 lis r1,secondary_ti@ha
1077 lwz r1,secondary_ti@l(r1)
1078 lwz r2,TI_TASK(r1)
1079
1080
1081 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
1082 li r0,0
1083 stw r0,0(r1)
1084
1085
1086 addi r4,r2,THREAD
1087 mtspr SPRN_SPRG_THREAD,r4
1088
1089
1090 li r4,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l
1091 mtspr SPRN_MAS4,r4
1092
1093
1094 lis r4,MSR_KERNEL@h
1095 ori r4,r4,MSR_KERNEL@l
1096 lis r3,start_secondary@h
1097 ori r3,r3,start_secondary@l
1098 mtspr SPRN_SRR0,r3
1099 mtspr SPRN_SRR1,r4
1100 sync
1101 rfi
1102 sync
1103
1104 .globl __secondary_hold_acknowledge
1105__secondary_hold_acknowledge:
1106 .long -1
1107#endif
1108
1109
1110
1111
1112
1113
1114
1115_GLOBAL(switch_to_as1)
1116 mflr r5
1117
1118
1119 mfspr r3,SPRN_TLB1CFG
1120 andi. r3,r3,0xfff
1121 mfspr r4,SPRN_PID
1122 rlwinm r4,r4,16,0x3fff0000
1123 mtspr SPRN_MAS6,r4
11241: lis r4,0x1000
1125 addi r3,r3,-1
1126 rlwimi r4,r3,16,4,15
1127 mtspr SPRN_MAS0,r4
1128 tlbre
1129 mfspr r4,SPRN_MAS1
1130 andis. r4,r4,MAS1_VALID@h
1131 bne 1b
1132
1133
1134 bl 0f
11350: mflr r4
1136 tlbsx 0,r4
1137
1138 mfspr r4,SPRN_MAS1
1139 ori r4,r4,MAS1_TS
1140 mtspr SPRN_MAS1,r4
1141
1142 mfspr r4,SPRN_MAS0
1143 rlwinm r4,r4,0,~MAS0_ESEL_MASK
1144 rlwimi r4,r3,16,4,15
1145 mtspr SPRN_MAS0,r4
1146 tlbwe
1147 isync
1148 sync
1149
1150 mfmsr r4
1151 ori r4,r4,MSR_IS | MSR_DS
1152 mtspr SPRN_SRR0,r5
1153 mtspr SPRN_SRR1,r4
1154 sync
1155 rfi
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165_GLOBAL(restore_to_as0)
1166 mflr r0
1167
1168 bl 0f
11690: mflr r9
1170 addi r9,r9,1f - 0b
1171
1172
1173
1174
1175
1176
1177 add r9,r9,r4
1178 add r5,r5,r4
1179 add r0,r0,r4
1180
11812: mfmsr r7
1182 li r8,(MSR_IS | MSR_DS)
1183 andc r7,r7,r8
1184
1185 mtspr SPRN_SRR0,r9
1186 mtspr SPRN_SRR1,r7
1187 sync
1188 rfi
1189
1190
11911: lis r9,0x1000
1192 rlwimi r9,r3,16,4,15
1193 mtspr SPRN_MAS0,r9
1194 tlbre
1195 mfspr r9,SPRN_MAS1
1196 rlwinm r9,r9,0,2,31
1197 mtspr SPRN_MAS1,r9
1198 tlbwe
1199 isync
1200
1201 cmpwi r4,0
1202 cmpwi cr1,r6,0
1203 cror eq,4*cr1+eq,eq
1204 bne 3f
1205 mtlr r0
1206 blr
1207
1208
1209
1210
1211
12123: mr r3,r5
1213 bl _start
1214
1215
1216
1217
1218
1219 .data
1220 .align 12
1221 .globl sdata
1222sdata:
1223 .globl empty_zero_page
1224empty_zero_page:
1225 .space 4096
1226 .globl swapper_pg_dir
1227swapper_pg_dir:
1228 .space PGD_TABLE_SIZE
1229
1230
1231
1232
1233
1234abatron_pteptrs:
1235 .space 8
1236