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7#ifndef _SPARC_VIKING_H
8#define _SPARC_VIKING_H
9
10#include <asm/asi.h>
11#include <asm/mxcc.h>
12#include <asm/pgtsrmmu.h>
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85#define VIKING_MMUENABLE 0x00000001
86#define VIKING_NOFAULT 0x00000002
87#define VIKING_PSO 0x00000080
88#define VIKING_DCENABLE 0x00000100
89#define VIKING_ICENABLE 0x00000200
90#define VIKING_SBENABLE 0x00000400
91#define VIKING_MMODE 0x00000800
92#define VIKING_PCENABLE 0x00001000
93#define VIKING_BMODE 0x00002000
94#define VIKING_SPENABLE 0x00004000
95#define VIKING_ACENABLE 0x00008000
96#define VIKING_TCENABLE 0x00010000
97#define VIKING_DPENABLE 0x00040000
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101
102#define VIKING_ACTION_MIX 0x00001000
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105
106
107#define VIKING_PTAG_VALID 0x01000000
108#define VIKING_PTAG_DIRTY 0x00010000
109#define VIKING_PTAG_SHARED 0x00000100
110
111#ifndef __ASSEMBLY__
112
113static inline void viking_flush_icache(void)
114{
115 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"
116 :
117 : "i" (ASI_M_IC_FLCLEAR)
118 : "memory");
119}
120
121static inline void viking_flush_dcache(void)
122{
123 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"
124 :
125 : "i" (ASI_M_DC_FLCLEAR)
126 : "memory");
127}
128
129static inline void viking_unlock_icache(void)
130{
131 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"
132 :
133 : "r" (0x80000000), "i" (ASI_M_IC_FLCLEAR)
134 : "memory");
135}
136
137static inline void viking_unlock_dcache(void)
138{
139 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"
140 :
141 : "r" (0x80000000), "i" (ASI_M_DC_FLCLEAR)
142 : "memory");
143}
144
145static inline void viking_set_bpreg(unsigned long regval)
146{
147 __asm__ __volatile__("sta %0, [%%g0] %1\n\t"
148 :
149 : "r" (regval), "i" (ASI_M_ACTION)
150 : "memory");
151}
152
153static inline unsigned long viking_get_bpreg(void)
154{
155 unsigned long regval;
156
157 __asm__ __volatile__("lda [%%g0] %1, %0\n\t"
158 : "=r" (regval)
159 : "i" (ASI_M_ACTION));
160 return regval;
161}
162
163static inline void viking_get_dcache_ptag(int set, int block,
164 unsigned long *data)
165{
166 unsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) |
167 0x80000000;
168 unsigned long info, page;
169
170 __asm__ __volatile__ ("ldda [%2] %3, %%g2\n\t"
171 "or %%g0, %%g2, %0\n\t"
172 "or %%g0, %%g3, %1\n\t"
173 : "=r" (info), "=r" (page)
174 : "r" (ptag), "i" (ASI_M_DATAC_TAG)
175 : "g2", "g3");
176 data[0] = info;
177 data[1] = page;
178}
179
180static inline void viking_mxcc_turn_off_parity(unsigned long *mregp,
181 unsigned long *mxcc_cregp)
182{
183 unsigned long mreg = *mregp;
184 unsigned long mxcc_creg = *mxcc_cregp;
185
186 mreg &= ~(VIKING_PCENABLE);
187 mxcc_creg &= ~(MXCC_CTL_PARE);
188
189 __asm__ __volatile__ ("set 1f, %%g2\n\t"
190 "andcc %%g2, 4, %%g0\n\t"
191 "bne 2f\n\t"
192 " nop\n"
193 "1:\n\t"
194 "sta %0, [%%g0] %3\n\t"
195 "sta %1, [%2] %4\n\t"
196 "b 1f\n\t"
197 " nop\n\t"
198 "nop\n"
199 "2:\n\t"
200 "sta %0, [%%g0] %3\n\t"
201 "sta %1, [%2] %4\n"
202 "1:\n\t"
203 :
204 : "r" (mreg), "r" (mxcc_creg),
205 "r" (MXCC_CREG), "i" (ASI_M_MMUREGS),
206 "i" (ASI_M_MXCC)
207 : "g2", "memory", "cc");
208 *mregp = mreg;
209 *mxcc_cregp = mxcc_creg;
210}
211
212static inline unsigned long viking_hwprobe(unsigned long vaddr)
213{
214 unsigned long val;
215
216 vaddr &= PAGE_MASK;
217
218 __asm__ __volatile__("lda [%1] %2, %0\n\t"
219 : "=r" (val)
220 : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));
221 if (!val)
222 return 0;
223
224
225 __asm__ __volatile__("lda [%1] %2, %0\n\t"
226 : "=r" (val)
227 : "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE));
228 if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
229 vaddr &= ~SRMMU_PGDIR_MASK;
230 vaddr >>= PAGE_SHIFT;
231 return val | (vaddr << 8);
232 }
233
234
235 __asm__ __volatile__("lda [%1] %2, %0\n\t"
236 : "=r" (val)
237 : "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE));
238 if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
239 vaddr &= ~SRMMU_REAL_PMD_MASK;
240 vaddr >>= PAGE_SHIFT;
241 return val | (vaddr << 8);
242 }
243
244
245 __asm__ __volatile__("lda [%1] %2, %0\n\t"
246 : "=r" (val)
247 : "r" (vaddr), "i" (ASI_M_FLUSH_PROBE));
248 return val;
249}
250
251#endif
252
253#endif
254