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11#ifndef _XTENSA_PCI_BRIDGE_H
12#define _XTENSA_PCI_BRIDGE_H
13
14#ifdef __KERNEL__
15
16struct device_node;
17struct pci_controller;
18
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21
22
23extern int pciauto_bus_scan(struct pci_controller *, int);
24
25struct pci_space {
26 unsigned long start;
27 unsigned long end;
28 unsigned long base;
29};
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33
34
35struct pci_controller {
36 int index;
37 struct pci_controller *next;
38 struct pci_bus *bus;
39 void *arch_data;
40
41 int first_busno;
42 int last_busno;
43
44 struct pci_ops *ops;
45 volatile unsigned int *cfg_addr;
46 volatile unsigned char *cfg_data;
47
48
49
50
51 struct resource io_resource;
52 struct resource mem_resources[3];
53 int mem_resource_count;
54
55
56
57
58 struct pci_space io_space;
59 struct pci_space mem_space;
60
61
62 int (*map_irq)(struct pci_dev*, u8, u8);
63
64};
65
66static inline void pcibios_init_resource(struct resource *res,
67 unsigned long start, unsigned long end, int flags, char *name)
68{
69 res->start = start;
70 res->end = end;
71 res->flags = flags;
72 res->name = name;
73 res->parent = NULL;
74 res->sibling = NULL;
75 res->child = NULL;
76}
77
78
79
80int early_read_config_byte(struct pci_controller*, int, int, int, u8*);
81int early_read_config_word(struct pci_controller*, int, int, int, u16*);
82int early_read_config_dword(struct pci_controller*, int, int, int, u32*);
83int early_write_config_byte(struct pci_controller*, int, int, int, u8);
84int early_write_config_word(struct pci_controller*, int, int, int, u16);
85int early_write_config_dword(struct pci_controller*, int, int, int, u32);
86
87#endif
88#endif
89