LXR linux/drivers/hwtracing/coresight/coresight-priv.h

   1/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
   2 *
   3 * This program is free software; you can redistribute it and/or modify
   4 * it under the terms of the GNU General Public License version 2 and
   5 * only version 2 as published by the Free Software Foundation.
   6 *
   7 * This program is distributed in the hope that it will be useful,
   8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10 * GNU General Public License for more details.
  11 */
  12
  13#ifndef _CORESIGHT_PRIV_H
  14#define _CORESIGHT_PRIV_H
  15
  16#include <linux/bitops.h>
  17#include <linux/io.h>
  18#include <linux/coresight.h>
  19
  20/*
  21 * Coresight management registers (0xf00-0xfcc)
  22 * 0xfa0 - 0xfa4: Management    registers in PFTv1.0
  23 *                Trace         registers in PFTv1.1
  24 */
  25#define CORESIGHT_ITCTRL        0xf00
  26#define CORESIGHT_CLAIMSET      0xfa0
  27#define CORESIGHT_CLAIMCLR      0xfa4
  28#define CORESIGHT_LAR           0xfb0
  29#define CORESIGHT_LSR           0xfb4
  30#define CORESIGHT_AUTHSTATUS    0xfb8
  31#define CORESIGHT_DEVID         0xfc8
  32#define CORESIGHT_DEVTYPE       0xfcc
  33
  34#define TIMEOUT_US              100
  35#define BMVAL(val, lsb, msb)    ((val & GENMASK(msb, lsb)) >> lsb)
  36
  37#define ETM_MODE_EXCL_KERN      BIT(30)
  38#define ETM_MODE_EXCL_USER      BIT(31)
  39
  40enum cs_mode {
  41        CS_MODE_DISABLED,
  42        CS_MODE_SYSFS,
  43        CS_MODE_PERF,
  44};
  45
  46static inline void CS_LOCK(void __iomem *addr)
  47{
  48        do {
  49                /* Wait for things to settle */
  50                mb();
  51                writel_relaxed(0x0, addr + CORESIGHT_LAR);
  52        } while (0);
  53}
  54
  55static inline void CS_UNLOCK(void __iomem *addr)
  56{
  57        do {
  58                writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR);
  59                /* Make sure everyone has seen this */
  60                mb();
  61        } while (0);
  62}
  63
  64void coresight_disable_path(struct list_head *path);
  65int coresight_enable_path(struct list_head *path, u32 mode);
  66struct coresight_device *coresight_get_sink(struct list_head *path);
  67struct list_head *coresight_build_path(struct coresight_device *csdev);
  68void coresight_release_path(struct list_head *path);
  69
  70#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
  71extern int etm_readl_cp14(u32 off, unsigned int *val);
  72extern int etm_writel_cp14(u32 off, u32 val);
  73#else
  74static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }
  75static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
  76#endif
  77
  78#endif
  79