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22#include "cxd2820r_priv.h"
23
24int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
25{
26 struct cxd2820r_priv *priv = fe->demodulator_priv;
27 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
28 int ret, i;
29 u8 buf[2];
30 u32 if_freq;
31 u16 if_ctl;
32 u64 num;
33 struct reg_val_mask tab[] = {
34 { 0x00080, 0x01, 0xff },
35 { 0x00081, 0x05, 0xff },
36 { 0x00085, 0x07, 0xff },
37 { 0x00088, 0x01, 0xff },
38
39 { 0x00082, 0x20, 0x60 },
40 { 0x1016a, 0x48, 0xff },
41 { 0x100a5, 0x00, 0x01 },
42 { 0x10020, 0x06, 0x07 },
43 { 0x10059, 0x50, 0xff },
44 { 0x10087, 0x0c, 0x3c },
45 { 0x1008b, 0x07, 0xff },
46 { 0x1001f, priv->cfg.if_agc_polarity << 7, 0x80 },
47 { 0x10070, priv->cfg.ts_mode, 0xff },
48 { 0x10071, !priv->cfg.ts_clock_inv << 4, 0x10 },
49 };
50
51 dev_dbg(&priv->i2c->dev, "%s: frequency=%d symbol_rate=%d\n", __func__,
52 c->frequency, c->symbol_rate);
53
54
55 if (fe->ops.tuner_ops.set_params)
56 fe->ops.tuner_ops.set_params(fe);
57
58 if (priv->delivery_system != SYS_DVBC_ANNEX_A) {
59 for (i = 0; i < ARRAY_SIZE(tab); i++) {
60 ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
61 tab[i].val, tab[i].mask);
62 if (ret)
63 goto error;
64 }
65 }
66
67 priv->delivery_system = SYS_DVBC_ANNEX_A;
68 priv->ber_running = false;
69
70
71 if (fe->ops.tuner_ops.get_if_frequency) {
72 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
73 if (ret)
74 goto error;
75 } else
76 if_freq = 0;
77
78 dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);
79
80 num = if_freq / 1000;
81 num *= 0x4000;
82 if_ctl = 0x4000 - DIV_ROUND_CLOSEST_ULL(num, 41000);
83 buf[0] = (if_ctl >> 8) & 0x3f;
84 buf[1] = (if_ctl >> 0) & 0xff;
85
86 ret = cxd2820r_wr_regs(priv, 0x10042, buf, 2);
87 if (ret)
88 goto error;
89
90 ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
91 if (ret)
92 goto error;
93
94 ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
95 if (ret)
96 goto error;
97
98 return ret;
99error:
100 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
101 return ret;
102}
103
104int cxd2820r_get_frontend_c(struct dvb_frontend *fe,
105 struct dtv_frontend_properties *c)
106{
107 struct cxd2820r_priv *priv = fe->demodulator_priv;
108 int ret;
109 u8 buf[2];
110
111 ret = cxd2820r_rd_regs(priv, 0x1001a, buf, 2);
112 if (ret)
113 goto error;
114
115 c->symbol_rate = 2500 * ((buf[0] & 0x0f) << 8 | buf[1]);
116
117 ret = cxd2820r_rd_reg(priv, 0x10019, &buf[0]);
118 if (ret)
119 goto error;
120
121 switch ((buf[0] >> 0) & 0x07) {
122 case 0:
123 c->modulation = QAM_16;
124 break;
125 case 1:
126 c->modulation = QAM_32;
127 break;
128 case 2:
129 c->modulation = QAM_64;
130 break;
131 case 3:
132 c->modulation = QAM_128;
133 break;
134 case 4:
135 c->modulation = QAM_256;
136 break;
137 }
138
139 switch ((buf[0] >> 7) & 0x01) {
140 case 0:
141 c->inversion = INVERSION_OFF;
142 break;
143 case 1:
144 c->inversion = INVERSION_ON;
145 break;
146 }
147
148 return ret;
149error:
150 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
151 return ret;
152}
153
154int cxd2820r_read_ber_c(struct dvb_frontend *fe, u32 *ber)
155{
156 struct cxd2820r_priv *priv = fe->demodulator_priv;
157 int ret;
158 u8 buf[3], start_ber = 0;
159 *ber = 0;
160
161 if (priv->ber_running) {
162 ret = cxd2820r_rd_regs(priv, 0x10076, buf, sizeof(buf));
163 if (ret)
164 goto error;
165
166 if ((buf[2] >> 7) & 0x01 || (buf[2] >> 4) & 0x01) {
167 *ber = (buf[2] & 0x0f) << 16 | buf[1] << 8 | buf[0];
168 start_ber = 1;
169 }
170 } else {
171 priv->ber_running = true;
172 start_ber = 1;
173 }
174
175 if (start_ber) {
176
177 ret = cxd2820r_wr_reg(priv, 0x10079, 0x01);
178 if (ret)
179 goto error;
180 }
181
182 return ret;
183error:
184 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
185 return ret;
186}
187
188int cxd2820r_read_signal_strength_c(struct dvb_frontend *fe,
189 u16 *strength)
190{
191 struct cxd2820r_priv *priv = fe->demodulator_priv;
192 int ret;
193 u8 buf[2];
194 u16 tmp;
195
196 ret = cxd2820r_rd_regs(priv, 0x10049, buf, sizeof(buf));
197 if (ret)
198 goto error;
199
200 tmp = (buf[0] & 0x03) << 8 | buf[1];
201 tmp = (~tmp & 0x03ff);
202
203 if (tmp == 512)
204
205 tmp = 0;
206 else if (tmp > 350)
207 tmp = 350;
208
209
210 *strength = tmp * 0xffff / (350-0);
211
212 return ret;
213error:
214 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
215 return ret;
216}
217
218int cxd2820r_read_snr_c(struct dvb_frontend *fe, u16 *snr)
219{
220 struct cxd2820r_priv *priv = fe->demodulator_priv;
221 int ret;
222 u8 tmp;
223 unsigned int A, B;
224
225
226 ret = cxd2820r_rd_reg(priv, 0x10019, &tmp);
227 if (ret)
228 goto error;
229
230 if (((tmp >> 0) & 0x03) % 2) {
231 A = 875;
232 B = 650;
233 } else {
234 A = 950;
235 B = 760;
236 }
237
238 ret = cxd2820r_rd_reg(priv, 0x1004d, &tmp);
239 if (ret)
240 goto error;
241
242 #define CXD2820R_LOG2_E_24 24204406
243 if (tmp)
244 *snr = A * (intlog2(B / tmp) >> 5) / (CXD2820R_LOG2_E_24 >> 5)
245 / 10;
246 else
247 *snr = 0;
248
249 return ret;
250error:
251 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
252 return ret;
253}
254
255int cxd2820r_read_ucblocks_c(struct dvb_frontend *fe, u32 *ucblocks)
256{
257 *ucblocks = 0;
258
259 return 0;
260}
261
262int cxd2820r_read_status_c(struct dvb_frontend *fe, enum fe_status *status)
263{
264 struct cxd2820r_priv *priv = fe->demodulator_priv;
265 int ret;
266 u8 buf[2];
267 *status = 0;
268
269 ret = cxd2820r_rd_regs(priv, 0x10088, buf, sizeof(buf));
270 if (ret)
271 goto error;
272
273 if (((buf[0] >> 0) & 0x01) == 1) {
274 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
275 FE_HAS_VITERBI | FE_HAS_SYNC;
276
277 if (((buf[1] >> 3) & 0x01) == 1) {
278 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
279 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
280 }
281 }
282
283 dev_dbg(&priv->i2c->dev, "%s: lock=%02x %02x\n", __func__, buf[0],
284 buf[1]);
285
286 return ret;
287error:
288 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
289 return ret;
290}
291
292int cxd2820r_init_c(struct dvb_frontend *fe)
293{
294 struct cxd2820r_priv *priv = fe->demodulator_priv;
295 int ret;
296
297 ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
298 if (ret)
299 goto error;
300
301 return ret;
302error:
303 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
304 return ret;
305}
306
307int cxd2820r_sleep_c(struct dvb_frontend *fe)
308{
309 struct cxd2820r_priv *priv = fe->demodulator_priv;
310 int ret, i;
311 struct reg_val_mask tab[] = {
312 { 0x000ff, 0x1f, 0xff },
313 { 0x00085, 0x00, 0xff },
314 { 0x00088, 0x01, 0xff },
315 { 0x00081, 0x00, 0xff },
316 { 0x00080, 0x00, 0xff },
317 };
318
319 dev_dbg(&priv->i2c->dev, "%s\n", __func__);
320
321 priv->delivery_system = SYS_UNDEFINED;
322
323 for (i = 0; i < ARRAY_SIZE(tab); i++) {
324 ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
325 tab[i].mask);
326 if (ret)
327 goto error;
328 }
329
330 return ret;
331error:
332 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
333 return ret;
334}
335
336int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
337 struct dvb_frontend_tune_settings *s)
338{
339 s->min_delay_ms = 500;
340 s->step_size = 0;
341 s->max_drift = 0;
342
343 return 0;
344}
345
