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21#include <linux/kernel.h>
22#include <linux/spinlock.h>
23#include <asm/io.h>
24
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/interrupt.h>
28#include <linux/pci.h>
29
30#include "dmxdev.h"
31#include "dvbdev.h"
32#include "dvb_demux.h"
33#include "dvb_frontend.h"
34#include "dvb_net.h"
35
36#include "mantis_common.h"
37#include "mantis_reg.h"
38#include "mantis_uart.h"
39#include "mantis_input.h"
40
41struct mantis_uart_params {
42 enum mantis_baud baud_rate;
43 enum mantis_parity parity;
44};
45
46static struct {
47 char string[7];
48} rates[5] = {
49 { "9600" },
50 { "19200" },
51 { "38400" },
52 { "57600" },
53 { "115200" }
54};
55
56static struct {
57 char string[5];
58} parity[3] = {
59 { "NONE" },
60 { "ODD" },
61 { "EVEN" }
62};
63
64static void mantis_uart_read(struct mantis_pci *mantis)
65{
66 struct mantis_hwconfig *config = mantis->hwconfig;
67 int i, scancode = 0, err = 0;
68
69
70 dprintk(MANTIS_DEBUG, 1, "UART Reading ...");
71 for (i = 0; i < (config->bytes + 1); i++) {
72 int data = mmread(MANTIS_UART_RXD);
73
74 dprintk(MANTIS_DEBUG, 0, " <%02x>", data);
75
76 scancode = (scancode << 8) | (data & 0x3f);
77 err |= data;
78
79 if (data & (1 << 7))
80 dprintk(MANTIS_ERROR, 1, "UART framing error");
81
82 if (data & (1 << 6))
83 dprintk(MANTIS_ERROR, 1, "UART parity error");
84 }
85 dprintk(MANTIS_DEBUG, 0, "\n");
86
87 if ((err & 0xC0) == 0)
88 mantis_input_process(mantis, scancode);
89}
90
91static void mantis_uart_work(struct work_struct *work)
92{
93 struct mantis_pci *mantis = container_of(work, struct mantis_pci, uart_work);
94 u32 stat;
95
96 stat = mmread(MANTIS_UART_STAT);
97
98 if (stat & MANTIS_UART_RXFIFO_FULL)
99 dprintk(MANTIS_ERROR, 1, "RX Fifo FULL");
100
101
102
103
104
105 while (stat & MANTIS_UART_RXFIFO_DATA) {
106 mantis_uart_read(mantis);
107 stat = mmread(MANTIS_UART_STAT);
108 }
109
110
111 mantis_unmask_ints(mantis, MANTIS_INT_IRQ1);
112}
113
114static int mantis_uart_setup(struct mantis_pci *mantis,
115 struct mantis_uart_params *params)
116{
117 u32 reg;
118
119 mmwrite((mmread(MANTIS_UART_CTL) | (params->parity & 0x3)), MANTIS_UART_CTL);
120
121 reg = mmread(MANTIS_UART_BAUD);
122
123 switch (params->baud_rate) {
124 case MANTIS_BAUD_9600:
125 reg |= 0xd8;
126 break;
127 case MANTIS_BAUD_19200:
128 reg |= 0x6c;
129 break;
130 case MANTIS_BAUD_38400:
131 reg |= 0x36;
132 break;
133 case MANTIS_BAUD_57600:
134 reg |= 0x23;
135 break;
136 case MANTIS_BAUD_115200:
137 reg |= 0x11;
138 break;
139 default:
140 return -EINVAL;
141 }
142
143 mmwrite(reg, MANTIS_UART_BAUD);
144
145 return 0;
146}
147
148int mantis_uart_init(struct mantis_pci *mantis)
149{
150 struct mantis_hwconfig *config = mantis->hwconfig;
151 struct mantis_uart_params params;
152
153
154 params.baud_rate = config->baud_rate;
155 params.parity = config->parity;
156 dprintk(MANTIS_INFO, 1, "Initializing UART @ %sbps parity:%s",
157 rates[params.baud_rate].string,
158 parity[params.parity].string);
159
160 INIT_WORK(&mantis->uart_work, mantis_uart_work);
161
162
163 mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
164
165 mantis_uart_setup(mantis, ¶ms);
166
167
168 mmwrite((mmread(MANTIS_UART_BAUD) | (config->bytes << 8)), MANTIS_UART_BAUD);
169
170
171 mmwrite((mmread(MANTIS_UART_CTL) | MANTIS_UART_RXFLUSH), MANTIS_UART_CTL);
172
173
174 mmwrite(mmread(MANTIS_UART_CTL) | MANTIS_UART_RXINT, MANTIS_UART_CTL);
175 mantis_unmask_ints(mantis, MANTIS_INT_IRQ1);
176
177 schedule_work(&mantis->uart_work);
178 dprintk(MANTIS_DEBUG, 1, "UART successfully initialized");
179
180 return 0;
181}
182EXPORT_SYMBOL_GPL(mantis_uart_init);
183
184void mantis_uart_exit(struct mantis_pci *mantis)
185{
186
187 mantis_mask_ints(mantis, MANTIS_INT_IRQ1);
188 mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
189 flush_work(&mantis->uart_work);
190}
191EXPORT_SYMBOL_GPL(mantis_uart_exit);
192