linux/drivers/net/ethernet/freescale/fman/fman.h
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   1/*
   2 * Copyright 2008-2015 Freescale Semiconductor Inc.
   3 *
   4 * Redistribution and use in source and binary forms, with or without
   5 * modification, are permitted provided that the following conditions are met:
   6 *     * Redistributions of source code must retain the above copyright
   7 *       notice, this list of conditions and the following disclaimer.
   8 *     * Redistributions in binary form must reproduce the above copyright
   9 *       notice, this list of conditions and the following disclaimer in the
  10 *       documentation and/or other materials provided with the distribution.
  11 *     * Neither the name of Freescale Semiconductor nor the
  12 *       names of its contributors may be used to endorse or promote products
  13 *       derived from this software without specific prior written permission.
  14 *
  15 *
  16 * ALTERNATIVELY, this software may be distributed under the terms of the
  17 * GNU General Public License ("GPL") as published by the Free Software
  18 * Foundation, either version 2 of that License or (at your option) any
  19 * later version.
  20 *
  21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31 */
  32
  33#ifndef __FM_H
  34#define __FM_H
  35
  36#include <linux/io.h>
  37
  38/* FM Frame descriptor macros  */
  39/* Frame queue Context Override */
  40#define FM_FD_CMD_FCO                   0x80000000
  41#define FM_FD_CMD_RPD                   0x40000000  /* Read Prepended Data */
  42#define FM_FD_CMD_DTC                   0x10000000  /* Do L4 Checksum */
  43
  44/* TX-Port: Unsupported Format */
  45#define FM_FD_ERR_UNSUPPORTED_FORMAT    0x04000000
  46/* TX Port: Length Error */
  47#define FM_FD_ERR_LENGTH                0x02000000
  48#define FM_FD_ERR_DMA                   0x01000000  /* DMA Data error */
  49
  50/* IPR frame (not error) */
  51#define FM_FD_IPR                       0x00000001
  52/* IPR non-consistent-sp */
  53#define FM_FD_ERR_IPR_NCSP              (0x00100000 | FM_FD_IPR)
  54/* IPR error */
  55#define FM_FD_ERR_IPR                   (0x00200000 | FM_FD_IPR)
  56/* IPR timeout */
  57#define FM_FD_ERR_IPR_TO                (0x00300000 | FM_FD_IPR)
  58/* TX Port: Length Error */
  59#define FM_FD_ERR_IPRE                  (FM_FD_ERR_IPR & ~FM_FD_IPR)
  60
  61/* Rx FIFO overflow, FCS error, code error, running disparity error
  62 * (SGMII and TBI modes), FIFO parity error. PHY Sequence error,
  63 * PHY error control character detected.
  64 */
  65#define FM_FD_ERR_PHYSICAL              0x00080000
  66/* Frame too long OR Frame size exceeds max_length_frame  */
  67#define FM_FD_ERR_SIZE                  0x00040000
  68/* classification discard */
  69#define FM_FD_ERR_CLS_DISCARD           0x00020000
  70/* Extract Out of Frame */
  71#define FM_FD_ERR_EXTRACTION            0x00008000
  72/* No Scheme Selected */
  73#define FM_FD_ERR_NO_SCHEME             0x00004000
  74/* Keysize Overflow */
  75#define FM_FD_ERR_KEYSIZE_OVERFLOW      0x00002000
  76/* Frame color is red */
  77#define FM_FD_ERR_COLOR_RED             0x00000800
  78/* Frame color is yellow */
  79#define FM_FD_ERR_COLOR_YELLOW          0x00000400
  80/* Parser Time out Exceed */
  81#define FM_FD_ERR_PRS_TIMEOUT           0x00000080
  82/* Invalid Soft Parser instruction */
  83#define FM_FD_ERR_PRS_ILL_INSTRUCT      0x00000040
  84/* Header error was identified during parsing */
  85#define FM_FD_ERR_PRS_HDR_ERR           0x00000020
  86/* Frame parsed beyind 256 first bytes */
  87#define FM_FD_ERR_BLOCK_LIMIT_EXCEEDED  0x00000008
  88
  89/* non Frame-Manager error */
  90#define FM_FD_RX_STATUS_ERR_NON_FM      0x00400000
  91
  92/* FMan driver defines */
  93#define FMAN_BMI_FIFO_UNITS             0x100
  94#define OFFSET_UNITS                    16
  95
  96/* BMan defines */
  97#define BM_MAX_NUM_OF_POOLS             64 /* Buffers pools */
  98#define FMAN_PORT_MAX_EXT_POOLS_NUM     8  /* External BM pools per Rx port */
  99
 100struct fman; /* FMan data */
 101
 102/* Enum for defining port types */
 103enum fman_port_type {
 104        FMAN_PORT_TYPE_TX = 0,  /* TX Port */
 105        FMAN_PORT_TYPE_RX,      /* RX Port */
 106};
 107
 108struct fman_rev_info {
 109        u8 major;                       /* Major revision */
 110        u8 minor;                       /* Minor revision */
 111};
 112
 113enum fman_exceptions {
 114        FMAN_EX_DMA_BUS_ERROR = 0,      /* DMA bus error. */
 115        FMAN_EX_DMA_READ_ECC,           /* Read Buffer ECC error */
 116        FMAN_EX_DMA_SYSTEM_WRITE_ECC,   /* Write Buffer ECC err on sys side */
 117        FMAN_EX_DMA_FM_WRITE_ECC,       /* Write Buffer ECC error on FM side */
 118        FMAN_EX_DMA_SINGLE_PORT_ECC,    /* Single Port ECC error on FM side */
 119        FMAN_EX_FPM_STALL_ON_TASKS,     /* Stall of tasks on FPM */
 120        FMAN_EX_FPM_SINGLE_ECC,         /* Single ECC on FPM. */
 121        FMAN_EX_FPM_DOUBLE_ECC,         /* Double ECC error on FPM ram access */
 122        FMAN_EX_QMI_SINGLE_ECC, /* Single ECC on QMI. */
 123        FMAN_EX_QMI_DOUBLE_ECC, /* Double bit ECC occurred on QMI */
 124        FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/* DeQ from unknown port id */
 125        FMAN_EX_BMI_LIST_RAM_ECC,       /* Linked List RAM ECC error */
 126        FMAN_EX_BMI_STORAGE_PROFILE_ECC,/* storage profile */
 127        FMAN_EX_BMI_STATISTICS_RAM_ECC,/* Statistics RAM ECC Err Enable */
 128        FMAN_EX_BMI_DISPATCH_RAM_ECC,   /* Dispatch RAM ECC Error Enable */
 129        FMAN_EX_IRAM_ECC,               /* Double bit ECC occurred on IRAM */
 130        FMAN_EX_MURAM_ECC               /* Double bit ECC occurred on MURAM */
 131};
 132
 133/* Parse results memory layout */
 134struct fman_prs_result {
 135        u8 lpid;                /* Logical port id */
 136        u8 shimr;               /* Shim header result  */
 137        u16 l2r;                /* Layer 2 result */
 138        u16 l3r;                /* Layer 3 result */
 139        u8 l4r;         /* Layer 4 result */
 140        u8 cplan;               /* Classification plan id */
 141        u16 nxthdr;             /* Next Header  */
 142        u16 cksum;              /* Running-sum */
 143        /* Flags&fragment-offset field of the last IP-header */
 144        u16 flags_frag_off;
 145        /* Routing type field of a IPV6 routing extension header */
 146        u8 route_type;
 147        /* Routing Extension Header Present; last bit is IP valid */
 148        u8 rhp_ip_valid;
 149        u8 shim_off[2];         /* Shim offset */
 150        u8 ip_pid_off;          /* IP PID (last IP-proto) offset */
 151        u8 eth_off;             /* ETH offset */
 152        u8 llc_snap_off;        /* LLC_SNAP offset */
 153        u8 vlan_off[2];         /* VLAN offset */
 154        u8 etype_off;           /* ETYPE offset */
 155        u8 pppoe_off;           /* PPP offset */
 156        u8 mpls_off[2];         /* MPLS offset */
 157        u8 ip_off[2];           /* IP offset */
 158        u8 gre_off;             /* GRE offset */
 159        u8 l4_off;              /* Layer 4 offset */
 160        u8 nxthdr_off;          /* Parser end point */
 161};
 162
 163/* A structure for defining buffer prefix area content. */
 164struct fman_buffer_prefix_content {
 165        /* Number of bytes to be left at the beginning of the external
 166         * buffer; Note that the private-area will start from the base
 167         * of the buffer address.
 168         */
 169        u16 priv_data_size;
 170        /* true to pass the parse result to/from the FM;
 171         * User may use FM_PORT_GetBufferPrsResult() in
 172         * order to get the parser-result from a buffer.
 173         */
 174        bool pass_prs_result;
 175        /* true to pass the timeStamp to/from the FM User */
 176        bool pass_time_stamp;
 177        /* true to pass the KG hash result to/from the FM User may
 178         * use FM_PORT_GetBufferHashResult() in order to get the
 179         * parser-result from a buffer.
 180         */
 181        bool pass_hash_result;
 182        /* Add all other Internal-Context information: AD,
 183         * hash-result, key, etc.
 184         */
 185        u16 data_align;
 186};
 187
 188/* A structure of information about each of the external
 189 * buffer pools used by a port or storage-profile.
 190 */
 191struct fman_ext_pool_params {
 192        u8 id;              /* External buffer pool id */
 193        u16 size;                   /* External buffer pool buffer size */
 194};
 195
 196/* A structure for informing the driver about the external
 197 * buffer pools allocated in the BM and used by a port or a
 198 * storage-profile.
 199 */
 200struct fman_ext_pools {
 201        u8 num_of_pools_used; /* Number of pools use by this port */
 202        struct fman_ext_pool_params ext_buf_pool[FMAN_PORT_MAX_EXT_POOLS_NUM];
 203                                        /* Parameters for each port */
 204};
 205
 206/* A structure for defining BM pool depletion criteria */
 207struct fman_buf_pool_depletion {
 208        /* select mode in which pause frames will be sent after a
 209         * number of pools (all together!) are depleted
 210         */
 211        bool pools_grp_mode_enable;
 212        /* the number of depleted pools that will invoke pause
 213         * frames transmission.
 214         */
 215        u8 num_of_pools;
 216        /* For each pool, true if it should be considered for
 217         * depletion (Note - this pool must be used by this port!).
 218         */
 219        bool pools_to_consider[BM_MAX_NUM_OF_POOLS];
 220        /* select mode in which pause frames will be sent
 221         * after a single-pool is depleted;
 222         */
 223        bool single_pool_mode_enable;
 224        /* For each pool, true if it should be considered
 225         * for depletion (Note - this pool must be used by this port!)
 226         */
 227        bool pools_to_consider_for_single_mode[BM_MAX_NUM_OF_POOLS];
 228};
 229
 230/* Enum for inter-module interrupts registration */
 231enum fman_event_modules {
 232        FMAN_MOD_MAC = 0,               /* MAC event */
 233        FMAN_MOD_FMAN_CTRL,     /* FMAN Controller */
 234        FMAN_MOD_DUMMY_LAST
 235};
 236
 237/* Enum for interrupts types */
 238enum fman_intr_type {
 239        FMAN_INTR_TYPE_ERR,
 240        FMAN_INTR_TYPE_NORMAL
 241};
 242
 243/* Enum for inter-module interrupts registration */
 244enum fman_inter_module_event {
 245        FMAN_EV_ERR_MAC0 = 0,   /* MAC 0 error event */
 246        FMAN_EV_ERR_MAC1,               /* MAC 1 error event */
 247        FMAN_EV_ERR_MAC2,               /* MAC 2 error event */
 248        FMAN_EV_ERR_MAC3,               /* MAC 3 error event */
 249        FMAN_EV_ERR_MAC4,               /* MAC 4 error event */
 250        FMAN_EV_ERR_MAC5,               /* MAC 5 error event */
 251        FMAN_EV_ERR_MAC6,               /* MAC 6 error event */
 252        FMAN_EV_ERR_MAC7,               /* MAC 7 error event */
 253        FMAN_EV_ERR_MAC8,               /* MAC 8 error event */
 254        FMAN_EV_ERR_MAC9,               /* MAC 9 error event */
 255        FMAN_EV_MAC0,           /* MAC 0 event (Magic packet detection) */
 256        FMAN_EV_MAC1,           /* MAC 1 event (Magic packet detection) */
 257        FMAN_EV_MAC2,           /* MAC 2 (Magic packet detection) */
 258        FMAN_EV_MAC3,           /* MAC 3 (Magic packet detection) */
 259        FMAN_EV_MAC4,           /* MAC 4 (Magic packet detection) */
 260        FMAN_EV_MAC5,           /* MAC 5 (Magic packet detection) */
 261        FMAN_EV_MAC6,           /* MAC 6 (Magic packet detection) */
 262        FMAN_EV_MAC7,           /* MAC 7 (Magic packet detection) */
 263        FMAN_EV_MAC8,           /* MAC 8 event (Magic packet detection) */
 264        FMAN_EV_MAC9,           /* MAC 9 event (Magic packet detection) */
 265        FMAN_EV_FMAN_CTRL_0,    /* Fman controller event 0 */
 266        FMAN_EV_FMAN_CTRL_1,    /* Fman controller event 1 */
 267        FMAN_EV_FMAN_CTRL_2,    /* Fman controller event 2 */
 268        FMAN_EV_FMAN_CTRL_3,    /* Fman controller event 3 */
 269        FMAN_EV_CNT
 270};
 271
 272struct fman_intr_src {
 273        void (*isr_cb)(void *src_arg);
 274        void *src_handle;
 275};
 276
 277/* Structure for port-FM communication during fman_port_init. */
 278struct fman_port_init_params {
 279        u8 port_id;                     /* port Id */
 280        enum fman_port_type port_type;  /* Port type */
 281        u16 port_speed;                 /* Port speed */
 282        u16 liodn_offset;               /* Port's requested resource */
 283        u8 num_of_tasks;                /* Port's requested resource */
 284        u8 num_of_extra_tasks;          /* Port's requested resource */
 285        u8 num_of_open_dmas;            /* Port's requested resource */
 286        u8 num_of_extra_open_dmas;      /* Port's requested resource */
 287        u32 size_of_fifo;               /* Port's requested resource */
 288        u32 extra_size_of_fifo;         /* Port's requested resource */
 289        u8 deq_pipeline_depth;          /* Port's requested resource */
 290        u16 max_frame_length;           /* Port's max frame length. */
 291        u16 liodn_base;
 292        /* LIODN base for this port, to be used together with LIODN offset. */
 293};
 294
 295void fman_get_revision(struct fman *fman, struct fman_rev_info *rev_info);
 296
 297void fman_register_intr(struct fman *fman, enum fman_event_modules mod,
 298                        u8 mod_id, enum fman_intr_type intr_type,
 299                        void (*f_isr)(void *h_src_arg), void *h_src_arg);
 300
 301void fman_unregister_intr(struct fman *fman, enum fman_event_modules mod,
 302                          u8 mod_id, enum fman_intr_type intr_type);
 303
 304int fman_set_port_params(struct fman *fman,
 305                         struct fman_port_init_params *port_params);
 306
 307int fman_reset_mac(struct fman *fman, u8 mac_id);
 308
 309u16 fman_get_clock_freq(struct fman *fman);
 310
 311u32 fman_get_bmi_max_fifo_size(struct fman *fman);
 312
 313int fman_set_mac_max_frame(struct fman *fman, u8 mac_id, u16 mfl);
 314
 315u32 fman_get_qman_channel_id(struct fman *fman, u32 port_id);
 316
 317struct resource *fman_get_mem_region(struct fman *fman);
 318
 319u16 fman_get_max_frm(void);
 320
 321int fman_get_rx_extra_headroom(void);
 322
 323struct fman *fman_bind(struct device *dev);
 324
 325#endif /* __FM_H */
 326