LXR linux/drivers/vfio/platform/reset/vfio_platform

   1/*
   2 * VFIO platform driver specialized for Calxeda xgmac reset
   3 * reset code is inherited from calxeda xgmac native driver
   4 *
   5 * Copyright 2010-2011 Calxeda, Inc.
   6 * Copyright (c) 2015 Linaro Ltd.
   7 *              www.linaro.org
   8 *
   9 * This program is free software; you can redistribute it and/or modify it
  10 * under the terms and conditions of the GNU General Public License,
  11 * version 2, as published by the Free Software Foundation.
  12 *
  13 * This program is distributed in the hope it will be useful, but WITHOUT
  14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16 * more details.
  17 *
  18 * You should have received a copy of the GNU General Public License along with
  19 * this program.  If not, see <http://www.gnu.org/licenses/>.
  20 */
  21
  22#include <linux/module.h>
  23#include <linux/kernel.h>
  24#include <linux/init.h>
  25#include <linux/io.h>
  26
  27#include "vfio_platform_private.h"
  28
  29#define DRIVER_VERSION  "0.1"
  30#define DRIVER_AUTHOR   "Eric Auger <eric.auger@linaro.org>"
  31#define DRIVER_DESC     "Reset support for Calxeda xgmac vfio platform device"
  32
  33/* XGMAC Register definitions */
  34#define XGMAC_CONTROL           0x00000000      /* MAC Configuration */
  35
  36/* DMA Control and Status Registers */
  37#define XGMAC_DMA_CONTROL       0x00000f18      /* Ctrl (Operational Mode) */
  38#define XGMAC_DMA_INTR_ENA      0x00000f1c      /* Interrupt Enable */
  39
  40/* DMA Control registe defines */
  41#define DMA_CONTROL_ST          0x00002000      /* Start/Stop Transmission */
  42#define DMA_CONTROL_SR          0x00000002      /* Start/Stop Receive */
  43
  44/* Common MAC defines */
  45#define MAC_ENABLE_TX           0x00000008      /* Transmitter Enable */
  46#define MAC_ENABLE_RX           0x00000004      /* Receiver Enable */
  47
  48static inline void xgmac_mac_disable(void __iomem *ioaddr)
  49{
  50        u32 value = readl(ioaddr + XGMAC_DMA_CONTROL);
  51
  52        value &= ~(DMA_CONTROL_ST | DMA_CONTROL_SR);
  53        writel(value, ioaddr + XGMAC_DMA_CONTROL);
  54
  55        value = readl(ioaddr + XGMAC_CONTROL);
  56        value &= ~(MAC_ENABLE_TX | MAC_ENABLE_RX);
  57        writel(value, ioaddr + XGMAC_CONTROL);
  58}
  59
  60int vfio_platform_calxedaxgmac_reset(struct vfio_platform_device *vdev)
  61{
  62        struct vfio_platform_region *reg = &vdev->regions[0];
  63
  64        if (!reg->ioaddr) {
  65                reg->ioaddr =
  66                        ioremap_nocache(reg->addr, reg->size);
  67                if (!reg->ioaddr)
  68                        return -ENOMEM;
  69        }
  70
  71        /* disable IRQ */
  72        writel(0, reg->ioaddr + XGMAC_DMA_INTR_ENA);
  73
  74        /* Disable the MAC core */
  75        xgmac_mac_disable(reg->ioaddr);
  76
  77        return 0;
  78}
  79
  80module_vfio_reset_handler("calxeda,hb-xgmac", vfio_platform_calxedaxgmac_reset);
  81
  82MODULE_VERSION(DRIVER_VERSION);
  83MODULE_LICENSE("GPL v2");
  84MODULE_AUTHOR(DRIVER_AUTHOR);
  85MODULE_DESCRIPTION(DRIVER_DESC);
  86