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44#ifndef __ACTBL2_H__
45#define __ACTBL2_H__
46
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63
64#define ACPI_SIG_ASF "ASF!"
65#define ACPI_SIG_BOOT "BOOT"
66#define ACPI_SIG_CSRT "CSRT"
67#define ACPI_SIG_DBG2 "DBG2"
68#define ACPI_SIG_DBGP "DBGP"
69#define ACPI_SIG_DMAR "DMAR"
70#define ACPI_SIG_HPET "HPET"
71#define ACPI_SIG_IBFT "IBFT"
72#define ACPI_SIG_IORT "IORT"
73#define ACPI_SIG_IVRS "IVRS"
74#define ACPI_SIG_LPIT "LPIT"
75#define ACPI_SIG_MCFG "MCFG"
76#define ACPI_SIG_MCHI "MCHI"
77#define ACPI_SIG_MSDM "MSDM"
78#define ACPI_SIG_MTMR "MTMR"
79#define ACPI_SIG_SLIC "SLIC"
80#define ACPI_SIG_SPCR "SPCR"
81#define ACPI_SIG_SPMI "SPMI"
82#define ACPI_SIG_TCPA "TCPA"
83#define ACPI_SIG_TPM2 "TPM2"
84#define ACPI_SIG_UEFI "UEFI"
85#define ACPI_SIG_VRTC "VRTC"
86#define ACPI_SIG_WAET "WAET"
87#define ACPI_SIG_WDAT "WDAT"
88#define ACPI_SIG_WDDT "WDDT"
89#define ACPI_SIG_WDRT "WDRT"
90
91#ifdef ACPI_UNDEFINED_TABLES
92
93
94
95#define ACPI_SIG_ATKG "ATKG"
96#define ACPI_SIG_GSCI "GSCI"
97#define ACPI_SIG_IEIT "IEIT"
98#endif
99
100
101
102
103
104#pragma pack(1)
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125
126
127struct acpi_table_asf {
128 struct acpi_table_header header;
129};
130
131
132
133struct acpi_asf_header {
134 u8 type;
135 u8 reserved;
136 u16 length;
137};
138
139
140
141enum acpi_asf_type {
142 ACPI_ASF_TYPE_INFO = 0,
143 ACPI_ASF_TYPE_ALERT = 1,
144 ACPI_ASF_TYPE_CONTROL = 2,
145 ACPI_ASF_TYPE_BOOT = 3,
146 ACPI_ASF_TYPE_ADDRESS = 4,
147 ACPI_ASF_TYPE_RESERVED = 5
148};
149
150
151
152
153
154
155
156struct acpi_asf_info {
157 struct acpi_asf_header header;
158 u8 min_reset_value;
159 u8 min_poll_interval;
160 u16 system_id;
161 u32 mfg_id;
162 u8 flags;
163 u8 reserved2[3];
164};
165
166
167
168#define ACPI_ASF_SMBUS_PROTOCOLS (1)
169
170
171
172struct acpi_asf_alert {
173 struct acpi_asf_header header;
174 u8 assert_mask;
175 u8 deassert_mask;
176 u8 alerts;
177 u8 data_length;
178};
179
180struct acpi_asf_alert_data {
181 u8 address;
182 u8 command;
183 u8 mask;
184 u8 value;
185 u8 sensor_type;
186 u8 type;
187 u8 offset;
188 u8 source_type;
189 u8 severity;
190 u8 sensor_number;
191 u8 entity;
192 u8 instance;
193};
194
195
196
197struct acpi_asf_remote {
198 struct acpi_asf_header header;
199 u8 controls;
200 u8 data_length;
201 u16 reserved2;
202};
203
204struct acpi_asf_control_data {
205 u8 function;
206 u8 address;
207 u8 command;
208 u8 value;
209};
210
211
212
213struct acpi_asf_rmcp {
214 struct acpi_asf_header header;
215 u8 capabilities[7];
216 u8 completion_code;
217 u32 enterprise_id;
218 u8 command;
219 u16 parameter;
220 u16 boot_options;
221 u16 oem_parameters;
222};
223
224
225
226struct acpi_asf_address {
227 struct acpi_asf_header header;
228 u8 eprom_address;
229 u8 devices;
230};
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240
241struct acpi_table_boot {
242 struct acpi_table_header header;
243 u8 cmos_index;
244 u8 reserved[3];
245};
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255
256struct acpi_table_csrt {
257 struct acpi_table_header header;
258};
259
260
261
262struct acpi_csrt_group {
263 u32 length;
264 u32 vendor_id;
265 u32 subvendor_id;
266 u16 device_id;
267 u16 subdevice_id;
268 u16 revision;
269 u16 reserved;
270 u32 shared_info_length;
271
272
273};
274
275
276
277struct acpi_csrt_shared_info {
278 u16 major_version;
279 u16 minor_version;
280 u32 mmio_base_low;
281 u32 mmio_base_high;
282 u32 gsi_interrupt;
283 u8 interrupt_polarity;
284 u8 interrupt_mode;
285 u8 num_channels;
286 u8 dma_address_width;
287 u16 base_request_line;
288 u16 num_handshake_signals;
289 u32 max_block_size;
290
291
292};
293
294
295
296struct acpi_csrt_descriptor {
297 u32 length;
298 u16 type;
299 u16 subtype;
300 u32 uid;
301
302
303};
304
305
306
307#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
308#define ACPI_CSRT_TYPE_TIMER 0x0002
309#define ACPI_CSRT_TYPE_DMA 0x0003
310
311
312
313#define ACPI_CSRT_XRUPT_LINE 0x0000
314#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
315#define ACPI_CSRT_TIMER 0x0000
316#define ACPI_CSRT_DMA_CHANNEL 0x0000
317#define ACPI_CSRT_DMA_CONTROLLER 0x0001
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327
328struct acpi_table_dbg2 {
329 struct acpi_table_header header;
330 u32 info_offset;
331 u32 info_count;
332};
333
334struct acpi_dbg2_header {
335 u32 info_offset;
336 u32 info_count;
337};
338
339
340
341struct acpi_dbg2_device {
342 u8 revision;
343 u16 length;
344 u8 register_count;
345 u16 namepath_length;
346 u16 namepath_offset;
347 u16 oem_data_length;
348 u16 oem_data_offset;
349 u16 port_type;
350 u16 port_subtype;
351 u16 reserved;
352 u16 base_address_offset;
353 u16 address_size_offset;
354
355
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357
358
359
360
361};
362
363
364
365#define ACPI_DBG2_SERIAL_PORT 0x8000
366#define ACPI_DBG2_1394_PORT 0x8001
367#define ACPI_DBG2_USB_PORT 0x8002
368#define ACPI_DBG2_NET_PORT 0x8003
369
370
371
372#define ACPI_DBG2_16550_COMPATIBLE 0x0000
373#define ACPI_DBG2_16550_SUBSET 0x0001
374
375#define ACPI_DBG2_1394_STANDARD 0x0000
376
377#define ACPI_DBG2_USB_XHCI 0x0000
378#define ACPI_DBG2_USB_EHCI 0x0001
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388
389struct acpi_table_dbgp {
390 struct acpi_table_header header;
391 u8 type;
392 u8 reserved[3];
393 struct acpi_generic_address debug_port;
394};
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405
406struct acpi_table_dmar {
407 struct acpi_table_header header;
408 u8 width;
409 u8 flags;
410 u8 reserved[10];
411};
412
413
414
415#define ACPI_DMAR_INTR_REMAP (1)
416
417
418
419struct acpi_dmar_header {
420 u16 type;
421 u16 length;
422};
423
424
425
426enum acpi_dmar_type {
427 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
428 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
429 ACPI_DMAR_TYPE_ROOT_ATS = 2,
430 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
431 ACPI_DMAR_TYPE_NAMESPACE = 4,
432 ACPI_DMAR_TYPE_RESERVED = 5
433};
434
435
436
437struct acpi_dmar_device_scope {
438 u8 entry_type;
439 u8 length;
440 u16 reserved;
441 u8 enumeration_id;
442 u8 bus;
443};
444
445
446
447enum acpi_dmar_scope_type {
448 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
449 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
450 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
451 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
452 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
453 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
454 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6
455};
456
457struct acpi_dmar_pci_path {
458 u8 device;
459 u8 function;
460};
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462
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467
468struct acpi_dmar_hardware_unit {
469 struct acpi_dmar_header header;
470 u8 flags;
471 u8 reserved;
472 u16 segment;
473 u64 address;
474};
475
476
477
478#define ACPI_DMAR_INCLUDE_ALL (1)
479
480
481
482struct acpi_dmar_reserved_memory {
483 struct acpi_dmar_header header;
484 u16 reserved;
485 u16 segment;
486 u64 base_address;
487 u64 end_address;
488};
489
490
491
492#define ACPI_DMAR_ALLOW_ALL (1)
493
494
495
496struct acpi_dmar_atsr {
497 struct acpi_dmar_header header;
498 u8 flags;
499 u8 reserved;
500 u16 segment;
501};
502
503
504
505#define ACPI_DMAR_ALL_PORTS (1)
506
507
508
509struct acpi_dmar_rhsa {
510 struct acpi_dmar_header header;
511 u32 reserved;
512 u64 base_address;
513 u32 proximity_domain;
514};
515
516
517
518struct acpi_dmar_andd {
519 struct acpi_dmar_header header;
520 u8 reserved[3];
521 u8 device_number;
522 char device_name[1];
523};
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531
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534
535struct acpi_table_hpet {
536 struct acpi_table_header header;
537 u32 id;
538 struct acpi_generic_address address;
539 u8 sequence;
540 u16 minimum_tick;
541 u8 flags;
542};
543
544
545
546#define ACPI_HPET_PAGE_PROTECT_MASK (3)
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548
549
550enum acpi_hpet_page_protect {
551 ACPI_HPET_NO_PAGE_PROTECT = 0,
552 ACPI_HPET_PAGE_PROTECT4 = 1,
553 ACPI_HPET_PAGE_PROTECT64 = 2
554};
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568
569struct acpi_table_ibft {
570 struct acpi_table_header header;
571 u8 reserved[12];
572};
573
574
575
576struct acpi_ibft_header {
577 u8 type;
578 u8 version;
579 u16 length;
580 u8 index;
581 u8 flags;
582};
583
584
585
586enum acpi_ibft_type {
587 ACPI_IBFT_TYPE_NOT_USED = 0,
588 ACPI_IBFT_TYPE_CONTROL = 1,
589 ACPI_IBFT_TYPE_INITIATOR = 2,
590 ACPI_IBFT_TYPE_NIC = 3,
591 ACPI_IBFT_TYPE_TARGET = 4,
592 ACPI_IBFT_TYPE_EXTENSIONS = 5,
593 ACPI_IBFT_TYPE_RESERVED = 6
594};
595
596
597
598struct acpi_ibft_control {
599 struct acpi_ibft_header header;
600 u16 extensions;
601 u16 initiator_offset;
602 u16 nic0_offset;
603 u16 target0_offset;
604 u16 nic1_offset;
605 u16 target1_offset;
606};
607
608struct acpi_ibft_initiator {
609 struct acpi_ibft_header header;
610 u8 sns_server[16];
611 u8 slp_server[16];
612 u8 primary_server[16];
613 u8 secondary_server[16];
614 u16 name_length;
615 u16 name_offset;
616};
617
618struct acpi_ibft_nic {
619 struct acpi_ibft_header header;
620 u8 ip_address[16];
621 u8 subnet_mask_prefix;
622 u8 origin;
623 u8 gateway[16];
624 u8 primary_dns[16];
625 u8 secondary_dns[16];
626 u8 dhcp[16];
627 u16 vlan;
628 u8 mac_address[6];
629 u16 pci_address;
630 u16 name_length;
631 u16 name_offset;
632};
633
634struct acpi_ibft_target {
635 struct acpi_ibft_header header;
636 u8 target_ip_address[16];
637 u16 target_ip_socket;
638 u8 target_boot_lun[8];
639 u8 chap_type;
640 u8 nic_association;
641 u16 target_name_length;
642 u16 target_name_offset;
643 u16 chap_name_length;
644 u16 chap_name_offset;
645 u16 chap_secret_length;
646 u16 chap_secret_offset;
647 u16 reverse_chap_name_length;
648 u16 reverse_chap_name_offset;
649 u16 reverse_chap_secret_length;
650 u16 reverse_chap_secret_offset;
651};
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661
662struct acpi_table_iort {
663 struct acpi_table_header header;
664 u32 node_count;
665 u32 node_offset;
666 u32 reserved;
667};
668
669
670
671
672struct acpi_iort_node {
673 u8 type;
674 u16 length;
675 u8 revision;
676 u32 reserved;
677 u32 mapping_count;
678 u32 mapping_offset;
679 char node_data[1];
680};
681
682
683
684enum acpi_iort_node_type {
685 ACPI_IORT_NODE_ITS_GROUP = 0x00,
686 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
687 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
688 ACPI_IORT_NODE_SMMU = 0x03
689};
690
691struct acpi_iort_id_mapping {
692 u32 input_base;
693 u32 id_count;
694 u32 output_base;
695 u32 output_reference;
696 u32 flags;
697};
698
699
700
701#define ACPI_IORT_ID_SINGLE_MAPPING (1)
702
703struct acpi_iort_memory_access {
704 u32 cache_coherency;
705 u8 hints;
706 u16 reserved;
707 u8 memory_flags;
708};
709
710
711
712#define ACPI_IORT_NODE_COHERENT 0x00000001
713#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000
714
715
716
717#define ACPI_IORT_HT_TRANSIENT (1)
718#define ACPI_IORT_HT_WRITE (1<<1)
719#define ACPI_IORT_HT_READ (1<<2)
720#define ACPI_IORT_HT_OVERRIDE (1<<3)
721
722
723
724#define ACPI_IORT_MF_COHERENCY (1)
725#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
726
727
728
729
730struct acpi_iort_its_group {
731 u32 its_count;
732 u32 identifiers[1];
733};
734
735struct acpi_iort_named_component {
736 u32 node_flags;
737 u64 memory_properties;
738 u8 memory_address_limit;
739 char device_name[1];
740};
741
742struct acpi_iort_root_complex {
743 u64 memory_properties;
744 u32 ats_attribute;
745 u32 pci_segment_number;
746};
747
748
749
750#define ACPI_IORT_ATS_SUPPORTED 0x00000001
751#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000
752
753struct acpi_iort_smmu {
754 u64 base_address;
755 u64 span;
756 u32 model;
757 u32 flags;
758 u32 global_interrupt_offset;
759 u32 context_interrupt_count;
760 u32 context_interrupt_offset;
761 u32 pmu_interrupt_count;
762 u32 pmu_interrupt_offset;
763 u64 interrupts[1];
764};
765
766
767
768#define ACPI_IORT_SMMU_V1 0x00000000
769#define ACPI_IORT_SMMU_V2 0x00000001
770#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002
771#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003
772
773
774
775#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
776#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
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787
788struct acpi_table_ivrs {
789 struct acpi_table_header header;
790 u32 info;
791 u64 reserved;
792};
793
794
795
796#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00
797#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000
798#define ACPI_IVRS_ATS_RESERVED 0x00400000
799
800
801
802struct acpi_ivrs_header {
803 u8 type;
804 u8 flags;
805 u16 length;
806 u16 device_id;
807};
808
809
810
811enum acpi_ivrs_type {
812 ACPI_IVRS_TYPE_HARDWARE = 0x10,
813 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
814 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
815 ACPI_IVRS_TYPE_MEMORY3 = 0x22
816};
817
818
819
820#define ACPI_IVHD_TT_ENABLE (1)
821#define ACPI_IVHD_PASS_PW (1<<1)
822#define ACPI_IVHD_RES_PASS_PW (1<<2)
823#define ACPI_IVHD_ISOC (1<<3)
824#define ACPI_IVHD_IOTLB (1<<4)
825
826
827
828#define ACPI_IVMD_UNITY (1)
829#define ACPI_IVMD_READ (1<<1)
830#define ACPI_IVMD_WRITE (1<<2)
831#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
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838
839struct acpi_ivrs_hardware {
840 struct acpi_ivrs_header header;
841 u16 capability_offset;
842 u64 base_address;
843 u16 pci_segment_group;
844 u16 info;
845 u32 reserved;
846};
847
848
849
850#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F
851#define ACPI_IVHD_UNIT_ID_MASK 0x1F00
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853
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855
856
857
858
859struct acpi_ivrs_de_header {
860 u8 type;
861 u16 id;
862 u8 data_setting;
863};
864
865
866
867#define ACPI_IVHD_ENTRY_LENGTH 0xC0
868
869
870
871enum acpi_ivrs_device_entry_type {
872
873
874 ACPI_IVRS_TYPE_PAD4 = 0,
875 ACPI_IVRS_TYPE_ALL = 1,
876 ACPI_IVRS_TYPE_SELECT = 2,
877 ACPI_IVRS_TYPE_START = 3,
878 ACPI_IVRS_TYPE_END = 4,
879
880
881
882 ACPI_IVRS_TYPE_PAD8 = 64,
883 ACPI_IVRS_TYPE_NOT_USED = 65,
884 ACPI_IVRS_TYPE_ALIAS_SELECT = 66,
885 ACPI_IVRS_TYPE_ALIAS_START = 67,
886 ACPI_IVRS_TYPE_EXT_SELECT = 70,
887 ACPI_IVRS_TYPE_EXT_START = 71,
888 ACPI_IVRS_TYPE_SPECIAL = 72
889};
890
891
892
893#define ACPI_IVHD_INIT_PASS (1)
894#define ACPI_IVHD_EINT_PASS (1<<1)
895#define ACPI_IVHD_NMI_PASS (1<<2)
896#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
897#define ACPI_IVHD_LINT0_PASS (1<<6)
898#define ACPI_IVHD_LINT1_PASS (1<<7)
899
900
901
902struct acpi_ivrs_device4 {
903 struct acpi_ivrs_de_header header;
904};
905
906
907
908struct acpi_ivrs_device8a {
909 struct acpi_ivrs_de_header header;
910 u8 reserved1;
911 u16 used_id;
912 u8 reserved2;
913};
914
915
916
917struct acpi_ivrs_device8b {
918 struct acpi_ivrs_de_header header;
919 u32 extended_data;
920};
921
922
923
924#define ACPI_IVHD_ATS_DISABLED (1<<31)
925
926
927
928struct acpi_ivrs_device8c {
929 struct acpi_ivrs_de_header header;
930 u8 handle;
931 u16 used_id;
932 u8 variety;
933};
934
935
936
937#define ACPI_IVHD_IOAPIC 1
938#define ACPI_IVHD_HPET 2
939
940
941
942struct acpi_ivrs_memory {
943 struct acpi_ivrs_header header;
944 u16 aux_data;
945 u64 reserved;
946 u64 start_address;
947 u64 memory_length;
948};
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957
958struct acpi_table_lpit {
959 struct acpi_table_header header;
960};
961
962
963
964struct acpi_lpit_header {
965 u32 type;
966 u32 length;
967 u16 unique_id;
968 u16 reserved;
969 u32 flags;
970};
971
972
973
974enum acpi_lpit_type {
975 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
976 ACPI_LPIT_TYPE_RESERVED = 0x01
977};
978
979
980
981#define ACPI_LPIT_STATE_DISABLED (1)
982#define ACPI_LPIT_NO_COUNTER (1<<1)
983
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987
988
989
990struct acpi_lpit_native {
991 struct acpi_lpit_header header;
992 struct acpi_generic_address entry_trigger;
993 u32 residency;
994 u32 latency;
995 struct acpi_generic_address residency_counter;
996 u64 counter_frequency;
997};
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1007
1008struct acpi_table_mcfg {
1009 struct acpi_table_header header;
1010 u8 reserved[8];
1011};
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1014
1015struct acpi_mcfg_allocation {
1016 u64 address;
1017 u16 pci_segment;
1018 u8 start_bus_number;
1019 u8 end_bus_number;
1020 u32 reserved;
1021};
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1024
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1031
1032
1033struct acpi_table_mchi {
1034 struct acpi_table_header header;
1035 u8 interface_type;
1036 u8 protocol;
1037 u64 protocol_data;
1038 u8 interrupt_type;
1039 u8 gpe;
1040 u8 pci_device_flag;
1041 u32 global_interrupt;
1042 struct acpi_generic_address control_register;
1043 u8 pci_segment;
1044 u8 pci_bus;
1045 u8 pci_device;
1046 u8 pci_function;
1047};
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1059
1060struct acpi_table_msdm {
1061 struct acpi_table_header header;
1062};
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1074
1075struct acpi_table_mtmr {
1076 struct acpi_table_header header;
1077};
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1080
1081struct acpi_mtmr_entry {
1082 struct acpi_generic_address physical_address;
1083 u32 frequency;
1084 u32 irq;
1085};
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1098struct acpi_table_slic {
1099 struct acpi_table_header header;
1100};
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1111
1112struct acpi_table_spcr {
1113 struct acpi_table_header header;
1114 u8 interface_type;
1115 u8 reserved[3];
1116 struct acpi_generic_address serial_port;
1117 u8 interrupt_type;
1118 u8 pc_interrupt;
1119 u32 interrupt;
1120 u8 baud_rate;
1121 u8 parity;
1122 u8 stop_bits;
1123 u8 flow_control;
1124 u8 terminal_type;
1125 u8 reserved1;
1126 u16 pci_device_id;
1127 u16 pci_vendor_id;
1128 u8 pci_bus;
1129 u8 pci_device;
1130 u8 pci_function;
1131 u32 pci_flags;
1132 u8 pci_segment;
1133 u32 reserved2;
1134};
1135
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1137
1138#define ACPI_SPCR_DO_NOT_DISABLE (1)
1139
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1151struct acpi_table_spmi {
1152 struct acpi_table_header header;
1153 u8 interface_type;
1154 u8 reserved;
1155 u16 spec_revision;
1156 u8 interrupt_type;
1157 u8 gpe_number;
1158 u8 reserved1;
1159 u8 pci_device_flag;
1160 u32 interrupt;
1161 struct acpi_generic_address ipmi_register;
1162 u8 pci_segment;
1163 u8 pci_bus;
1164 u8 pci_device;
1165 u8 pci_function;
1166 u8 reserved2;
1167};
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1169
1170
1171enum acpi_spmi_interface_types {
1172 ACPI_SPMI_NOT_USED = 0,
1173 ACPI_SPMI_KEYBOARD = 1,
1174 ACPI_SPMI_SMI = 2,
1175 ACPI_SPMI_BLOCK_TRANSFER = 3,
1176 ACPI_SPMI_SMBUS = 4,
1177 ACPI_SPMI_RESERVED = 5
1178};
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1194struct acpi_table_tcpa_hdr {
1195 struct acpi_table_header header;
1196 u16 platform_class;
1197};
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1203#define ACPI_TCPA_CLIENT_TABLE 0
1204#define ACPI_TCPA_SERVER_TABLE 1
1205
1206struct acpi_table_tcpa_client {
1207 u32 minimum_log_length;
1208 u64 log_address;
1209};
1210
1211struct acpi_table_tcpa_server {
1212 u16 reserved;
1213 u64 minimum_log_length;
1214 u64 log_address;
1215 u16 spec_revision;
1216 u8 device_flags;
1217 u8 interrupt_flags;
1218 u8 gpe_number;
1219 u8 reserved2[3];
1220 u32 global_interrupt;
1221 struct acpi_generic_address address;
1222 u32 reserved3;
1223 struct acpi_generic_address config_address;
1224 u8 group;
1225 u8 bus;
1226 u8 device;
1227 u8 function;
1228};
1229
1230
1231
1232#define ACPI_TCPA_PCI_DEVICE (1)
1233#define ACPI_TCPA_BUS_PNP (1<<1)
1234#define ACPI_TCPA_ADDRESS_VALID (1<<2)
1235
1236
1237
1238#define ACPI_TCPA_INTERRUPT_MODE (1)
1239#define ACPI_TCPA_INTERRUPT_POLARITY (1<<1)
1240#define ACPI_TCPA_SCI_VIA_GPE (1<<2)
1241#define ACPI_TCPA_GLOBAL_INTERRUPT (1<<3)
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1253struct acpi_table_tpm2 {
1254 struct acpi_table_header header;
1255 u16 platform_class;
1256 u16 reserved;
1257 u64 control_address;
1258 u32 start_method;
1259
1260
1261};
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1265#define ACPI_TPM2_NOT_ALLOWED 0
1266#define ACPI_TPM2_START_METHOD 2
1267#define ACPI_TPM2_MEMORY_MAPPED 6
1268#define ACPI_TPM2_COMMAND_BUFFER 7
1269#define ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD 8
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1281struct acpi_table_uefi {
1282 struct acpi_table_header header;
1283 u8 identifier[16];
1284 u16 data_offset;
1285};
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1298struct acpi_table_vrtc {
1299 struct acpi_table_header header;
1300};
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1304struct acpi_vrtc_entry {
1305 struct acpi_generic_address physical_address;
1306 u32 irq;
1307};
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1318struct acpi_table_waet {
1319 struct acpi_table_header header;
1320 u32 flags;
1321};
1322
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1325#define ACPI_WAET_RTC_NO_ACK (1)
1326#define ACPI_WAET_TIMER_ONE_READ (1<<1)
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1338struct acpi_table_wdat {
1339 struct acpi_table_header header;
1340 u32 header_length;
1341 u16 pci_segment;
1342 u8 pci_bus;
1343 u8 pci_device;
1344 u8 pci_function;
1345 u8 reserved[3];
1346 u32 timer_period;
1347 u32 max_count;
1348 u32 min_count;
1349 u8 flags;
1350 u8 reserved2[3];
1351 u32 entries;
1352};
1353
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1355
1356#define ACPI_WDAT_ENABLED (1)
1357#define ACPI_WDAT_STOPPED 0x80
1358
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1360
1361struct acpi_wdat_entry {
1362 u8 action;
1363 u8 instruction;
1364 u16 reserved;
1365 struct acpi_generic_address register_region;
1366 u32 value;
1367 u32 mask;
1368};
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1371
1372enum acpi_wdat_actions {
1373 ACPI_WDAT_RESET = 1,
1374 ACPI_WDAT_GET_CURRENT_COUNTDOWN = 4,
1375 ACPI_WDAT_GET_COUNTDOWN = 5,
1376 ACPI_WDAT_SET_COUNTDOWN = 6,
1377 ACPI_WDAT_GET_RUNNING_STATE = 8,
1378 ACPI_WDAT_SET_RUNNING_STATE = 9,
1379 ACPI_WDAT_GET_STOPPED_STATE = 10,
1380 ACPI_WDAT_SET_STOPPED_STATE = 11,
1381 ACPI_WDAT_GET_REBOOT = 16,
1382 ACPI_WDAT_SET_REBOOT = 17,
1383 ACPI_WDAT_GET_SHUTDOWN = 18,
1384 ACPI_WDAT_SET_SHUTDOWN = 19,
1385 ACPI_WDAT_GET_STATUS = 32,
1386 ACPI_WDAT_SET_STATUS = 33,
1387 ACPI_WDAT_ACTION_RESERVED = 34
1388};
1389
1390
1391
1392enum acpi_wdat_instructions {
1393 ACPI_WDAT_READ_VALUE = 0,
1394 ACPI_WDAT_READ_COUNTDOWN = 1,
1395 ACPI_WDAT_WRITE_VALUE = 2,
1396 ACPI_WDAT_WRITE_COUNTDOWN = 3,
1397 ACPI_WDAT_INSTRUCTION_RESERVED = 4,
1398 ACPI_WDAT_PRESERVE_REGISTER = 0x80
1399};
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1411struct acpi_table_wddt {
1412 struct acpi_table_header header;
1413 u16 spec_version;
1414 u16 table_version;
1415 u16 pci_vendor_id;
1416 struct acpi_generic_address address;
1417 u16 max_count;
1418 u16 min_count;
1419 u16 period;
1420 u16 status;
1421 u16 capability;
1422};
1423
1424
1425
1426#define ACPI_WDDT_AVAILABLE (1)
1427#define ACPI_WDDT_ACTIVE (1<<1)
1428#define ACPI_WDDT_TCO_OS_OWNED (1<<2)
1429#define ACPI_WDDT_USER_RESET (1<<11)
1430#define ACPI_WDDT_WDT_RESET (1<<12)
1431#define ACPI_WDDT_POWER_FAIL (1<<13)
1432#define ACPI_WDDT_UNKNOWN_RESET (1<<14)
1433
1434
1435
1436#define ACPI_WDDT_AUTO_RESET (1)
1437#define ACPI_WDDT_ALERT_SUPPORT (1<<1)
1438
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1449struct acpi_table_wdrt {
1450 struct acpi_table_header header;
1451 struct acpi_generic_address control_register;
1452 struct acpi_generic_address count_register;
1453 u16 pci_device_id;
1454 u16 pci_vendor_id;
1455 u8 pci_bus;
1456 u8 pci_device;
1457 u8 pci_function;
1458 u8 pci_segment;
1459 u16 max_count;
1460 u8 units;
1461};
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1464
1465#pragma pack()
1466
1467#endif
1468