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23#include <linux/clocksource.h>
24#include <linux/delay.h>
25#include <linux/interrupt.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pm_runtime.h>
29#include <linux/slab.h>
30#include <sound/core.h>
31#include <sound/initval.h>
32#include "hda_controller.h"
33
34#define CREATE_TRACE_POINTS
35#include "hda_controller_trace.h"
36
37
38#define dsp_lock(dev) snd_hdac_dsp_lock(azx_stream(dev))
39#define dsp_unlock(dev) snd_hdac_dsp_unlock(azx_stream(dev))
40#define dsp_is_locked(dev) snd_hdac_stream_is_locked(azx_stream(dev))
41
42
43static inline struct azx_dev *
44azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream)
45{
46 struct hdac_stream *s;
47
48 s = snd_hdac_stream_assign(azx_bus(chip), substream);
49 if (!s)
50 return NULL;
51 return stream_to_azx_dev(s);
52}
53
54
55static inline void azx_release_device(struct azx_dev *azx_dev)
56{
57 snd_hdac_stream_release(azx_stream(azx_dev));
58}
59
60static inline struct hda_pcm_stream *
61to_hda_pcm_stream(struct snd_pcm_substream *substream)
62{
63 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
64 return &apcm->info->stream[substream->stream];
65}
66
67static u64 azx_adjust_codec_delay(struct snd_pcm_substream *substream,
68 u64 nsec)
69{
70 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
71 struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
72 u64 codec_frames, codec_nsecs;
73
74 if (!hinfo->ops.get_delay)
75 return nsec;
76
77 codec_frames = hinfo->ops.get_delay(hinfo, apcm->codec, substream);
78 codec_nsecs = div_u64(codec_frames * 1000000000LL,
79 substream->runtime->rate);
80
81 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
82 return nsec + codec_nsecs;
83
84 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
85}
86
87
88
89
90
91static int azx_pcm_close(struct snd_pcm_substream *substream)
92{
93 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
94 struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
95 struct azx *chip = apcm->chip;
96 struct azx_dev *azx_dev = get_azx_dev(substream);
97
98 trace_azx_pcm_close(chip, azx_dev);
99 mutex_lock(&chip->open_mutex);
100 azx_release_device(azx_dev);
101 if (hinfo->ops.close)
102 hinfo->ops.close(hinfo, apcm->codec, substream);
103 snd_hda_power_down(apcm->codec);
104 mutex_unlock(&chip->open_mutex);
105 snd_hda_codec_pcm_put(apcm->info);
106 return 0;
107}
108
109static int azx_pcm_hw_params(struct snd_pcm_substream *substream,
110 struct snd_pcm_hw_params *hw_params)
111{
112 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
113 struct azx *chip = apcm->chip;
114 struct azx_dev *azx_dev = get_azx_dev(substream);
115 int ret;
116
117 trace_azx_pcm_hw_params(chip, azx_dev);
118 dsp_lock(azx_dev);
119 if (dsp_is_locked(azx_dev)) {
120 ret = -EBUSY;
121 goto unlock;
122 }
123
124 azx_dev->core.bufsize = 0;
125 azx_dev->core.period_bytes = 0;
126 azx_dev->core.format_val = 0;
127 ret = chip->ops->substream_alloc_pages(chip, substream,
128 params_buffer_bytes(hw_params));
129unlock:
130 dsp_unlock(azx_dev);
131 return ret;
132}
133
134static int azx_pcm_hw_free(struct snd_pcm_substream *substream)
135{
136 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
137 struct azx_dev *azx_dev = get_azx_dev(substream);
138 struct azx *chip = apcm->chip;
139 struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
140 int err;
141
142
143 dsp_lock(azx_dev);
144 if (!dsp_is_locked(azx_dev))
145 snd_hdac_stream_cleanup(azx_stream(azx_dev));
146
147 snd_hda_codec_cleanup(apcm->codec, hinfo, substream);
148
149 err = chip->ops->substream_free_pages(chip, substream);
150 azx_stream(azx_dev)->prepared = 0;
151 dsp_unlock(azx_dev);
152 return err;
153}
154
155static int azx_pcm_prepare(struct snd_pcm_substream *substream)
156{
157 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
158 struct azx *chip = apcm->chip;
159 struct azx_dev *azx_dev = get_azx_dev(substream);
160 struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
161 struct snd_pcm_runtime *runtime = substream->runtime;
162 unsigned int format_val, stream_tag;
163 int err;
164 struct hda_spdif_out *spdif =
165 snd_hda_spdif_out_of_nid(apcm->codec, hinfo->nid);
166 unsigned short ctls = spdif ? spdif->ctls : 0;
167
168 trace_azx_pcm_prepare(chip, azx_dev);
169 dsp_lock(azx_dev);
170 if (dsp_is_locked(azx_dev)) {
171 err = -EBUSY;
172 goto unlock;
173 }
174
175 snd_hdac_stream_reset(azx_stream(azx_dev));
176 format_val = snd_hdac_calc_stream_format(runtime->rate,
177 runtime->channels,
178 runtime->format,
179 hinfo->maxbps,
180 ctls);
181 if (!format_val) {
182 dev_err(chip->card->dev,
183 "invalid format_val, rate=%d, ch=%d, format=%d\n",
184 runtime->rate, runtime->channels, runtime->format);
185 err = -EINVAL;
186 goto unlock;
187 }
188
189 err = snd_hdac_stream_set_params(azx_stream(azx_dev), format_val);
190 if (err < 0)
191 goto unlock;
192
193 snd_hdac_stream_setup(azx_stream(azx_dev));
194
195 stream_tag = azx_dev->core.stream_tag;
196
197 if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) &&
198 stream_tag > chip->capture_streams)
199 stream_tag -= chip->capture_streams;
200 err = snd_hda_codec_prepare(apcm->codec, hinfo, stream_tag,
201 azx_dev->core.format_val, substream);
202
203 unlock:
204 if (!err)
205 azx_stream(azx_dev)->prepared = 1;
206 dsp_unlock(azx_dev);
207 return err;
208}
209
210static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
211{
212 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
213 struct azx *chip = apcm->chip;
214 struct hdac_bus *bus = azx_bus(chip);
215 struct azx_dev *azx_dev;
216 struct snd_pcm_substream *s;
217 struct hdac_stream *hstr;
218 bool start;
219 int sbits = 0;
220 int sync_reg;
221
222 azx_dev = get_azx_dev(substream);
223 trace_azx_pcm_trigger(chip, azx_dev, cmd);
224
225 hstr = azx_stream(azx_dev);
226 if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC)
227 sync_reg = AZX_REG_OLD_SSYNC;
228 else
229 sync_reg = AZX_REG_SSYNC;
230
231 if (dsp_is_locked(azx_dev) || !hstr->prepared)
232 return -EPIPE;
233
234 switch (cmd) {
235 case SNDRV_PCM_TRIGGER_START:
236 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
237 case SNDRV_PCM_TRIGGER_RESUME:
238 start = true;
239 break;
240 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
241 case SNDRV_PCM_TRIGGER_SUSPEND:
242 case SNDRV_PCM_TRIGGER_STOP:
243 start = false;
244 break;
245 default:
246 return -EINVAL;
247 }
248
249 snd_pcm_group_for_each_entry(s, substream) {
250 if (s->pcm->card != substream->pcm->card)
251 continue;
252 azx_dev = get_azx_dev(s);
253 sbits |= 1 << azx_dev->core.index;
254 snd_pcm_trigger_done(s, substream);
255 }
256
257 spin_lock(&bus->reg_lock);
258
259
260 snd_hdac_stream_sync_trigger(hstr, true, sbits, sync_reg);
261
262 snd_pcm_group_for_each_entry(s, substream) {
263 if (s->pcm->card != substream->pcm->card)
264 continue;
265 azx_dev = get_azx_dev(s);
266 if (start) {
267 azx_dev->insufficient = 1;
268 snd_hdac_stream_start(azx_stream(azx_dev), true);
269 } else {
270 snd_hdac_stream_stop(azx_stream(azx_dev));
271 }
272 }
273 spin_unlock(&bus->reg_lock);
274
275 snd_hdac_stream_sync(hstr, start, sbits);
276
277 spin_lock(&bus->reg_lock);
278
279 snd_hdac_stream_sync_trigger(hstr, false, sbits, sync_reg);
280 if (start)
281 snd_hdac_stream_timecounter_init(hstr, sbits);
282 spin_unlock(&bus->reg_lock);
283 return 0;
284}
285
286unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev)
287{
288 return snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
289}
290EXPORT_SYMBOL_GPL(azx_get_pos_lpib);
291
292unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev)
293{
294 return snd_hdac_stream_get_pos_posbuf(azx_stream(azx_dev));
295}
296EXPORT_SYMBOL_GPL(azx_get_pos_posbuf);
297
298unsigned int azx_get_position(struct azx *chip,
299 struct azx_dev *azx_dev)
300{
301 struct snd_pcm_substream *substream = azx_dev->core.substream;
302 unsigned int pos;
303 int stream = substream->stream;
304 int delay = 0;
305
306 if (chip->get_position[stream])
307 pos = chip->get_position[stream](chip, azx_dev);
308 else
309 pos = azx_get_pos_posbuf(chip, azx_dev);
310
311 if (pos >= azx_dev->core.bufsize)
312 pos = 0;
313
314 if (substream->runtime) {
315 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
316 struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
317
318 if (chip->get_delay[stream])
319 delay += chip->get_delay[stream](chip, azx_dev, pos);
320 if (hinfo->ops.get_delay)
321 delay += hinfo->ops.get_delay(hinfo, apcm->codec,
322 substream);
323 substream->runtime->delay = delay;
324 }
325
326 trace_azx_get_position(chip, azx_dev, pos, delay);
327 return pos;
328}
329EXPORT_SYMBOL_GPL(azx_get_position);
330
331static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream)
332{
333 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
334 struct azx *chip = apcm->chip;
335 struct azx_dev *azx_dev = get_azx_dev(substream);
336 return bytes_to_frames(substream->runtime,
337 azx_get_position(chip, azx_dev));
338}
339
340static int azx_get_time_info(struct snd_pcm_substream *substream,
341 struct timespec *system_ts, struct timespec *audio_ts,
342 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
343 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
344{
345 struct azx_dev *azx_dev = get_azx_dev(substream);
346 u64 nsec;
347
348 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
349 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
350
351 snd_pcm_gettime(substream->runtime, system_ts);
352
353 nsec = timecounter_read(&azx_dev->core.tc);
354 nsec = div_u64(nsec, 3);
355 if (audio_tstamp_config->report_delay)
356 nsec = azx_adjust_codec_delay(substream, nsec);
357
358 *audio_ts = ns_to_timespec(nsec);
359
360 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
361 audio_tstamp_report->accuracy_report = 1;
362 audio_tstamp_report->accuracy = 42;
363
364 } else
365 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
366
367 return 0;
368}
369
370static struct snd_pcm_hardware azx_pcm_hw = {
371 .info = (SNDRV_PCM_INFO_MMAP |
372 SNDRV_PCM_INFO_INTERLEAVED |
373 SNDRV_PCM_INFO_BLOCK_TRANSFER |
374 SNDRV_PCM_INFO_MMAP_VALID |
375
376
377 SNDRV_PCM_INFO_PAUSE |
378 SNDRV_PCM_INFO_SYNC_START |
379 SNDRV_PCM_INFO_HAS_WALL_CLOCK |
380 SNDRV_PCM_INFO_HAS_LINK_ATIME |
381 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
382 .formats = SNDRV_PCM_FMTBIT_S16_LE,
383 .rates = SNDRV_PCM_RATE_48000,
384 .rate_min = 48000,
385 .rate_max = 48000,
386 .channels_min = 2,
387 .channels_max = 2,
388 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
389 .period_bytes_min = 128,
390 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
391 .periods_min = 2,
392 .periods_max = AZX_MAX_FRAG,
393 .fifo_size = 0,
394};
395
396static int azx_pcm_open(struct snd_pcm_substream *substream)
397{
398 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
399 struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
400 struct azx *chip = apcm->chip;
401 struct azx_dev *azx_dev;
402 struct snd_pcm_runtime *runtime = substream->runtime;
403 int err;
404 int buff_step;
405
406 snd_hda_codec_pcm_get(apcm->info);
407 mutex_lock(&chip->open_mutex);
408 azx_dev = azx_assign_device(chip, substream);
409 trace_azx_pcm_open(chip, azx_dev);
410 if (azx_dev == NULL) {
411 err = -EBUSY;
412 goto unlock;
413 }
414 runtime->private_data = azx_dev;
415 runtime->hw = azx_pcm_hw;
416 runtime->hw.channels_min = hinfo->channels_min;
417 runtime->hw.channels_max = hinfo->channels_max;
418 runtime->hw.formats = hinfo->formats;
419 runtime->hw.rates = hinfo->rates;
420 snd_pcm_limit_hw_rates(runtime);
421 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
422
423
424 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
425 20,
426 178000000);
427
428 if (chip->align_buffer_size)
429
430
431
432
433
434
435 buff_step = 128;
436 else
437
438
439
440
441 buff_step = 4;
442
443 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
444 buff_step);
445 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
446 buff_step);
447 snd_hda_power_up(apcm->codec);
448 if (hinfo->ops.open)
449 err = hinfo->ops.open(hinfo, apcm->codec, substream);
450 else
451 err = -ENODEV;
452 if (err < 0) {
453 azx_release_device(azx_dev);
454 goto powerdown;
455 }
456 snd_pcm_limit_hw_rates(runtime);
457
458 if (snd_BUG_ON(!runtime->hw.channels_min) ||
459 snd_BUG_ON(!runtime->hw.channels_max) ||
460 snd_BUG_ON(!runtime->hw.formats) ||
461 snd_BUG_ON(!runtime->hw.rates)) {
462 azx_release_device(azx_dev);
463 if (hinfo->ops.close)
464 hinfo->ops.close(hinfo, apcm->codec, substream);
465 err = -EINVAL;
466 goto powerdown;
467 }
468
469
470
471 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
472 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK;
473 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
474 }
475
476 snd_pcm_set_sync(substream);
477 mutex_unlock(&chip->open_mutex);
478 return 0;
479
480 powerdown:
481 snd_hda_power_down(apcm->codec);
482 unlock:
483 mutex_unlock(&chip->open_mutex);
484 snd_hda_codec_pcm_put(apcm->info);
485 return err;
486}
487
488static int azx_pcm_mmap(struct snd_pcm_substream *substream,
489 struct vm_area_struct *area)
490{
491 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
492 struct azx *chip = apcm->chip;
493 if (chip->ops->pcm_mmap_prepare)
494 chip->ops->pcm_mmap_prepare(substream, area);
495 return snd_pcm_lib_default_mmap(substream, area);
496}
497
498static struct snd_pcm_ops azx_pcm_ops = {
499 .open = azx_pcm_open,
500 .close = azx_pcm_close,
501 .ioctl = snd_pcm_lib_ioctl,
502 .hw_params = azx_pcm_hw_params,
503 .hw_free = azx_pcm_hw_free,
504 .prepare = azx_pcm_prepare,
505 .trigger = azx_pcm_trigger,
506 .pointer = azx_pcm_pointer,
507 .get_time_info = azx_get_time_info,
508 .mmap = azx_pcm_mmap,
509 .page = snd_pcm_sgbuf_ops_page,
510};
511
512static void azx_pcm_free(struct snd_pcm *pcm)
513{
514 struct azx_pcm *apcm = pcm->private_data;
515 if (apcm) {
516 list_del(&apcm->list);
517 apcm->info->pcm = NULL;
518 kfree(apcm);
519 }
520}
521
522#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
523
524int snd_hda_attach_pcm_stream(struct hda_bus *_bus, struct hda_codec *codec,
525 struct hda_pcm *cpcm)
526{
527 struct hdac_bus *bus = &_bus->core;
528 struct azx *chip = bus_to_azx(bus);
529 struct snd_pcm *pcm;
530 struct azx_pcm *apcm;
531 int pcm_dev = cpcm->device;
532 unsigned int size;
533 int s, err;
534
535 list_for_each_entry(apcm, &chip->pcm_list, list) {
536 if (apcm->pcm->device == pcm_dev) {
537 dev_err(chip->card->dev, "PCM %d already exists\n",
538 pcm_dev);
539 return -EBUSY;
540 }
541 }
542 err = snd_pcm_new(chip->card, cpcm->name, pcm_dev,
543 cpcm->stream[SNDRV_PCM_STREAM_PLAYBACK].substreams,
544 cpcm->stream[SNDRV_PCM_STREAM_CAPTURE].substreams,
545 &pcm);
546 if (err < 0)
547 return err;
548 strlcpy(pcm->name, cpcm->name, sizeof(pcm->name));
549 apcm = kzalloc(sizeof(*apcm), GFP_KERNEL);
550 if (apcm == NULL)
551 return -ENOMEM;
552 apcm->chip = chip;
553 apcm->pcm = pcm;
554 apcm->codec = codec;
555 apcm->info = cpcm;
556 pcm->private_data = apcm;
557 pcm->private_free = azx_pcm_free;
558 if (cpcm->pcm_type == HDA_PCM_TYPE_MODEM)
559 pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
560 list_add_tail(&apcm->list, &chip->pcm_list);
561 cpcm->pcm = pcm;
562 for (s = 0; s < 2; s++) {
563 if (cpcm->stream[s].substreams)
564 snd_pcm_set_ops(pcm, s, &azx_pcm_ops);
565 }
566
567 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
568 if (size > MAX_PREALLOC_SIZE)
569 size = MAX_PREALLOC_SIZE;
570 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
571 chip->card->dev,
572 size, MAX_PREALLOC_SIZE);
573 return 0;
574}
575
576static unsigned int azx_command_addr(u32 cmd)
577{
578 unsigned int addr = cmd >> 28;
579
580 if (addr >= AZX_MAX_CODECS) {
581 snd_BUG();
582 addr = 0;
583 }
584
585 return addr;
586}
587
588
589static int azx_rirb_get_response(struct hdac_bus *bus, unsigned int addr,
590 unsigned int *res)
591{
592 struct azx *chip = bus_to_azx(bus);
593 struct hda_bus *hbus = &chip->bus;
594 unsigned long timeout;
595 unsigned long loopcounter;
596 int do_poll = 0;
597
598 again:
599 timeout = jiffies + msecs_to_jiffies(1000);
600
601 for (loopcounter = 0;; loopcounter++) {
602 spin_lock_irq(&bus->reg_lock);
603 if (chip->polling_mode || do_poll)
604 snd_hdac_bus_update_rirb(bus);
605 if (!bus->rirb.cmds[addr]) {
606 if (!do_poll)
607 chip->poll_count = 0;
608 if (res)
609 *res = bus->rirb.res[addr];
610 spin_unlock_irq(&bus->reg_lock);
611 return 0;
612 }
613 spin_unlock_irq(&bus->reg_lock);
614 if (time_after(jiffies, timeout))
615 break;
616 if (hbus->needs_damn_long_delay || loopcounter > 3000)
617 msleep(2);
618 else {
619 udelay(10);
620 cond_resched();
621 }
622 }
623
624 if (hbus->no_response_fallback)
625 return -EIO;
626
627 if (!chip->polling_mode && chip->poll_count < 2) {
628 dev_dbg(chip->card->dev,
629 "azx_get_response timeout, polling the codec once: last cmd=0x%08x\n",
630 bus->last_cmd[addr]);
631 do_poll = 1;
632 chip->poll_count++;
633 goto again;
634 }
635
636
637 if (!chip->polling_mode) {
638 dev_warn(chip->card->dev,
639 "azx_get_response timeout, switching to polling mode: last cmd=0x%08x\n",
640 bus->last_cmd[addr]);
641 chip->polling_mode = 1;
642 goto again;
643 }
644
645 if (chip->msi) {
646 dev_warn(chip->card->dev,
647 "No response from codec, disabling MSI: last cmd=0x%08x\n",
648 bus->last_cmd[addr]);
649 if (chip->ops->disable_msi_reset_irq &&
650 chip->ops->disable_msi_reset_irq(chip) < 0)
651 return -EIO;
652 goto again;
653 }
654
655 if (chip->probing) {
656
657
658
659
660 return -EIO;
661 }
662
663
664
665
666 if (hbus->allow_bus_reset && !hbus->response_reset && !hbus->in_reset) {
667 hbus->response_reset = 1;
668 return -EAGAIN;
669 }
670
671 dev_err(chip->card->dev,
672 "azx_get_response timeout, switching to single_cmd mode: last cmd=0x%08x\n",
673 bus->last_cmd[addr]);
674 chip->single_cmd = 1;
675 hbus->response_reset = 0;
676 snd_hdac_bus_stop_cmd_io(bus);
677 return -EIO;
678}
679
680
681
682
683
684
685
686
687
688
689
690
691static int azx_single_wait_for_response(struct azx *chip, unsigned int addr)
692{
693 int timeout = 50;
694
695 while (timeout--) {
696
697 if (azx_readw(chip, IRS) & AZX_IRS_VALID) {
698
699 azx_bus(chip)->rirb.res[addr] = azx_readl(chip, IR);
700 return 0;
701 }
702 udelay(1);
703 }
704 if (printk_ratelimit())
705 dev_dbg(chip->card->dev, "get_response timeout: IRS=0x%x\n",
706 azx_readw(chip, IRS));
707 azx_bus(chip)->rirb.res[addr] = -1;
708 return -EIO;
709}
710
711
712static int azx_single_send_cmd(struct hdac_bus *bus, u32 val)
713{
714 struct azx *chip = bus_to_azx(bus);
715 unsigned int addr = azx_command_addr(val);
716 int timeout = 50;
717
718 bus->last_cmd[azx_command_addr(val)] = val;
719 while (timeout--) {
720
721 if (!((azx_readw(chip, IRS) & AZX_IRS_BUSY))) {
722
723 azx_writew(chip, IRS, azx_readw(chip, IRS) |
724 AZX_IRS_VALID);
725 azx_writel(chip, IC, val);
726 azx_writew(chip, IRS, azx_readw(chip, IRS) |
727 AZX_IRS_BUSY);
728 return azx_single_wait_for_response(chip, addr);
729 }
730 udelay(1);
731 }
732 if (printk_ratelimit())
733 dev_dbg(chip->card->dev,
734 "send_cmd timeout: IRS=0x%x, val=0x%x\n",
735 azx_readw(chip, IRS), val);
736 return -EIO;
737}
738
739
740static int azx_single_get_response(struct hdac_bus *bus, unsigned int addr,
741 unsigned int *res)
742{
743 if (res)
744 *res = bus->rirb.res[addr];
745 return 0;
746}
747
748
749
750
751
752
753
754
755
756static int azx_send_cmd(struct hdac_bus *bus, unsigned int val)
757{
758 struct azx *chip = bus_to_azx(bus);
759
760 if (chip->disabled)
761 return 0;
762 if (chip->single_cmd)
763 return azx_single_send_cmd(bus, val);
764 else
765 return snd_hdac_bus_send_cmd(bus, val);
766}
767
768
769static int azx_get_response(struct hdac_bus *bus, unsigned int addr,
770 unsigned int *res)
771{
772 struct azx *chip = bus_to_azx(bus);
773
774 if (chip->disabled)
775 return 0;
776 if (chip->single_cmd)
777 return azx_single_get_response(bus, addr, res);
778 else
779 return azx_rirb_get_response(bus, addr, res);
780}
781
782static int azx_link_power(struct hdac_bus *bus, bool enable)
783{
784 struct azx *chip = bus_to_azx(bus);
785
786 if (chip->ops->link_power)
787 return chip->ops->link_power(chip, enable);
788 else
789 return -EINVAL;
790}
791
792static const struct hdac_bus_ops bus_core_ops = {
793 .command = azx_send_cmd,
794 .get_response = azx_get_response,
795 .link_power = azx_link_power,
796};
797
798#ifdef CONFIG_SND_HDA_DSP_LOADER
799
800
801
802
803
804static struct azx_dev *
805azx_get_dsp_loader_dev(struct azx *chip)
806{
807 struct hdac_bus *bus = azx_bus(chip);
808 struct hdac_stream *s;
809
810 list_for_each_entry(s, &bus->stream_list, list)
811 if (s->index == chip->playback_index_offset)
812 return stream_to_azx_dev(s);
813
814 return NULL;
815}
816
817int snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
818 unsigned int byte_size,
819 struct snd_dma_buffer *bufp)
820{
821 struct hdac_bus *bus = &codec->bus->core;
822 struct azx *chip = bus_to_azx(bus);
823 struct azx_dev *azx_dev;
824 struct hdac_stream *hstr;
825 bool saved = false;
826 int err;
827
828 azx_dev = azx_get_dsp_loader_dev(chip);
829 hstr = azx_stream(azx_dev);
830 spin_lock_irq(&bus->reg_lock);
831 if (hstr->opened) {
832 chip->saved_azx_dev = *azx_dev;
833 saved = true;
834 }
835 spin_unlock_irq(&bus->reg_lock);
836
837 err = snd_hdac_dsp_prepare(hstr, format, byte_size, bufp);
838 if (err < 0) {
839 spin_lock_irq(&bus->reg_lock);
840 if (saved)
841 *azx_dev = chip->saved_azx_dev;
842 spin_unlock_irq(&bus->reg_lock);
843 return err;
844 }
845
846 hstr->prepared = 0;
847 return err;
848}
849EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_prepare);
850
851void snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start)
852{
853 struct hdac_bus *bus = &codec->bus->core;
854 struct azx *chip = bus_to_azx(bus);
855 struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);
856
857 snd_hdac_dsp_trigger(azx_stream(azx_dev), start);
858}
859EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_trigger);
860
861void snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
862 struct snd_dma_buffer *dmab)
863{
864 struct hdac_bus *bus = &codec->bus->core;
865 struct azx *chip = bus_to_azx(bus);
866 struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);
867 struct hdac_stream *hstr = azx_stream(azx_dev);
868
869 if (!dmab->area || !hstr->locked)
870 return;
871
872 snd_hdac_dsp_cleanup(hstr, dmab);
873 spin_lock_irq(&bus->reg_lock);
874 if (hstr->opened)
875 *azx_dev = chip->saved_azx_dev;
876 hstr->locked = false;
877 spin_unlock_irq(&bus->reg_lock);
878}
879EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_cleanup);
880#endif
881
882
883
884
885void azx_init_chip(struct azx *chip, bool full_reset)
886{
887 if (snd_hdac_bus_init_chip(azx_bus(chip), full_reset)) {
888
889 if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
890 azx_writew(chip, RINTCNT, 0xc0);
891 }
892}
893EXPORT_SYMBOL_GPL(azx_init_chip);
894
895void azx_stop_all_streams(struct azx *chip)
896{
897 struct hdac_bus *bus = azx_bus(chip);
898 struct hdac_stream *s;
899
900 list_for_each_entry(s, &bus->stream_list, list)
901 snd_hdac_stream_stop(s);
902}
903EXPORT_SYMBOL_GPL(azx_stop_all_streams);
904
905void azx_stop_chip(struct azx *chip)
906{
907 snd_hdac_bus_stop_chip(azx_bus(chip));
908}
909EXPORT_SYMBOL_GPL(azx_stop_chip);
910
911
912
913
914static void stream_update(struct hdac_bus *bus, struct hdac_stream *s)
915{
916 struct azx *chip = bus_to_azx(bus);
917 struct azx_dev *azx_dev = stream_to_azx_dev(s);
918
919
920 if (!chip->ops->position_check ||
921 chip->ops->position_check(chip, azx_dev)) {
922 spin_unlock(&bus->reg_lock);
923 snd_pcm_period_elapsed(azx_stream(azx_dev)->substream);
924 spin_lock(&bus->reg_lock);
925 }
926}
927
928irqreturn_t azx_interrupt(int irq, void *dev_id)
929{
930 struct azx *chip = dev_id;
931 struct hdac_bus *bus = azx_bus(chip);
932 u32 status;
933 bool active, handled = false;
934 int repeat = 0;
935
936#ifdef CONFIG_PM
937 if (azx_has_pm_runtime(chip))
938 if (!pm_runtime_active(chip->card->dev))
939 return IRQ_NONE;
940#endif
941
942 spin_lock(&bus->reg_lock);
943
944 if (chip->disabled)
945 goto unlock;
946
947 do {
948 status = azx_readl(chip, INTSTS);
949 if (status == 0 || status == 0xffffffff)
950 break;
951
952 handled = true;
953 active = false;
954 if (snd_hdac_bus_handle_stream_irq(bus, status, stream_update))
955 active = true;
956
957
958 status = azx_readb(chip, RIRBSTS);
959 if (status & RIRB_INT_MASK) {
960 active = true;
961 if (status & RIRB_INT_RESPONSE) {
962 if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
963 udelay(80);
964 snd_hdac_bus_update_rirb(bus);
965 }
966 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
967 }
968 } while (active && ++repeat < 10);
969
970 unlock:
971 spin_unlock(&bus->reg_lock);
972
973 return IRQ_RETVAL(handled);
974}
975EXPORT_SYMBOL_GPL(azx_interrupt);
976
977
978
979
980
981
982
983
984static int probe_codec(struct azx *chip, int addr)
985{
986 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
987 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
988 struct hdac_bus *bus = azx_bus(chip);
989 int err;
990 unsigned int res = -1;
991
992 mutex_lock(&bus->cmd_mutex);
993 chip->probing = 1;
994 azx_send_cmd(bus, cmd);
995 err = azx_get_response(bus, addr, &res);
996 chip->probing = 0;
997 mutex_unlock(&bus->cmd_mutex);
998 if (err < 0 || res == -1)
999 return -EIO;
1000 dev_dbg(chip->card->dev, "codec #%d probed OK\n", addr);
1001 return 0;
1002}
1003
1004void snd_hda_bus_reset(struct hda_bus *bus)
1005{
1006 struct azx *chip = bus_to_azx(&bus->core);
1007
1008 bus->in_reset = 1;
1009 azx_stop_chip(chip);
1010 azx_init_chip(chip, true);
1011 if (bus->core.chip_init)
1012 snd_hda_bus_reset_codecs(bus);
1013 bus->in_reset = 0;
1014}
1015
1016static int get_jackpoll_interval(struct azx *chip)
1017{
1018 int i;
1019 unsigned int j;
1020
1021 if (!chip->jackpoll_ms)
1022 return 0;
1023
1024 i = chip->jackpoll_ms[chip->dev_index];
1025 if (i == 0)
1026 return 0;
1027 if (i < 50 || i > 60000)
1028 j = 0;
1029 else
1030 j = msecs_to_jiffies(i);
1031 if (j == 0)
1032 dev_warn(chip->card->dev,
1033 "jackpoll_ms value out of range: %d\n", i);
1034 return j;
1035}
1036
1037
1038int azx_bus_init(struct azx *chip, const char *model,
1039 const struct hdac_io_ops *io_ops)
1040{
1041 struct hda_bus *bus = &chip->bus;
1042 int err;
1043
1044 err = snd_hdac_bus_init(&bus->core, chip->card->dev, &bus_core_ops,
1045 io_ops);
1046 if (err < 0)
1047 return err;
1048
1049 bus->card = chip->card;
1050 mutex_init(&bus->prepare_mutex);
1051 bus->pci = chip->pci;
1052 bus->modelname = model;
1053 bus->mixer_assigned = -1;
1054 bus->core.snoop = azx_snoop(chip);
1055 if (chip->get_position[0] != azx_get_pos_lpib ||
1056 chip->get_position[1] != azx_get_pos_lpib)
1057 bus->core.use_posbuf = true;
1058 bus->core.bdl_pos_adj = chip->bdl_pos_adj;
1059 if (chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)
1060 bus->core.corbrp_self_clear = true;
1061
1062 if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY)
1063 bus->core.align_bdle_4k = true;
1064
1065
1066
1067
1068
1069 if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
1070 dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n");
1071 bus->core.sync_write = 1;
1072 bus->allow_bus_reset = 1;
1073 }
1074
1075 return 0;
1076}
1077EXPORT_SYMBOL_GPL(azx_bus_init);
1078
1079
1080int azx_probe_codecs(struct azx *chip, unsigned int max_slots)
1081{
1082 struct hdac_bus *bus = azx_bus(chip);
1083 int c, codecs, err;
1084
1085 codecs = 0;
1086 if (!max_slots)
1087 max_slots = AZX_DEFAULT_CODECS;
1088
1089
1090 for (c = 0; c < max_slots; c++) {
1091 if ((bus->codec_mask & (1 << c)) & chip->codec_probe_mask) {
1092 if (probe_codec(chip, c) < 0) {
1093
1094
1095
1096 dev_warn(chip->card->dev,
1097 "Codec #%d probe error; disabling it...\n", c);
1098 bus->codec_mask &= ~(1 << c);
1099
1100
1101
1102
1103
1104
1105
1106 azx_stop_chip(chip);
1107 azx_init_chip(chip, true);
1108 }
1109 }
1110 }
1111
1112
1113 for (c = 0; c < max_slots; c++) {
1114 if ((bus->codec_mask & (1 << c)) & chip->codec_probe_mask) {
1115 struct hda_codec *codec;
1116 err = snd_hda_codec_new(&chip->bus, chip->card, c, &codec);
1117 if (err < 0)
1118 continue;
1119 codec->jackpoll_interval = get_jackpoll_interval(chip);
1120 codec->beep_mode = chip->beep_mode;
1121 codecs++;
1122 }
1123 }
1124 if (!codecs) {
1125 dev_err(chip->card->dev, "no codecs initialized\n");
1126 return -ENXIO;
1127 }
1128 return 0;
1129}
1130EXPORT_SYMBOL_GPL(azx_probe_codecs);
1131
1132
1133int azx_codec_configure(struct azx *chip)
1134{
1135 struct hda_codec *codec;
1136 list_for_each_codec(codec, &chip->bus) {
1137 snd_hda_codec_configure(codec);
1138 }
1139 return 0;
1140}
1141EXPORT_SYMBOL_GPL(azx_codec_configure);
1142
1143static int stream_direction(struct azx *chip, unsigned char index)
1144{
1145 if (index >= chip->capture_index_offset &&
1146 index < chip->capture_index_offset + chip->capture_streams)
1147 return SNDRV_PCM_STREAM_CAPTURE;
1148 return SNDRV_PCM_STREAM_PLAYBACK;
1149}
1150
1151
1152int azx_init_streams(struct azx *chip)
1153{
1154 int i;
1155 int stream_tags[2] = { 0, 0 };
1156
1157
1158
1159
1160
1161 for (i = 0; i < chip->num_streams; i++) {
1162 struct azx_dev *azx_dev = kzalloc(sizeof(*azx_dev), GFP_KERNEL);
1163 int dir, tag;
1164
1165 if (!azx_dev)
1166 return -ENOMEM;
1167
1168 dir = stream_direction(chip, i);
1169
1170
1171
1172
1173
1174
1175 if (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG)
1176 tag = ++stream_tags[dir];
1177 else
1178 tag = i + 1;
1179 snd_hdac_stream_init(azx_bus(chip), azx_stream(azx_dev),
1180 i, dir, tag);
1181 }
1182
1183 return 0;
1184}
1185EXPORT_SYMBOL_GPL(azx_init_streams);
1186
1187void azx_free_streams(struct azx *chip)
1188{
1189 struct hdac_bus *bus = azx_bus(chip);
1190 struct hdac_stream *s;
1191
1192 while (!list_empty(&bus->stream_list)) {
1193 s = list_first_entry(&bus->stream_list, struct hdac_stream, list);
1194 list_del(&s->list);
1195 kfree(stream_to_azx_dev(s));
1196 }
1197}
1198EXPORT_SYMBOL_GPL(azx_free_streams);
1199