LXR linux/arch/powerpc/include/asm/pgtable-be-types.h

   1#ifndef _ASM_POWERPC_PGTABLE_BE_TYPES_H
   2#define _ASM_POWERPC_PGTABLE_BE_TYPES_H
   3
   4#include <asm/cmpxchg.h>
   5
   6/* PTE level */
   7typedef struct { __be64 pte; } pte_t;
   8#define __pte(x)        ((pte_t) { cpu_to_be64(x) })
   9static inline unsigned long pte_val(pte_t x)
  10{
  11        return be64_to_cpu(x.pte);
  12}
  13
  14static inline __be64 pte_raw(pte_t x)
  15{
  16        return x.pte;
  17}
  18
  19/* PMD level */
  20#ifdef CONFIG_PPC64
  21typedef struct { __be64 pmd; } pmd_t;
  22#define __pmd(x)        ((pmd_t) { cpu_to_be64(x) })
  23static inline unsigned long pmd_val(pmd_t x)
  24{
  25        return be64_to_cpu(x.pmd);
  26}
  27
  28static inline __be64 pmd_raw(pmd_t x)
  29{
  30        return x.pmd;
  31}
  32
  33/*
  34 * 64 bit hash always use 4 level table. Everybody else use 4 level
  35 * only for 4K page size.
  36 */
  37#if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES)
  38typedef struct { __be64 pud; } pud_t;
  39#define __pud(x)        ((pud_t) { cpu_to_be64(x) })
  40static inline unsigned long pud_val(pud_t x)
  41{
  42        return be64_to_cpu(x.pud);
  43}
  44#endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */
  45#endif /* CONFIG_PPC64 */
  46
  47/* PGD level */
  48typedef struct { __be64 pgd; } pgd_t;
  49#define __pgd(x)        ((pgd_t) { cpu_to_be64(x) })
  50static inline unsigned long pgd_val(pgd_t x)
  51{
  52        return be64_to_cpu(x.pgd);
  53}
  54
  55/* Page protection bits */
  56typedef struct { unsigned long pgprot; } pgprot_t;
  57#define pgprot_val(x)   ((x).pgprot)
  58#define __pgprot(x)     ((pgprot_t) { (x) })
  59
  60/*
  61 * With hash config 64k pages additionally define a bigger "real PTE" type that
  62 * gathers the "second half" part of the PTE for pseudo 64k pages
  63 */
  64#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)
  65typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
  66#else
  67typedef struct { pte_t pte; } real_pte_t;
  68#endif
  69
  70static inline bool pte_xchg(pte_t *ptep, pte_t old, pte_t new)
  71{
  72        unsigned long *p = (unsigned long *)ptep;
  73        __be64 prev;
  74
  75        prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pte_raw(old),
  76                                             (__force unsigned long)pte_raw(new));
  77
  78        return pte_raw(old) == prev;
  79}
  80
  81static inline bool pmd_xchg(pmd_t *pmdp, pmd_t old, pmd_t new)
  82{
  83        unsigned long *p = (unsigned long *)pmdp;
  84        __be64 prev;
  85
  86        prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pmd_raw(old),
  87                                             (__force unsigned long)pmd_raw(new));
  88
  89        return pmd_raw(old) == prev;
  90}
  91
  92#endif /* _ASM_POWERPC_PGTABLE_BE_TYPES_H */
  93