1/* 2 * Copyright(c) 2015, 2016 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47#ifndef _HFI1_MAD_H 48#define _HFI1_MAD_H 49 50#include <rdma/ib_pma.h> 51#define USE_PI_LED_ENABLE 1 /* 52 * use led enabled bit in struct 53 * opa_port_states, if available 54 */ 55#include <rdma/opa_smi.h> 56#include <rdma/opa_port_info.h> 57#ifndef PI_LED_ENABLE_SUP 58#define PI_LED_ENABLE_SUP 0 59#endif 60#include "opa_compat.h" 61 62/* 63 * OPA Traps 64 */ 65#define OPA_TRAP_GID_NOW_IN_SERVICE cpu_to_be16(64) 66#define OPA_TRAP_GID_OUT_OF_SERVICE cpu_to_be16(65) 67#define OPA_TRAP_ADD_MULTICAST_GROUP cpu_to_be16(66) 68#define OPA_TRAL_DEL_MULTICAST_GROUP cpu_to_be16(67) 69#define OPA_TRAP_UNPATH cpu_to_be16(68) 70#define OPA_TRAP_REPATH cpu_to_be16(69) 71#define OPA_TRAP_PORT_CHANGE_STATE cpu_to_be16(128) 72#define OPA_TRAP_LINK_INTEGRITY cpu_to_be16(129) 73#define OPA_TRAP_EXCESSIVE_BUFFER_OVERRUN cpu_to_be16(130) 74#define OPA_TRAP_FLOW_WATCHDOG cpu_to_be16(131) 75#define OPA_TRAP_CHANGE_CAPABILITY cpu_to_be16(144) 76#define OPA_TRAP_CHANGE_SYSGUID cpu_to_be16(145) 77#define OPA_TRAP_BAD_M_KEY cpu_to_be16(256) 78#define OPA_TRAP_BAD_P_KEY cpu_to_be16(257) 79#define OPA_TRAP_BAD_Q_KEY cpu_to_be16(258) 80#define OPA_TRAP_SWITCH_BAD_PKEY cpu_to_be16(259) 81#define OPA_SMA_TRAP_DATA_LINK_WIDTH cpu_to_be16(2048) 82 83/* 84 * Generic trap/notice other local changes flags (trap 144). 85 */ 86#define OPA_NOTICE_TRAP_LWDE_CHG 0x08 /* Link Width Downgrade Enable 87 * changed 88 */ 89#define OPA_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */ 90#define OPA_NOTICE_TRAP_LWE_CHG 0x02 /* Link Width Enable changed */ 91#define OPA_NOTICE_TRAP_NODE_DESC_CHG 0x01 92 93struct opa_mad_notice_attr { 94 u8 generic_type; 95 u8 prod_type_msb; 96 __be16 prod_type_lsb; 97 __be16 trap_num; 98 __be16 toggle_count; 99 __be32 issuer_lid; 100 __be32 reserved1; 101 union ib_gid issuer_gid; 102 103 union { 104 struct { 105 u8 details[64]; 106 } raw_data; 107 108 struct { 109 union ib_gid gid; 110 } __packed ntc_64_65_66_67; 111 112 struct { 113 __be32 lid; 114 } __packed ntc_128; 115 116 struct { 117 __be32 lid; /* where violation happened */ 118 u8 port_num; /* where violation happened */ 119 } __packed ntc_129_130_131; 120 121 struct { 122 __be32 lid; /* LID where change occurred */ 123 __be32 new_cap_mask; /* new capability mask */ 124 __be16 reserved2; 125 __be16 cap_mask; 126 __be16 change_flags; /* low 4 bits only */ 127 } __packed ntc_144; 128 129 struct { 130 __be64 new_sys_guid; 131 __be32 lid; /* lid where sys guid changed */ 132 } __packed ntc_145; 133 134 struct { 135 __be32 lid; 136 __be32 dr_slid; 137 u8 method; 138 u8 dr_trunc_hop; 139 __be16 attr_id; 140 __be32 attr_mod; 141 __be64 mkey; 142 u8 dr_rtn_path[30]; 143 } __packed ntc_256; 144 145 struct { 146 __be32 lid1; 147 __be32 lid2; 148 __be32 key; 149 u8 sl; /* SL: high 5 bits */ 150 u8 reserved3[3]; 151 union ib_gid gid1; 152 union ib_gid gid2; 153 __be32 qp1; /* high 8 bits reserved */ 154 __be32 qp2; /* high 8 bits reserved */ 155 } __packed ntc_257_258; 156 157 struct { 158 __be16 flags; /* low 8 bits reserved */ 159 __be16 pkey; 160 __be32 lid1; 161 __be32 lid2; 162 u8 sl; /* SL: high 5 bits */ 163 u8 reserved4[3]; 164 union ib_gid gid1; 165 union ib_gid gid2; 166 __be32 qp1; /* high 8 bits reserved */ 167 __be32 qp2; /* high 8 bits reserved */ 168 } __packed ntc_259; 169 170 struct { 171 __be32 lid; 172 } __packed ntc_2048; 173 174 }; 175 u8 class_data[0]; 176}; 177 178#define IB_VLARB_LOWPRI_0_31 1 179#define IB_VLARB_LOWPRI_32_63 2 180#define IB_VLARB_HIGHPRI_0_31 3 181#define IB_VLARB_HIGHPRI_32_63 4 182 183#define OPA_MAX_PREEMPT_CAP 32 184#define OPA_VLARB_LOW_ELEMENTS 0 185#define OPA_VLARB_HIGH_ELEMENTS 1 186#define OPA_VLARB_PREEMPT_ELEMENTS 2 187#define OPA_VLARB_PREEMPT_MATRIX 3 188 189#define IB_PMA_PORT_COUNTERS_CONG cpu_to_be16(0xFF00) 190 191struct ib_pma_portcounters_cong { 192 u8 reserved; 193 u8 reserved1; 194 __be16 port_check_rate; 195 __be16 symbol_error_counter; 196 u8 link_error_recovery_counter; 197 u8 link_downed_counter; 198 __be16 port_rcv_errors; 199 __be16 port_rcv_remphys_errors; 200 __be16 port_rcv_switch_relay_errors; 201 __be16 port_xmit_discards; 202 u8 port_xmit_constraint_errors; 203 u8 port_rcv_constraint_errors; 204 u8 reserved2; 205 u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */ 206 __be16 reserved3; 207 __be16 vl15_dropped; 208 __be64 port_xmit_data; 209 __be64 port_rcv_data; 210 __be64 port_xmit_packets; 211 __be64 port_rcv_packets; 212 __be64 port_xmit_wait; 213 __be64 port_adr_events; 214} __packed; 215 216#define IB_SMP_UNSUP_VERSION cpu_to_be16(0x0004) 217#define IB_SMP_UNSUP_METHOD cpu_to_be16(0x0008) 218#define IB_SMP_UNSUP_METH_ATTR cpu_to_be16(0x000C) 219#define IB_SMP_INVALID_FIELD cpu_to_be16(0x001C) 220 221#define OPA_MAX_PREEMPT_CAP 32 222#define OPA_VLARB_LOW_ELEMENTS 0 223#define OPA_VLARB_HIGH_ELEMENTS 1 224#define OPA_VLARB_PREEMPT_ELEMENTS 2 225#define OPA_VLARB_PREEMPT_MATRIX 3 226 227#define HFI1_XMIT_RATE_UNSUPPORTED 0x0 228#define HFI1_XMIT_RATE_PICO 0x7 229/* number of 4nsec cycles equaling 2secs */ 230#define HFI1_CONG_TIMER_PSINTERVAL 0x1DCD64EC 231 232#define IB_CC_SVCTYPE_RC 0x0 233#define IB_CC_SVCTYPE_UC 0x1 234#define IB_CC_SVCTYPE_RD 0x2 235#define IB_CC_SVCTYPE_UD 0x3 236 237/* 238 * There should be an equivalent IB #define for the following, but 239 * I cannot find it. 240 */ 241#define OPA_CC_LOG_TYPE_HFI 2 242 243struct opa_hfi1_cong_log_event_internal { 244 u32 lqpn; 245 u32 rqpn; 246 u8 sl; 247 u8 svc_type; 248 u32 rlid; 249 s64 timestamp; /* wider than 32 bits to detect 32 bit rollover */ 250}; 251 252struct opa_hfi1_cong_log_event { 253 u8 local_qp_cn_entry[3]; 254 u8 remote_qp_number_cn_entry[3]; 255 u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */ 256 u8 reserved; 257 __be32 remote_lid_cn_entry; 258 __be32 timestamp_cn_entry; 259} __packed; 260 261#define OPA_CONG_LOG_ELEMS 96 262 263struct opa_hfi1_cong_log { 264 u8 log_type; 265 u8 congestion_flags; 266 __be16 threshold_event_counter; 267 __be32 current_time_stamp; 268 u8 threshold_cong_event_map[OPA_MAX_SLS / 8]; 269 struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS]; 270} __packed; 271 272#define IB_CC_TABLE_CAP_DEFAULT 31 273 274/* Port control flags */ 275#define IB_CC_CCS_PC_SL_BASED 0x01 276 277struct opa_congestion_setting_entry { 278 u8 ccti_increase; 279 u8 reserved; 280 __be16 ccti_timer; 281 u8 trigger_threshold; 282 u8 ccti_min; /* min CCTI for cc table */ 283} __packed; 284 285struct opa_congestion_setting_entry_shadow { 286 u8 ccti_increase; 287 u8 reserved; 288 u16 ccti_timer; 289 u8 trigger_threshold; 290 u8 ccti_min; /* min CCTI for cc table */ 291} __packed; 292 293struct opa_congestion_setting_attr { 294 __be32 control_map; 295 __be16 port_control; 296 struct opa_congestion_setting_entry entries[OPA_MAX_SLS]; 297} __packed; 298 299struct opa_congestion_setting_attr_shadow { 300 u32 control_map; 301 u16 port_control; 302 struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS]; 303} __packed; 304 305#define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1 306#define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1 307 308/* 64 Congestion Control table entries in a single MAD */ 309#define IB_CCT_ENTRIES 64 310#define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2) 311 312struct ib_cc_table_entry { 313 __be16 entry; /* shift:2, multiplier:14 */ 314}; 315 316struct ib_cc_table_entry_shadow { 317 u16 entry; /* shift:2, multiplier:14 */ 318}; 319 320struct ib_cc_table_attr { 321 __be16 ccti_limit; /* max CCTI for cc table */ 322 struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES]; 323} __packed; 324 325struct ib_cc_table_attr_shadow { 326 u16 ccti_limit; /* max CCTI for cc table */ 327 struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES]; 328} __packed; 329 330#define CC_TABLE_SHADOW_MAX \ 331 (IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES) 332 333struct cc_table_shadow { 334 u16 ccti_limit; /* max CCTI for cc table */ 335 struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX]; 336} __packed; 337 338/* 339 * struct cc_state combines the (active) per-port congestion control 340 * table, and the (active) per-SL congestion settings. cc_state data 341 * may need to be read in code paths that we want to be fast, so it 342 * is an RCU protected structure. 343 */ 344struct cc_state { 345 struct rcu_head rcu; 346 struct cc_table_shadow cct; 347 struct opa_congestion_setting_attr_shadow cong_setting; 348}; 349 350/* 351 * OPA BufferControl MAD 352 */ 353 354/* attribute modifier macros */ 355#define OPA_AM_NPORT_SHIFT 24 356#define OPA_AM_NPORT_MASK 0xff 357#define OPA_AM_NPORT_SMASK (OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT) 358#define OPA_AM_NPORT(am) (((am) >> OPA_AM_NPORT_SHIFT) & \ 359 OPA_AM_NPORT_MASK) 360 361#define OPA_AM_NBLK_SHIFT 24 362#define OPA_AM_NBLK_MASK 0xff 363#define OPA_AM_NBLK_SMASK (OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT) 364#define OPA_AM_NBLK(am) (((am) >> OPA_AM_NBLK_SHIFT) & \ 365 OPA_AM_NBLK_MASK) 366 367#define OPA_AM_START_BLK_SHIFT 0 368#define OPA_AM_START_BLK_MASK 0xff 369#define OPA_AM_START_BLK_SMASK (OPA_AM_START_BLK_MASK << \ 370 OPA_AM_START_BLK_SHIFT) 371#define OPA_AM_START_BLK(am) (((am) >> OPA_AM_START_BLK_SHIFT) & \ 372 OPA_AM_START_BLK_MASK) 373 374#define OPA_AM_PORTNUM_SHIFT 0 375#define OPA_AM_PORTNUM_MASK 0xff 376#define OPA_AM_PORTNUM_SMASK (OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT) 377#define OPA_AM_PORTNUM(am) (((am) >> OPA_AM_PORTNUM_SHIFT) & \ 378 OPA_AM_PORTNUM_MASK) 379 380#define OPA_AM_ASYNC_SHIFT 12 381#define OPA_AM_ASYNC_MASK 0x1 382#define OPA_AM_ASYNC_SMASK (OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT) 383#define OPA_AM_ASYNC(am) (((am) >> OPA_AM_ASYNC_SHIFT) & \ 384 OPA_AM_ASYNC_MASK) 385 386#define OPA_AM_START_SM_CFG_SHIFT 9 387#define OPA_AM_START_SM_CFG_MASK 0x1 388#define OPA_AM_START_SM_CFG_SMASK (OPA_AM_START_SM_CFG_MASK << \ 389 OPA_AM_START_SM_CFG_SHIFT) 390#define OPA_AM_START_SM_CFG(am) (((am) >> OPA_AM_START_SM_CFG_SHIFT) \ 391 & OPA_AM_START_SM_CFG_MASK) 392 393#define OPA_AM_CI_ADDR_SHIFT 19 394#define OPA_AM_CI_ADDR_MASK 0xfff 395#define OPA_AM_CI_ADDR_SMASK (OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT) 396#define OPA_AM_CI_ADDR(am) (((am) >> OPA_AM_CI_ADDR_SHIFT) & \ 397 OPA_AM_CI_ADDR_MASK) 398 399#define OPA_AM_CI_LEN_SHIFT 13 400#define OPA_AM_CI_LEN_MASK 0x3f 401#define OPA_AM_CI_LEN_SMASK (OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT) 402#define OPA_AM_CI_LEN(am) (((am) >> OPA_AM_CI_LEN_SHIFT) & \ 403 OPA_AM_CI_LEN_MASK) 404 405/* error info macros */ 406#define OPA_EI_STATUS_SMASK 0x80 407#define OPA_EI_CODE_SMASK 0x0f 408 409struct vl_limit { 410 __be16 dedicated; 411 __be16 shared; 412}; 413 414struct buffer_control { 415 __be16 reserved; 416 __be16 overall_shared_limit; 417 struct vl_limit vl[OPA_MAX_VLS]; 418}; 419 420struct sc2vlnt { 421 u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */ 422}; 423 424/* 425 * The PortSamplesControl.CounterMasks field is an array of 3 bit fields 426 * which specify the N'th counter's capabilities. See ch. 16.1.3.2. 427 * We support 5 counters which only count the mandatory quantities. 428 */ 429#define COUNTER_MASK(q, n) (q << ((9 - n) * 3)) 430#define COUNTER_MASK0_9 \ 431 cpu_to_be32(COUNTER_MASK(1, 0) | \ 432 COUNTER_MASK(1, 1) | \ 433 COUNTER_MASK(1, 2) | \ 434 COUNTER_MASK(1, 3) | \ 435 COUNTER_MASK(1, 4)) 436 437void hfi1_event_pkey_change(struct hfi1_devdata *dd, u8 port); 438 439#endif /* _HFI1_MAD_H */ 440