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35#include <linux/spinlock.h>
36#include <linux/pci.h>
37#include <linux/io.h>
38#include <linux/delay.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/module.h>
42#include <linux/prefetch.h>
43
44#include "qib.h"
45
46
47
48
49
50const char ib_qib_version[] = QIB_DRIVER_VERSION "\n";
51
52DEFINE_SPINLOCK(qib_devs_lock);
53LIST_HEAD(qib_dev_list);
54DEFINE_MUTEX(qib_mutex);
55
56unsigned qib_ibmtu;
57module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
58MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
59
60unsigned qib_compat_ddr_negotiate = 1;
61module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
62 S_IWUSR | S_IRUGO);
63MODULE_PARM_DESC(compat_ddr_negotiate,
64 "Attempt pre-IBTA 1.2 DDR speed negotiation");
65
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_AUTHOR("Intel <ibsupport@intel.com>");
68MODULE_DESCRIPTION("Intel IB driver");
69MODULE_VERSION(QIB_DRIVER_VERSION);
70
71
72
73
74
75
76#define QIB_PIO_MAXIBHDR 128
77
78
79
80
81#define QIB_MAX_PKT_RECV 64
82
83struct qlogic_ib_stats qib_stats;
84
85const char *qib_get_unit_name(int unit)
86{
87 static char iname[16];
88
89 snprintf(iname, sizeof(iname), "infinipath%u", unit);
90 return iname;
91}
92
93const char *qib_get_card_name(struct rvt_dev_info *rdi)
94{
95 struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi);
96 struct qib_devdata *dd = container_of(ibdev,
97 struct qib_devdata, verbs_dev);
98 return qib_get_unit_name(dd->unit);
99}
100
101struct pci_dev *qib_get_pci_dev(struct rvt_dev_info *rdi)
102{
103 struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi);
104 struct qib_devdata *dd = container_of(ibdev,
105 struct qib_devdata, verbs_dev);
106 return dd->pcidev;
107}
108
109
110
111
112int qib_count_active_units(void)
113{
114 struct qib_devdata *dd;
115 struct qib_pportdata *ppd;
116 unsigned long flags;
117 int pidx, nunits_active = 0;
118
119 spin_lock_irqsave(&qib_devs_lock, flags);
120 list_for_each_entry(dd, &qib_dev_list, list) {
121 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
122 continue;
123 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
124 ppd = dd->pport + pidx;
125 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
126 QIBL_LINKARMED | QIBL_LINKACTIVE))) {
127 nunits_active++;
128 break;
129 }
130 }
131 }
132 spin_unlock_irqrestore(&qib_devs_lock, flags);
133 return nunits_active;
134}
135
136
137
138
139
140
141int qib_count_units(int *npresentp, int *nupp)
142{
143 int nunits = 0, npresent = 0, nup = 0;
144 struct qib_devdata *dd;
145 unsigned long flags;
146 int pidx;
147 struct qib_pportdata *ppd;
148
149 spin_lock_irqsave(&qib_devs_lock, flags);
150
151 list_for_each_entry(dd, &qib_dev_list, list) {
152 nunits++;
153 if ((dd->flags & QIB_PRESENT) && dd->kregbase)
154 npresent++;
155 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
156 ppd = dd->pport + pidx;
157 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
158 QIBL_LINKARMED | QIBL_LINKACTIVE)))
159 nup++;
160 }
161 }
162
163 spin_unlock_irqrestore(&qib_devs_lock, flags);
164
165 if (npresentp)
166 *npresentp = npresent;
167 if (nupp)
168 *nupp = nup;
169
170 return nunits;
171}
172
173
174
175
176
177
178
179
180
181
182
183
184
185int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
186{
187 int ret;
188 unsigned long flags;
189
190 spin_lock_irqsave(&ppd->lflags_lock, flags);
191 if (ppd->state_wanted) {
192 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
193 ret = -EBUSY;
194 goto bail;
195 }
196 ppd->state_wanted = state;
197 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
198 wait_event_interruptible_timeout(ppd->state_wait,
199 (ppd->lflags & state),
200 msecs_to_jiffies(msecs));
201 spin_lock_irqsave(&ppd->lflags_lock, flags);
202 ppd->state_wanted = 0;
203 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
204
205 if (!(ppd->lflags & state))
206 ret = -ETIMEDOUT;
207 else
208 ret = 0;
209bail:
210 return ret;
211}
212
213int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
214{
215 u32 lstate;
216 int ret;
217 struct qib_devdata *dd = ppd->dd;
218 unsigned long flags;
219
220 switch (newstate) {
221 case QIB_IB_LINKDOWN_ONLY:
222 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
223 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
224
225 ret = 0;
226 goto bail;
227
228 case QIB_IB_LINKDOWN:
229 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
230 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
231
232 ret = 0;
233 goto bail;
234
235 case QIB_IB_LINKDOWN_SLEEP:
236 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
237 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
238
239 ret = 0;
240 goto bail;
241
242 case QIB_IB_LINKDOWN_DISABLE:
243 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
244 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
245
246 ret = 0;
247 goto bail;
248
249 case QIB_IB_LINKARM:
250 if (ppd->lflags & QIBL_LINKARMED) {
251 ret = 0;
252 goto bail;
253 }
254 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
255 ret = -EINVAL;
256 goto bail;
257 }
258
259
260
261
262
263
264 spin_lock_irqsave(&ppd->lflags_lock, flags);
265 ppd->lflags &= ~QIBL_LINKV;
266 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
267 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
268 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
269 lstate = QIBL_LINKV;
270 break;
271
272 case QIB_IB_LINKACTIVE:
273 if (ppd->lflags & QIBL_LINKACTIVE) {
274 ret = 0;
275 goto bail;
276 }
277 if (!(ppd->lflags & QIBL_LINKARMED)) {
278 ret = -EINVAL;
279 goto bail;
280 }
281 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
282 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
283 lstate = QIBL_LINKACTIVE;
284 break;
285
286 default:
287 ret = -EINVAL;
288 goto bail;
289 }
290 ret = qib_wait_linkstate(ppd, lstate, 10);
291
292bail:
293 return ret;
294}
295
296
297
298
299
300static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
301{
302 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift;
303 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1);
304
305 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift);
306}
307
308
309
310
311
312static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
313 u32 ctxt, u32 eflags, u32 l, u32 etail,
314 __le32 *rhf_addr, struct qib_message_header *rhdr)
315{
316 u32 ret = 0;
317
318 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
319 ret = 1;
320 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
321
322 struct qib_ib_header *hdr = (struct qib_ib_header *) rhdr;
323 struct qib_other_headers *ohdr = NULL;
324 struct qib_ibport *ibp = &ppd->ibport_data;
325 struct qib_devdata *dd = ppd->dd;
326 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
327 struct rvt_qp *qp = NULL;
328 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
329 u16 lid = be16_to_cpu(hdr->lrh[1]);
330 int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
331 u32 qp_num;
332 u32 opcode;
333 u32 psn;
334 int diff;
335
336
337 if (tlen < 24)
338 goto drop;
339
340 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
341 lid &= ~((1 << ppd->lmc) - 1);
342 if (unlikely(lid != ppd->lid))
343 goto drop;
344 }
345
346
347 if (lnh == QIB_LRH_BTH)
348 ohdr = &hdr->u.oth;
349 else if (lnh == QIB_LRH_GRH) {
350 u32 vtf;
351
352 ohdr = &hdr->u.l.oth;
353 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
354 goto drop;
355 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
356 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
357 goto drop;
358 } else
359 goto drop;
360
361
362 opcode = be32_to_cpu(ohdr->bth[0]);
363 opcode >>= 24;
364 psn = be32_to_cpu(ohdr->bth[2]);
365
366
367 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
368 if (qp_num != QIB_MULTICAST_QPN) {
369 int ruc_res;
370
371 rcu_read_lock();
372 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
373 if (!qp) {
374 rcu_read_unlock();
375 goto drop;
376 }
377
378
379
380
381
382 spin_lock(&qp->r_lock);
383
384
385 if (!(ib_rvt_state_ops[qp->state] &
386 RVT_PROCESS_RECV_OK)) {
387 ibp->rvp.n_pkt_drops++;
388 goto unlock;
389 }
390
391 switch (qp->ibqp.qp_type) {
392 case IB_QPT_RC:
393 ruc_res =
394 qib_ruc_check_hdr(
395 ibp, hdr,
396 lnh == QIB_LRH_GRH,
397 qp,
398 be32_to_cpu(ohdr->bth[0]));
399 if (ruc_res)
400 goto unlock;
401
402
403 if (opcode <
404 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
405 diff = qib_cmp24(psn, qp->r_psn);
406 if (!qp->r_nak_state && diff >= 0) {
407 ibp->rvp.n_rc_seqnak++;
408 qp->r_nak_state =
409 IB_NAK_PSN_ERROR;
410
411 qp->r_ack_psn = qp->r_psn;
412
413
414
415
416
417
418
419
420 if (list_empty(&qp->rspwait)) {
421 qp->r_flags |=
422 RVT_R_RSP_NAK;
423 atomic_inc(
424 &qp->refcount);
425 list_add_tail(
426 &qp->rspwait,
427 &rcd->qp_wait_list);
428 }
429 }
430 }
431 break;
432 case IB_QPT_SMI:
433 case IB_QPT_GSI:
434 case IB_QPT_UD:
435 case IB_QPT_UC:
436 default:
437
438 break;
439 }
440
441unlock:
442 spin_unlock(&qp->r_lock);
443 rcu_read_unlock();
444 }
445 }
446
447drop:
448 return ret;
449}
450
451
452
453
454
455
456
457
458
459
460
461
462u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
463{
464 struct qib_devdata *dd = rcd->dd;
465 struct qib_pportdata *ppd = rcd->ppd;
466 __le32 *rhf_addr;
467 void *ebuf;
468 const u32 rsize = dd->rcvhdrentsize;
469 const u32 maxcnt = dd->rcvhdrcnt * rsize;
470 u32 etail = -1, l, hdrqtail;
471 struct qib_message_header *hdr;
472 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
473 int last;
474 u64 lval;
475 struct rvt_qp *qp, *nqp;
476
477 l = rcd->head;
478 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
479 if (dd->flags & QIB_NODMA_RTAIL) {
480 u32 seq = qib_hdrget_seq(rhf_addr);
481
482 if (seq != rcd->seq_cnt)
483 goto bail;
484 hdrqtail = 0;
485 } else {
486 hdrqtail = qib_get_rcvhdrtail(rcd);
487 if (l == hdrqtail)
488 goto bail;
489 smp_rmb();
490 }
491
492 for (last = 0, i = 1; !last; i += !last) {
493 hdr = dd->f_get_msgheader(dd, rhf_addr);
494 eflags = qib_hdrget_err_flags(rhf_addr);
495 etype = qib_hdrget_rcv_type(rhf_addr);
496
497 tlen = qib_hdrget_length_in_bytes(rhf_addr);
498 ebuf = NULL;
499 if ((dd->flags & QIB_NODMA_RTAIL) ?
500 qib_hdrget_use_egr_buf(rhf_addr) :
501 (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
502 etail = qib_hdrget_index(rhf_addr);
503 updegr = 1;
504 if (tlen > sizeof(*hdr) ||
505 etype >= RCVHQ_RCV_TYPE_NON_KD) {
506 ebuf = qib_get_egrbuf(rcd, etail);
507 prefetch_range(ebuf, tlen - sizeof(*hdr));
508 }
509 }
510 if (!eflags) {
511 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
512
513 if (lrh_len != tlen) {
514 qib_stats.sps_lenerrs++;
515 goto move_along;
516 }
517 }
518 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
519 ebuf == NULL &&
520 tlen > (dd->rcvhdrentsize - 2 + 1 -
521 qib_hdrget_offset(rhf_addr)) << 2) {
522 goto move_along;
523 }
524
525
526
527
528
529 if (unlikely(eflags))
530 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
531 etail, rhf_addr, hdr);
532 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
533 qib_ib_rcv(rcd, hdr, ebuf, tlen);
534 if (crcs)
535 crcs--;
536 else if (llic && *llic)
537 --*llic;
538 }
539move_along:
540 l += rsize;
541 if (l >= maxcnt)
542 l = 0;
543 if (i == QIB_MAX_PKT_RECV)
544 last = 1;
545
546 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
547 if (dd->flags & QIB_NODMA_RTAIL) {
548 u32 seq = qib_hdrget_seq(rhf_addr);
549
550 if (++rcd->seq_cnt > 13)
551 rcd->seq_cnt = 1;
552 if (seq != rcd->seq_cnt)
553 last = 1;
554 } else if (l == hdrqtail)
555 last = 1;
556
557
558
559
560
561
562 lval = l;
563 if (!last && !(i & 0xf)) {
564 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
565 updegr = 0;
566 }
567 }
568
569 rcd->head = l;
570
571
572
573
574
575 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
576 list_del_init(&qp->rspwait);
577 if (qp->r_flags & RVT_R_RSP_NAK) {
578 qp->r_flags &= ~RVT_R_RSP_NAK;
579 qib_send_rc_ack(qp);
580 }
581 if (qp->r_flags & RVT_R_RSP_SEND) {
582 unsigned long flags;
583
584 qp->r_flags &= ~RVT_R_RSP_SEND;
585 spin_lock_irqsave(&qp->s_lock, flags);
586 if (ib_rvt_state_ops[qp->state] &
587 RVT_PROCESS_OR_FLUSH_SEND)
588 qib_schedule_send(qp);
589 spin_unlock_irqrestore(&qp->s_lock, flags);
590 }
591 if (atomic_dec_and_test(&qp->refcount))
592 wake_up(&qp->wait);
593 }
594
595bail:
596
597 if (npkts)
598 *npkts = i;
599
600
601
602
603
604 lval = (u64)rcd->head | dd->rhdrhead_intr_off;
605 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
606 return crcs;
607}
608
609
610
611
612
613
614
615
616
617
618
619
620
621int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
622{
623 u32 piosize;
624 int ret, chk;
625
626 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
627 arg != 4096) {
628 ret = -EINVAL;
629 goto bail;
630 }
631 chk = ib_mtu_enum_to_int(qib_ibmtu);
632 if (chk > 0 && arg > chk) {
633 ret = -EINVAL;
634 goto bail;
635 }
636
637 piosize = ppd->ibmaxlen;
638 ppd->ibmtu = arg;
639
640 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
641
642 if (piosize != ppd->init_ibmaxlen) {
643 if (arg > piosize && arg <= ppd->init_ibmaxlen)
644 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
645 ppd->ibmaxlen = piosize;
646 }
647 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
648 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
649 ppd->ibmaxlen = piosize;
650 }
651
652 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
653
654 ret = 0;
655
656bail:
657 return ret;
658}
659
660int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
661{
662 struct qib_devdata *dd = ppd->dd;
663
664 ppd->lid = lid;
665 ppd->lmc = lmc;
666
667 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
668 lid | (~((1U << lmc) - 1)) << 16);
669
670 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
671 dd->unit, ppd->port, lid);
672
673 return 0;
674}
675
676
677
678
679
680
681
682
683#define LED_OVER_FREQ_SHIFT 8
684#define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
685
686#define LED_OVER_BOTH_OFF (8)
687
688static void qib_run_led_override(unsigned long opaque)
689{
690 struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
691 struct qib_devdata *dd = ppd->dd;
692 int timeoff;
693 int ph_idx;
694
695 if (!(dd->flags & QIB_INITTED))
696 return;
697
698 ph_idx = ppd->led_override_phase++ & 1;
699 ppd->led_override = ppd->led_override_vals[ph_idx];
700 timeoff = ppd->led_override_timeoff;
701
702 dd->f_setextled(ppd, 1);
703
704
705
706
707 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
708 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
709}
710
711void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
712{
713 struct qib_devdata *dd = ppd->dd;
714 int timeoff, freq;
715
716 if (!(dd->flags & QIB_INITTED))
717 return;
718
719
720 timeoff = HZ;
721 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
722
723 if (freq) {
724
725 ppd->led_override_vals[0] = val & 0xF;
726 ppd->led_override_vals[1] = (val >> 4) & 0xF;
727 timeoff = (HZ << 4)/freq;
728 } else {
729
730 ppd->led_override_vals[0] = val & 0xF;
731 ppd->led_override_vals[1] = val & 0xF;
732 }
733 ppd->led_override_timeoff = timeoff;
734
735
736
737
738
739 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
740
741 init_timer(&ppd->led_override_timer);
742 ppd->led_override_timer.function = qib_run_led_override;
743 ppd->led_override_timer.data = (unsigned long) ppd;
744 ppd->led_override_timer.expires = jiffies + 1;
745 add_timer(&ppd->led_override_timer);
746 } else {
747 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
748 mod_timer(&ppd->led_override_timer, jiffies + 1);
749 atomic_dec(&ppd->led_override_timer_active);
750 }
751}
752
753
754
755
756
757
758
759
760
761
762int qib_reset_device(int unit)
763{
764 int ret, i;
765 struct qib_devdata *dd = qib_lookup(unit);
766 struct qib_pportdata *ppd;
767 unsigned long flags;
768 int pidx;
769
770 if (!dd) {
771 ret = -ENODEV;
772 goto bail;
773 }
774
775 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
776
777 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
778 qib_devinfo(dd->pcidev,
779 "Invalid unit number %u or not initialized or not present\n",
780 unit);
781 ret = -ENXIO;
782 goto bail;
783 }
784
785 spin_lock_irqsave(&dd->uctxt_lock, flags);
786 if (dd->rcd)
787 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
788 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
789 continue;
790 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
791 ret = -EBUSY;
792 goto bail;
793 }
794 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
795
796 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
797 ppd = dd->pport + pidx;
798 if (atomic_read(&ppd->led_override_timer_active)) {
799
800 del_timer_sync(&ppd->led_override_timer);
801 atomic_set(&ppd->led_override_timer_active, 0);
802 }
803
804
805 ppd->led_override = LED_OVER_BOTH_OFF;
806 dd->f_setextled(ppd, 0);
807 if (dd->flags & QIB_HAS_SEND_DMA)
808 qib_teardown_sdma(ppd);
809 }
810
811 ret = dd->f_reset(dd);
812 if (ret == 1)
813 ret = qib_init(dd, 1);
814 else
815 ret = -EAGAIN;
816 if (ret)
817 qib_dev_err(dd,
818 "Reinitialize unit %u after reset failed with %d\n",
819 unit, ret);
820 else
821 qib_devinfo(dd->pcidev,
822 "Reinitialized unit %u after resetting\n",
823 unit);
824
825bail:
826 return ret;
827}
828