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25#ifndef _CX18_AV_CORE_H_
26#define _CX18_AV_CORE_H_
27
28#include <media/v4l2-device.h>
29#include <media/v4l2-ctrls.h>
30
31struct cx18;
32
33enum cx18_av_video_input {
34
35 CX18_AV_COMPOSITE1 = 1,
36 CX18_AV_COMPOSITE2,
37 CX18_AV_COMPOSITE3,
38 CX18_AV_COMPOSITE4,
39 CX18_AV_COMPOSITE5,
40 CX18_AV_COMPOSITE6,
41 CX18_AV_COMPOSITE7,
42 CX18_AV_COMPOSITE8,
43
44
45
46 CX18_AV_SVIDEO_LUMA1 = 0x10,
47 CX18_AV_SVIDEO_LUMA2 = 0x20,
48 CX18_AV_SVIDEO_LUMA3 = 0x30,
49 CX18_AV_SVIDEO_LUMA4 = 0x40,
50 CX18_AV_SVIDEO_LUMA5 = 0x50,
51 CX18_AV_SVIDEO_LUMA6 = 0x60,
52 CX18_AV_SVIDEO_LUMA7 = 0x70,
53 CX18_AV_SVIDEO_LUMA8 = 0x80,
54 CX18_AV_SVIDEO_CHROMA4 = 0x400,
55 CX18_AV_SVIDEO_CHROMA5 = 0x500,
56 CX18_AV_SVIDEO_CHROMA6 = 0x600,
57 CX18_AV_SVIDEO_CHROMA7 = 0x700,
58 CX18_AV_SVIDEO_CHROMA8 = 0x800,
59
60
61 CX18_AV_SVIDEO1 = 0x510,
62 CX18_AV_SVIDEO2 = 0x620,
63 CX18_AV_SVIDEO3 = 0x730,
64 CX18_AV_SVIDEO4 = 0x840,
65
66
67
68 CX18_AV_COMPONENT_LUMA1 = 0x1000,
69 CX18_AV_COMPONENT_LUMA2 = 0x2000,
70 CX18_AV_COMPONENT_LUMA3 = 0x3000,
71 CX18_AV_COMPONENT_LUMA4 = 0x4000,
72 CX18_AV_COMPONENT_LUMA5 = 0x5000,
73 CX18_AV_COMPONENT_LUMA6 = 0x6000,
74 CX18_AV_COMPONENT_LUMA7 = 0x7000,
75 CX18_AV_COMPONENT_LUMA8 = 0x8000,
76 CX18_AV_COMPONENT_R_CHROMA4 = 0x40000,
77 CX18_AV_COMPONENT_R_CHROMA5 = 0x50000,
78 CX18_AV_COMPONENT_R_CHROMA6 = 0x60000,
79 CX18_AV_COMPONENT_B_CHROMA7 = 0x700000,
80 CX18_AV_COMPONENT_B_CHROMA8 = 0x800000,
81
82
83 CX18_AV_COMPONENT1 = 0x861000,
84};
85
86enum cx18_av_audio_input {
87
88 CX18_AV_AUDIO_SERIAL1,
89 CX18_AV_AUDIO_SERIAL2,
90 CX18_AV_AUDIO4 = 4,
91 CX18_AV_AUDIO5,
92 CX18_AV_AUDIO6,
93 CX18_AV_AUDIO7,
94 CX18_AV_AUDIO8,
95};
96
97struct cx18_av_state {
98 struct v4l2_subdev sd;
99 struct v4l2_ctrl_handler hdl;
100 struct v4l2_ctrl *volume;
101 int radio;
102 v4l2_std_id std;
103 enum cx18_av_video_input vid_input;
104 enum cx18_av_audio_input aud_input;
105 u32 audclk_freq;
106 int audmode;
107 u32 rev;
108 int is_initialized;
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129
130 int slicer_line_delay;
131 int slicer_line_offset;
132};
133
134
135
136#define CXADEC_CHIP_TYPE_TIGER 0x837
137#define CXADEC_CHIP_TYPE_MAKO 0x843
138
139#define CXADEC_HOST_REG1 0x000
140#define CXADEC_HOST_REG2 0x001
141
142#define CXADEC_CHIP_CTRL 0x100
143#define CXADEC_AFE_CTRL 0x104
144#define CXADEC_PLL_CTRL1 0x108
145#define CXADEC_VID_PLL_FRAC 0x10C
146#define CXADEC_AUX_PLL_FRAC 0x110
147#define CXADEC_PIN_CTRL1 0x114
148#define CXADEC_PIN_CTRL2 0x118
149#define CXADEC_PIN_CFG1 0x11C
150#define CXADEC_PIN_CFG2 0x120
151
152#define CXADEC_PIN_CFG3 0x124
153#define CXADEC_I2S_MCLK 0x127
154
155#define CXADEC_AUD_LOCK1 0x128
156#define CXADEC_AUD_LOCK2 0x12C
157#define CXADEC_POWER_CTRL 0x130
158#define CXADEC_AFE_DIAG_CTRL1 0x134
159#define CXADEC_AFE_DIAG_CTRL2 0x138
160#define CXADEC_AFE_DIAG_CTRL3 0x13C
161#define CXADEC_PLL_DIAG_CTRL 0x140
162#define CXADEC_TEST_CTRL1 0x144
163#define CXADEC_TEST_CTRL2 0x148
164#define CXADEC_BIST_STAT 0x14C
165#define CXADEC_DLL1_DIAG_CTRL 0x158
166#define CXADEC_DLL2_DIAG_CTRL 0x15C
167
168
169#define CXADEC_IR_CTRL_REG 0x200
170#define CXADEC_IR_TXCLK_REG 0x204
171#define CXADEC_IR_RXCLK_REG 0x208
172#define CXADEC_IR_CDUTY_REG 0x20C
173#define CXADEC_IR_STAT_REG 0x210
174#define CXADEC_IR_IRQEN_REG 0x214
175#define CXADEC_IR_FILTER_REG 0x218
176#define CXADEC_IR_FIFO_REG 0x21C
177
178
179#define CXADEC_MODE_CTRL 0x400
180#define CXADEC_OUT_CTRL1 0x404
181#define CXADEC_OUT_CTRL2 0x408
182#define CXADEC_GEN_STAT 0x40C
183#define CXADEC_INT_STAT_MASK 0x410
184#define CXADEC_LUMA_CTRL 0x414
185
186#define CXADEC_BRIGHTNESS_CTRL_BYTE 0x414
187#define CXADEC_CONTRAST_CTRL_BYTE 0x415
188#define CXADEC_LUMA_CTRL_BYTE_3 0x416
189
190#define CXADEC_HSCALE_CTRL 0x418
191#define CXADEC_VSCALE_CTRL 0x41C
192
193#define CXADEC_CHROMA_CTRL 0x420
194
195#define CXADEC_USAT_CTRL_BYTE 0x420
196#define CXADEC_VSAT_CTRL_BYTE 0x421
197#define CXADEC_HUE_CTRL_BYTE 0x422
198
199#define CXADEC_VBI_LINE_CTRL1 0x424
200#define CXADEC_VBI_LINE_CTRL2 0x428
201#define CXADEC_VBI_LINE_CTRL3 0x42C
202#define CXADEC_VBI_LINE_CTRL4 0x430
203#define CXADEC_VBI_LINE_CTRL5 0x434
204#define CXADEC_VBI_FC_CFG 0x438
205#define CXADEC_VBI_MISC_CFG1 0x43C
206#define CXADEC_VBI_MISC_CFG2 0x440
207#define CXADEC_VBI_PAY1 0x444
208#define CXADEC_VBI_PAY2 0x448
209#define CXADEC_VBI_CUST1_CFG1 0x44C
210#define CXADEC_VBI_CUST1_CFG2 0x450
211#define CXADEC_VBI_CUST1_CFG3 0x454
212#define CXADEC_VBI_CUST2_CFG1 0x458
213#define CXADEC_VBI_CUST2_CFG2 0x45C
214#define CXADEC_VBI_CUST2_CFG3 0x460
215#define CXADEC_VBI_CUST3_CFG1 0x464
216#define CXADEC_VBI_CUST3_CFG2 0x468
217#define CXADEC_VBI_CUST3_CFG3 0x46C
218#define CXADEC_HORIZ_TIM_CTRL 0x470
219#define CXADEC_VERT_TIM_CTRL 0x474
220#define CXADEC_SRC_COMB_CFG 0x478
221#define CXADEC_CHROMA_VBIOFF_CFG 0x47C
222#define CXADEC_FIELD_COUNT 0x480
223#define CXADEC_MISC_TIM_CTRL 0x484
224#define CXADEC_DFE_CTRL1 0x488
225#define CXADEC_DFE_CTRL2 0x48C
226#define CXADEC_DFE_CTRL3 0x490
227#define CXADEC_PLL_CTRL2 0x494
228#define CXADEC_HTL_CTRL 0x498
229#define CXADEC_COMB_CTRL 0x49C
230#define CXADEC_CRUSH_CTRL 0x4A0
231#define CXADEC_SOFT_RST_CTRL 0x4A4
232#define CXADEC_MV_DT_CTRL2 0x4A8
233#define CXADEC_MV_DT_CTRL3 0x4AC
234#define CXADEC_MISC_DIAG_CTRL 0x4B8
235
236#define CXADEC_DL_CTL 0x800
237#define CXADEC_DL_CTL_ADDRESS_LOW 0x800
238#define CXADEC_DL_CTL_ADDRESS_HIGH 0x801
239#define CXADEC_DL_CTL_DATA 0x802
240#define CXADEC_DL_CTL_CONTROL 0x803
241
242#define CXADEC_STD_DET_STATUS 0x804
243
244#define CXADEC_STD_DET_CTL 0x808
245#define CXADEC_STD_DET_CTL_AUD_CTL 0x808
246#define CXADEC_STD_DET_CTL_PREF_MODE 0x809
247
248#define CXADEC_DW8051_INT 0x80C
249#define CXADEC_GENERAL_CTL 0x810
250#define CXADEC_AAGC_CTL 0x814
251#define CXADEC_IF_SRC_CTL 0x818
252#define CXADEC_ANLOG_DEMOD_CTL 0x81C
253#define CXADEC_ROT_FREQ_CTL 0x820
254#define CXADEC_FM1_CTL 0x824
255#define CXADEC_PDF_CTL 0x828
256#define CXADEC_DFT1_CTL1 0x82C
257#define CXADEC_DFT1_CTL2 0x830
258#define CXADEC_DFT_STATUS 0x834
259#define CXADEC_DFT2_CTL1 0x838
260#define CXADEC_DFT2_CTL2 0x83C
261#define CXADEC_DFT2_STATUS 0x840
262#define CXADEC_DFT3_CTL1 0x844
263#define CXADEC_DFT3_CTL2 0x848
264#define CXADEC_DFT3_STATUS 0x84C
265#define CXADEC_DFT4_CTL1 0x850
266#define CXADEC_DFT4_CTL2 0x854
267#define CXADEC_DFT4_STATUS 0x858
268#define CXADEC_AM_MTS_DET 0x85C
269#define CXADEC_ANALOG_MUX_CTL 0x860
270#define CXADEC_DIG_PLL_CTL1 0x864
271#define CXADEC_DIG_PLL_CTL2 0x868
272#define CXADEC_DIG_PLL_CTL3 0x86C
273#define CXADEC_DIG_PLL_CTL4 0x870
274#define CXADEC_DIG_PLL_CTL5 0x874
275#define CXADEC_DEEMPH_GAIN_CTL 0x878
276#define CXADEC_DEEMPH_COEF1 0x87C
277#define CXADEC_DEEMPH_COEF2 0x880
278#define CXADEC_DBX1_CTL1 0x884
279#define CXADEC_DBX1_CTL2 0x888
280#define CXADEC_DBX1_STATUS 0x88C
281#define CXADEC_DBX2_CTL1 0x890
282#define CXADEC_DBX2_CTL2 0x894
283#define CXADEC_DBX2_STATUS 0x898
284#define CXADEC_AM_FM_DIFF 0x89C
285
286
287#define CXADEC_NICAM_STATUS 0x8C8
288#define CXADEC_DEMATRIX_CTL 0x8CC
289
290#define CXADEC_PATH1_CTL1 0x8D0
291#define CXADEC_PATH1_VOL_CTL 0x8D4
292#define CXADEC_PATH1_EQ_CTL 0x8D8
293#define CXADEC_PATH1_SC_CTL 0x8DC
294
295#define CXADEC_PATH2_CTL1 0x8E0
296#define CXADEC_PATH2_VOL_CTL 0x8E4
297#define CXADEC_PATH2_EQ_CTL 0x8E8
298#define CXADEC_PATH2_SC_CTL 0x8EC
299
300#define CXADEC_SRC_CTL 0x8F0
301#define CXADEC_SRC_LF_COEF 0x8F4
302#define CXADEC_SRC1_CTL 0x8F8
303#define CXADEC_SRC2_CTL 0x8FC
304#define CXADEC_SRC3_CTL 0x900
305#define CXADEC_SRC4_CTL 0x904
306#define CXADEC_SRC5_CTL 0x908
307#define CXADEC_SRC6_CTL 0x90C
308
309#define CXADEC_BASEBAND_OUT_SEL 0x910
310#define CXADEC_I2S_IN_CTL 0x914
311#define CXADEC_I2S_OUT_CTL 0x918
312#define CXADEC_AC97_CTL 0x91C
313#define CXADEC_QAM_PDF 0x920
314#define CXADEC_QAM_CONST_DEC 0x924
315#define CXADEC_QAM_ROTATOR_FREQ 0x948
316
317
318#define CXADEC_PREF_MODE_MONO_LANGA 0
319#define CXADEC_PREF_MODE_MONO_LANGB 1
320#define CXADEC_PREF_MODE_MONO_LANGC 2
321#define CXADEC_PREF_MODE_FALLBACK 3
322#define CXADEC_PREF_MODE_STEREO 4
323#define CXADEC_PREF_MODE_DUAL_LANG_AC 5
324#define CXADEC_PREF_MODE_DUAL_LANG_BC 6
325#define CXADEC_PREF_MODE_DUAL_LANG_AB 7
326
327
328#define CXADEC_DETECT_STEREO 1
329#define CXADEC_DETECT_DUAL 2
330#define CXADEC_DETECT_TRI 4
331#define CXADEC_DETECT_SAP 0x10
332#define CXADEC_DETECT_NO_SIGNAL 0xFF
333
334#define CXADEC_SELECT_AUDIO_STANDARD_BG 0xF0
335#define CXADEC_SELECT_AUDIO_STANDARD_DK1 0xF1
336#define CXADEC_SELECT_AUDIO_STANDARD_DK2 0xF2
337#define CXADEC_SELECT_AUDIO_STANDARD_DK3 0xF3
338#define CXADEC_SELECT_AUDIO_STANDARD_I 0xF4
339#define CXADEC_SELECT_AUDIO_STANDARD_L 0xF5
340#define CXADEC_SELECT_AUDIO_STANDARD_BTSC 0xF6
341#define CXADEC_SELECT_AUDIO_STANDARD_EIAJ 0xF7
342#define CXADEC_SELECT_AUDIO_STANDARD_A2_M 0xF8
343#define CXADEC_SELECT_AUDIO_STANDARD_FM 0xF9
344#define CXADEC_SELECT_AUDIO_STANDARD_AUTO 0xFF
345
346static inline struct cx18_av_state *to_cx18_av_state(struct v4l2_subdev *sd)
347{
348 return container_of(sd, struct cx18_av_state, sd);
349}
350
351static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
352{
353 return &container_of(ctrl->handler, struct cx18_av_state, hdl)->sd;
354}
355
356
357
358int cx18_av_write(struct cx18 *cx, u16 addr, u8 value);
359int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value);
360int cx18_av_write4_noretry(struct cx18 *cx, u16 addr, u32 value);
361int cx18_av_write_expect(struct cx18 *cx, u16 addr, u8 value, u8 eval, u8 mask);
362int cx18_av_write4_expect(struct cx18 *cx, u16 addr, u32 value, u32 eval,
363 u32 mask);
364u8 cx18_av_read(struct cx18 *cx, u16 addr);
365u32 cx18_av_read4(struct cx18 *cx, u16 addr);
366int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned mask, u8 value);
367int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 mask, u32 value);
368void cx18_av_std_setup(struct cx18 *cx);
369
370int cx18_av_probe(struct cx18 *cx);
371
372
373
374int cx18_av_loadfw(struct cx18 *cx);
375
376
377
378int cx18_av_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
379void cx18_av_audio_set_path(struct cx18 *cx);
380extern const struct v4l2_ctrl_ops cx18_av_audio_ctrl_ops;
381
382
383
384int cx18_av_decode_vbi_line(struct v4l2_subdev *sd,
385 struct v4l2_decode_vbi_line *vbi);
386int cx18_av_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt);
387int cx18_av_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt);
388int cx18_av_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt);
389
390#endif
391