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31#include <linux/kernel.h>
32#include <linux/slab.h>
33#include <linux/init.h>
34#include <linux/string.h>
35#include <linux/sched.h>
36#include <linux/delay.h>
37#include <linux/module.h>
38#include <linux/export.h>
39#include <linux/platform_device.h>
40#include <linux/io.h>
41#include <linux/bitops.h>
42#include <linux/mtd/partitions.h>
43#include <linux/mtd/mtd.h>
44#include <linux/mtd/nand.h>
45#include <linux/bch.h>
46#include <linux/bitrev.h>
47#include <linux/jiffies.h>
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64static bool reliable_mode;
65module_param(reliable_mode, bool, 0);
66MODULE_PARM_DESC(reliable_mode, "pages are programmed in reliable mode");
67
68
69
70
71
72
73
74static bool ignore_badblocks;
75module_param(ignore_badblocks, bool, 0);
76MODULE_PARM_DESC(ignore_badblocks, "no badblock checking performed");
77
78struct docg4_priv {
79 struct mtd_info *mtd;
80 struct device *dev;
81 void __iomem *virtadr;
82 int status;
83 struct {
84 unsigned int command;
85 int column;
86 int page;
87 } last_command;
88 uint8_t oob_buf[16];
89 uint8_t ecc_buf[7];
90 int oob_page;
91 struct bch_control *bch;
92};
93
94
95
96
97
98
99
100
101
102#define DOC_IOSPACE_DATA 0x0800
103
104
105#define DOC_CHIPID 0x1000
106#define DOC_DEVICESELECT 0x100a
107#define DOC_ASICMODE 0x100c
108#define DOC_DATAEND 0x101e
109#define DOC_NOP 0x103e
110
111#define DOC_FLASHSEQUENCE 0x1032
112#define DOC_FLASHCOMMAND 0x1034
113#define DOC_FLASHADDRESS 0x1036
114#define DOC_FLASHCONTROL 0x1038
115#define DOC_ECCCONF0 0x1040
116#define DOC_ECCCONF1 0x1042
117#define DOC_HAMMINGPARITY 0x1046
118#define DOC_BCH_SYNDROM(idx) (0x1048 + idx)
119
120#define DOC_ASICMODECONFIRM 0x1072
121#define DOC_CHIPID_INV 0x1074
122#define DOC_POWERMODE 0x107c
123
124#define DOCG4_MYSTERY_REG 0x1050
125
126
127#define DOCG4_OOB_6_7 0x1052
128
129
130#define DOC_SEQ_RESET 0x00
131#define DOCG4_SEQ_PAGE_READ 0x03
132#define DOCG4_SEQ_FLUSH 0x29
133#define DOCG4_SEQ_PAGEWRITE 0x16
134#define DOCG4_SEQ_PAGEPROG 0x1e
135#define DOCG4_SEQ_BLOCKERASE 0x24
136#define DOCG4_SEQ_SETMODE 0x45
137
138
139#define DOCG4_CMD_PAGE_READ 0x00
140#define DOC_CMD_ERASECYCLE2 0xd0
141#define DOCG4_CMD_FLUSH 0x70
142#define DOCG4_CMD_READ2 0x30
143#define DOC_CMD_PROG_BLOCK_ADDR 0x60
144#define DOCG4_CMD_PAGEWRITE 0x80
145#define DOC_CMD_PROG_CYCLE2 0x10
146#define DOCG4_CMD_FAST_MODE 0xa3
147#define DOC_CMD_RELIABLE_MODE 0x22
148#define DOC_CMD_RESET 0xff
149
150
151#define DOC_POWERDOWN_READY 0x80
152
153
154#define DOC_CTRL_CE 0x10
155#define DOC_CTRL_UNKNOWN 0x40
156#define DOC_CTRL_FLASHREADY 0x01
157
158
159#define DOC_ECCCONF0_READ_MODE 0x8000
160#define DOC_ECCCONF0_UNKNOWN 0x2000
161#define DOC_ECCCONF0_ECC_ENABLE 0x1000
162#define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff
163
164
165#define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80
166#define DOC_ECCCONF1_ECC_ENABLE 0x07
167#define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20
168
169
170#define DOC_ASICMODE_RESET 0x00
171#define DOC_ASICMODE_NORMAL 0x01
172#define DOC_ASICMODE_POWERDOWN 0x02
173#define DOC_ASICMODE_MDWREN 0x04
174#define DOC_ASICMODE_BDETCT_RESET 0x08
175#define DOC_ASICMODE_RSTIN_RESET 0x10
176#define DOC_ASICMODE_RAM_WE 0x20
177
178
179#define DOCG4_PROGSTATUS_GOOD 0x51
180#define DOCG4_PROGSTATUS_GOOD_2 0xe0
181
182
183
184
185
186
187#define DOCG4_READ_ERROR 0x02
188
189
190#define DOCG4_CHIP_SIZE 0x8000000
191#define DOCG4_PAGE_SIZE 0x200
192#define DOCG4_PAGES_PER_BLOCK 0x200
193#define DOCG4_BLOCK_SIZE (DOCG4_PAGES_PER_BLOCK * DOCG4_PAGE_SIZE)
194#define DOCG4_NUMBLOCKS (DOCG4_CHIP_SIZE / DOCG4_BLOCK_SIZE)
195#define DOCG4_OOB_SIZE 0x10
196#define DOCG4_CHIP_SHIFT 27
197#define DOCG4_PAGE_SHIFT 9
198#define DOCG4_ERASE_SHIFT 18
199
200
201#define DOCG4_BCH_SIZE (DOCG4_PAGE_SIZE + DOCG4_OOB_SIZE - 1)
202
203#define DOCG4_USERDATA_LEN 520
204
205
206#define DOCG4_IDREG1_VALUE 0x0400
207#define DOCG4_IDREG2_VALUE 0xfbff
208
209
210#define DOCG4_PRIMITIVE_POLY 0x4443
211
212#define DOCG4_M 14
213#define DOCG4_T 4
214
215#define DOCG4_FACTORY_BBT_PAGE 16
216#define DOCG4_REDUNDANT_BBT_PAGE 24
217
218
219
220
221
222
223
224
225static int docg4_ooblayout_ecc(struct mtd_info *mtd, int section,
226 struct mtd_oob_region *oobregion)
227{
228 if (section)
229 return -ERANGE;
230
231 oobregion->offset = 7;
232 oobregion->length = 9;
233
234 return 0;
235}
236
237static int docg4_ooblayout_free(struct mtd_info *mtd, int section,
238 struct mtd_oob_region *oobregion)
239{
240 if (section)
241 return -ERANGE;
242
243 oobregion->offset = 2;
244 oobregion->length = 5;
245
246 return 0;
247}
248
249static const struct mtd_ooblayout_ops docg4_ooblayout_ops = {
250 .ecc = docg4_ooblayout_ecc,
251 .free = docg4_ooblayout_free,
252};
253
254
255
256
257
258
259static inline void write_nop(void __iomem *docptr)
260{
261 writew(0, docptr + DOC_NOP);
262}
263
264static void docg4_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
265{
266 int i;
267 struct nand_chip *nand = mtd_to_nand(mtd);
268 uint16_t *p = (uint16_t *) buf;
269 len >>= 1;
270
271 for (i = 0; i < len; i++)
272 p[i] = readw(nand->IO_ADDR_R);
273}
274
275static void docg4_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
276{
277 int i;
278 struct nand_chip *nand = mtd_to_nand(mtd);
279 uint16_t *p = (uint16_t *) buf;
280 len >>= 1;
281
282 for (i = 0; i < len; i++)
283 writew(p[i], nand->IO_ADDR_W);
284}
285
286static int poll_status(struct docg4_priv *doc)
287{
288
289
290
291
292
293
294 uint16_t flash_status;
295 unsigned long timeo;
296 void __iomem *docptr = doc->virtadr;
297
298 dev_dbg(doc->dev, "%s...\n", __func__);
299
300
301 flash_status = readw(docptr + DOC_FLASHCONTROL);
302
303 timeo = jiffies + msecs_to_jiffies(200);
304 do {
305 cpu_relax();
306 flash_status = readb(docptr + DOC_FLASHCONTROL);
307 } while (!(flash_status & DOC_CTRL_FLASHREADY) &&
308 time_before(jiffies, timeo));
309
310 if (unlikely(!(flash_status & DOC_CTRL_FLASHREADY))) {
311 dev_err(doc->dev, "%s: timed out!\n", __func__);
312 return NAND_STATUS_FAIL;
313 }
314
315 return 0;
316}
317
318
319static int docg4_wait(struct mtd_info *mtd, struct nand_chip *nand)
320{
321
322 struct docg4_priv *doc = nand_get_controller_data(nand);
323 int status = NAND_STATUS_WP;
324 dev_dbg(doc->dev, "%s...\n", __func__);
325
326
327 if (doc->status) {
328 status |= doc->status;
329 doc->status = 0;
330 return status;
331 }
332
333 status |= poll_status(doc);
334 return status;
335}
336
337static void docg4_select_chip(struct mtd_info *mtd, int chip)
338{
339
340
341
342
343 struct nand_chip *nand = mtd_to_nand(mtd);
344 struct docg4_priv *doc = nand_get_controller_data(nand);
345 void __iomem *docptr = doc->virtadr;
346
347 dev_dbg(doc->dev, "%s: chip %d\n", __func__, chip);
348
349 if (chip < 0)
350 return;
351
352 if (chip > 0)
353 dev_warn(doc->dev, "multiple floors currently unsupported\n");
354
355 writew(0, docptr + DOC_DEVICESELECT);
356}
357
358static void reset(struct mtd_info *mtd)
359{
360
361
362 struct nand_chip *nand = mtd_to_nand(mtd);
363 struct docg4_priv *doc = nand_get_controller_data(nand);
364 void __iomem *docptr = doc->virtadr;
365
366 writew(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN,
367 docptr + DOC_ASICMODE);
368 writew(~(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN),
369 docptr + DOC_ASICMODECONFIRM);
370 write_nop(docptr);
371
372 writew(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN,
373 docptr + DOC_ASICMODE);
374 writew(~(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN),
375 docptr + DOC_ASICMODECONFIRM);
376
377 writew(DOC_ECCCONF1_ECC_ENABLE, docptr + DOC_ECCCONF1);
378
379 poll_status(doc);
380}
381
382static void read_hw_ecc(void __iomem *docptr, uint8_t *ecc_buf)
383{
384
385
386 int i;
387 for (i = 0; i < 7; i++) {
388 ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i));
389 ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i));
390 }
391}
392
393static int correct_data(struct mtd_info *mtd, uint8_t *buf, int page)
394{
395
396
397
398
399
400 struct nand_chip *nand = mtd_to_nand(mtd);
401 struct docg4_priv *doc = nand_get_controller_data(nand);
402 void __iomem *docptr = doc->virtadr;
403 int i, numerrs, errpos[4];
404 const uint8_t blank_read_hwecc[8] = {
405 0xcf, 0x72, 0xfc, 0x1b, 0xa9, 0xc7, 0xb9, 0 };
406
407 read_hw_ecc(docptr, doc->ecc_buf);
408
409
410 if (!memcmp(doc->ecc_buf, blank_read_hwecc, 7))
411 return 0;
412
413
414 if (ignore_badblocks == false) {
415
416
417
418
419
420
421
422
423
424
425 if (nand->oob_poi[15]) {
426 int bit, numsetbits = 0;
427 unsigned long written_flag = nand->oob_poi[15];
428 for_each_set_bit(bit, &written_flag, 8)
429 numsetbits++;
430 if (numsetbits > 4) {
431 dev_warn(doc->dev,
432 "error(s) in blank page "
433 "at offset %08x\n",
434 page * DOCG4_PAGE_SIZE);
435 return 0;
436 }
437 }
438 }
439
440
441
442
443
444
445
446
447 for (i = 0; i < 7; i++)
448 doc->ecc_buf[i] = bitrev8(doc->ecc_buf[i]);
449
450 numerrs = decode_bch(doc->bch, NULL, DOCG4_USERDATA_LEN, NULL,
451 doc->ecc_buf, NULL, errpos);
452
453 if (numerrs == -EBADMSG) {
454 dev_warn(doc->dev, "uncorrectable errors at offset %08x\n",
455 page * DOCG4_PAGE_SIZE);
456 return -EBADMSG;
457 }
458
459 BUG_ON(numerrs < 0);
460
461
462 for (i = 0; i < numerrs; i++)
463 errpos[i] = (errpos[i] & ~7)|(7-(errpos[i] & 7));
464
465
466 for (i = 0; i < numerrs; i++) {
467
468
469 if (errpos[i] > DOCG4_USERDATA_LEN * 8)
470 continue;
471
472
473 if (errpos[i] > DOCG4_PAGE_SIZE * 8)
474 change_bit(errpos[i] - DOCG4_PAGE_SIZE * 8,
475 (unsigned long *)nand->oob_poi);
476
477 else
478 change_bit(errpos[i], (unsigned long *)buf);
479 }
480
481 dev_notice(doc->dev, "%d error(s) corrected at offset %08x\n",
482 numerrs, page * DOCG4_PAGE_SIZE);
483
484 return numerrs;
485}
486
487static uint8_t docg4_read_byte(struct mtd_info *mtd)
488{
489 struct nand_chip *nand = mtd_to_nand(mtd);
490 struct docg4_priv *doc = nand_get_controller_data(nand);
491
492 dev_dbg(doc->dev, "%s\n", __func__);
493
494 if (doc->last_command.command == NAND_CMD_STATUS) {
495 int status;
496
497
498
499
500
501
502 doc->last_command.command = 0;
503
504 if (doc->status) {
505 status = doc->status;
506 doc->status = 0;
507 }
508
509
510 else
511 status = NAND_STATUS_WP | NAND_STATUS_READY;
512
513 return status;
514 }
515
516 dev_warn(doc->dev, "unexpected call to read_byte()\n");
517
518 return 0;
519}
520
521static void write_addr(struct docg4_priv *doc, uint32_t docg4_addr)
522{
523
524
525 void __iomem *docptr = doc->virtadr;
526 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
527 docg4_addr >>= 8;
528 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
529 docg4_addr >>= 8;
530 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
531 docg4_addr >>= 8;
532 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
533}
534
535static int read_progstatus(struct docg4_priv *doc)
536{
537
538
539
540
541
542 void __iomem *docptr = doc->virtadr;
543
544
545 uint16_t status1 = readw(docptr + DOC_IOSPACE_DATA);
546 uint16_t status2 = readw(docptr + DOC_IOSPACE_DATA);
547 uint16_t status3 = readw(docptr + DOCG4_MYSTERY_REG);
548
549 dev_dbg(doc->dev, "docg4: %s: %02x %02x %02x\n",
550 __func__, status1, status2, status3);
551
552 if (status1 != DOCG4_PROGSTATUS_GOOD
553 || status2 != DOCG4_PROGSTATUS_GOOD_2
554 || status3 != DOCG4_PROGSTATUS_GOOD_2) {
555 doc->status = NAND_STATUS_FAIL;
556 dev_warn(doc->dev, "read_progstatus failed: "
557 "%02x, %02x, %02x\n", status1, status2, status3);
558 return -EIO;
559 }
560 return 0;
561}
562
563static int pageprog(struct mtd_info *mtd)
564{
565
566
567
568
569
570 struct nand_chip *nand = mtd_to_nand(mtd);
571 struct docg4_priv *doc = nand_get_controller_data(nand);
572 void __iomem *docptr = doc->virtadr;
573 int retval = 0;
574
575 dev_dbg(doc->dev, "docg4: %s\n", __func__);
576
577 writew(DOCG4_SEQ_PAGEPROG, docptr + DOC_FLASHSEQUENCE);
578 writew(DOC_CMD_PROG_CYCLE2, docptr + DOC_FLASHCOMMAND);
579 write_nop(docptr);
580 write_nop(docptr);
581
582
583 poll_status(doc);
584
585 writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE);
586 writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND);
587 writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
588 write_nop(docptr);
589 write_nop(docptr);
590 write_nop(docptr);
591 write_nop(docptr);
592 write_nop(docptr);
593
594 retval = read_progstatus(doc);
595 writew(0, docptr + DOC_DATAEND);
596 write_nop(docptr);
597 poll_status(doc);
598 write_nop(docptr);
599
600 return retval;
601}
602
603static void sequence_reset(struct mtd_info *mtd)
604{
605
606
607 struct nand_chip *nand = mtd_to_nand(mtd);
608 struct docg4_priv *doc = nand_get_controller_data(nand);
609 void __iomem *docptr = doc->virtadr;
610
611 writew(DOC_CTRL_UNKNOWN | DOC_CTRL_CE, docptr + DOC_FLASHCONTROL);
612 writew(DOC_SEQ_RESET, docptr + DOC_FLASHSEQUENCE);
613 writew(DOC_CMD_RESET, docptr + DOC_FLASHCOMMAND);
614 write_nop(docptr);
615 write_nop(docptr);
616 poll_status(doc);
617 write_nop(docptr);
618}
619
620static void read_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr)
621{
622
623
624 struct nand_chip *nand = mtd_to_nand(mtd);
625 struct docg4_priv *doc = nand_get_controller_data(nand);
626 void __iomem *docptr = doc->virtadr;
627
628 dev_dbg(doc->dev,
629 "docg4: %s: g4 page %08x\n", __func__, docg4_addr);
630
631 sequence_reset(mtd);
632
633 writew(DOCG4_SEQ_PAGE_READ, docptr + DOC_FLASHSEQUENCE);
634 writew(DOCG4_CMD_PAGE_READ, docptr + DOC_FLASHCOMMAND);
635 write_nop(docptr);
636
637 write_addr(doc, docg4_addr);
638
639 write_nop(docptr);
640 writew(DOCG4_CMD_READ2, docptr + DOC_FLASHCOMMAND);
641 write_nop(docptr);
642 write_nop(docptr);
643
644 poll_status(doc);
645}
646
647static void write_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr)
648{
649
650
651 struct nand_chip *nand = mtd_to_nand(mtd);
652 struct docg4_priv *doc = nand_get_controller_data(nand);
653 void __iomem *docptr = doc->virtadr;
654
655 dev_dbg(doc->dev,
656 "docg4: %s: g4 addr: %x\n", __func__, docg4_addr);
657 sequence_reset(mtd);
658
659 if (unlikely(reliable_mode)) {
660 writew(DOCG4_SEQ_SETMODE, docptr + DOC_FLASHSEQUENCE);
661 writew(DOCG4_CMD_FAST_MODE, docptr + DOC_FLASHCOMMAND);
662 writew(DOC_CMD_RELIABLE_MODE, docptr + DOC_FLASHCOMMAND);
663 write_nop(docptr);
664 }
665
666 writew(DOCG4_SEQ_PAGEWRITE, docptr + DOC_FLASHSEQUENCE);
667 writew(DOCG4_CMD_PAGEWRITE, docptr + DOC_FLASHCOMMAND);
668 write_nop(docptr);
669 write_addr(doc, docg4_addr);
670 write_nop(docptr);
671 write_nop(docptr);
672 poll_status(doc);
673}
674
675static uint32_t mtd_to_docg4_address(int page, int column)
676{
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706 int g4_page = page / 4;
707 int g4_index = (page % 4) * 0x108 + column/2;
708 return (g4_page << 16) | g4_index;
709}
710
711static void docg4_command(struct mtd_info *mtd, unsigned command, int column,
712 int page_addr)
713{
714
715
716 struct nand_chip *nand = mtd_to_nand(mtd);
717 struct docg4_priv *doc = nand_get_controller_data(nand);
718 uint32_t g4_addr = mtd_to_docg4_address(page_addr, column);
719
720 dev_dbg(doc->dev, "%s %x, page_addr=%x, column=%x\n",
721 __func__, command, page_addr, column);
722
723
724
725
726
727 doc->last_command.command = command;
728 doc->last_command.column = column;
729 doc->last_command.page = page_addr;
730
731 switch (command) {
732
733 case NAND_CMD_RESET:
734 reset(mtd);
735 break;
736
737 case NAND_CMD_READ0:
738 read_page_prologue(mtd, g4_addr);
739 break;
740
741 case NAND_CMD_STATUS:
742
743 break;
744
745 case NAND_CMD_SEQIN:
746 if (unlikely(reliable_mode)) {
747 uint16_t g4_page = g4_addr >> 16;
748
749
750 if (g4_page & 0x01)
751 dev_warn(doc->dev,
752 "invalid reliable mode address\n");
753 }
754
755 write_page_prologue(mtd, g4_addr);
756
757
758 if (doc->oob_page == page_addr)
759 memcpy(nand->oob_poi, doc->oob_buf, 16);
760 break;
761
762 case NAND_CMD_PAGEPROG:
763 pageprog(mtd);
764 break;
765
766
767 case NAND_CMD_READOOB:
768 case NAND_CMD_READID:
769 case NAND_CMD_ERASE1:
770 case NAND_CMD_ERASE2:
771 dev_warn(doc->dev, "docg4_command: "
772 "unexpected nand command 0x%x\n", command);
773 break;
774
775 }
776}
777
778static int read_page(struct mtd_info *mtd, struct nand_chip *nand,
779 uint8_t *buf, int page, bool use_ecc)
780{
781 struct docg4_priv *doc = nand_get_controller_data(nand);
782 void __iomem *docptr = doc->virtadr;
783 uint16_t status, edc_err, *buf16;
784 int bits_corrected = 0;
785
786 dev_dbg(doc->dev, "%s: page %08x\n", __func__, page);
787
788 writew(DOC_ECCCONF0_READ_MODE |
789 DOC_ECCCONF0_ECC_ENABLE |
790 DOC_ECCCONF0_UNKNOWN |
791 DOCG4_BCH_SIZE,
792 docptr + DOC_ECCCONF0);
793 write_nop(docptr);
794 write_nop(docptr);
795 write_nop(docptr);
796 write_nop(docptr);
797 write_nop(docptr);
798
799
800 status = readw(docptr + DOC_IOSPACE_DATA);
801 if (status & DOCG4_READ_ERROR) {
802 dev_err(doc->dev,
803 "docg4_read_page: bad status: 0x%02x\n", status);
804 writew(0, docptr + DOC_DATAEND);
805 return -EIO;
806 }
807
808 dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status);
809
810 docg4_read_buf(mtd, buf, DOCG4_PAGE_SIZE);
811
812
813
814 docg4_read_buf(mtd, nand->oob_poi, 14);
815
816
817 buf16 = (uint16_t *)(nand->oob_poi + 14);
818 *buf16 = readw(docptr + DOCG4_MYSTERY_REG);
819
820 write_nop(docptr);
821
822 if (likely(use_ecc == true)) {
823
824
825 edc_err = readw(docptr + DOC_ECCCONF1);
826 edc_err = readw(docptr + DOC_ECCCONF1);
827 dev_dbg(doc->dev, "%s: edc_err = 0x%02x\n", __func__, edc_err);
828
829
830 if (edc_err & DOC_ECCCONF1_BCH_SYNDROM_ERR) {
831 bits_corrected = correct_data(mtd, buf, page);
832 if (bits_corrected == -EBADMSG)
833 mtd->ecc_stats.failed++;
834 else
835 mtd->ecc_stats.corrected += bits_corrected;
836 }
837 }
838
839 writew(0, docptr + DOC_DATAEND);
840 if (bits_corrected == -EBADMSG)
841 return 0;
842 return bits_corrected;
843}
844
845
846static int docg4_read_page_raw(struct mtd_info *mtd, struct nand_chip *nand,
847 uint8_t *buf, int oob_required, int page)
848{
849 return read_page(mtd, nand, buf, page, false);
850}
851
852static int docg4_read_page(struct mtd_info *mtd, struct nand_chip *nand,
853 uint8_t *buf, int oob_required, int page)
854{
855 return read_page(mtd, nand, buf, page, true);
856}
857
858static int docg4_read_oob(struct mtd_info *mtd, struct nand_chip *nand,
859 int page)
860{
861 struct docg4_priv *doc = nand_get_controller_data(nand);
862 void __iomem *docptr = doc->virtadr;
863 uint16_t status;
864
865 dev_dbg(doc->dev, "%s: page %x\n", __func__, page);
866
867 docg4_command(mtd, NAND_CMD_READ0, nand->ecc.size, page);
868
869 writew(DOC_ECCCONF0_READ_MODE | DOCG4_OOB_SIZE, docptr + DOC_ECCCONF0);
870 write_nop(docptr);
871 write_nop(docptr);
872 write_nop(docptr);
873 write_nop(docptr);
874 write_nop(docptr);
875
876
877 status = readw(docptr + DOC_IOSPACE_DATA);
878 if (status & DOCG4_READ_ERROR) {
879 dev_warn(doc->dev,
880 "docg4_read_oob failed: status = 0x%02x\n", status);
881 return -EIO;
882 }
883
884 dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status);
885
886 docg4_read_buf(mtd, nand->oob_poi, 16);
887
888 write_nop(docptr);
889 write_nop(docptr);
890 write_nop(docptr);
891 writew(0, docptr + DOC_DATAEND);
892 write_nop(docptr);
893
894 return 0;
895}
896
897static int docg4_erase_block(struct mtd_info *mtd, int page)
898{
899 struct nand_chip *nand = mtd_to_nand(mtd);
900 struct docg4_priv *doc = nand_get_controller_data(nand);
901 void __iomem *docptr = doc->virtadr;
902 uint16_t g4_page;
903
904 dev_dbg(doc->dev, "%s: page %04x\n", __func__, page);
905
906 sequence_reset(mtd);
907
908 writew(DOCG4_SEQ_BLOCKERASE, docptr + DOC_FLASHSEQUENCE);
909 writew(DOC_CMD_PROG_BLOCK_ADDR, docptr + DOC_FLASHCOMMAND);
910 write_nop(docptr);
911
912
913 g4_page = (uint16_t)(page / 4);
914 writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS);
915 g4_page >>= 8;
916 writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS);
917 write_nop(docptr);
918
919
920 writew(DOC_CMD_ERASECYCLE2, docptr + DOC_FLASHCOMMAND);
921 write_nop(docptr);
922 write_nop(docptr);
923
924 usleep_range(500, 1000);
925 poll_status(doc);
926 writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE);
927 writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND);
928 writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
929 write_nop(docptr);
930 write_nop(docptr);
931 write_nop(docptr);
932 write_nop(docptr);
933 write_nop(docptr);
934
935 read_progstatus(doc);
936
937 writew(0, docptr + DOC_DATAEND);
938 write_nop(docptr);
939 poll_status(doc);
940 write_nop(docptr);
941
942 return nand->waitfunc(mtd, nand);
943}
944
945static int write_page(struct mtd_info *mtd, struct nand_chip *nand,
946 const uint8_t *buf, bool use_ecc)
947{
948 struct docg4_priv *doc = nand_get_controller_data(nand);
949 void __iomem *docptr = doc->virtadr;
950 uint8_t ecc_buf[8];
951
952 dev_dbg(doc->dev, "%s...\n", __func__);
953
954 writew(DOC_ECCCONF0_ECC_ENABLE |
955 DOC_ECCCONF0_UNKNOWN |
956 DOCG4_BCH_SIZE,
957 docptr + DOC_ECCCONF0);
958 write_nop(docptr);
959
960
961 docg4_write_buf16(mtd, buf, DOCG4_PAGE_SIZE);
962
963
964 docg4_write_buf16(mtd, nand->oob_poi, 6);
965
966
967 writew(nand->oob_poi[6], docptr + DOCG4_OOB_6_7);
968
969 write_nop(docptr);
970 write_nop(docptr);
971
972
973 if (likely(use_ecc == true)) {
974
975 uint8_t hamming = readb(docptr + DOC_HAMMINGPARITY);
976 hamming = readb(docptr + DOC_HAMMINGPARITY);
977 writew(hamming, docptr + DOCG4_OOB_6_7);
978 write_nop(docptr);
979
980
981 read_hw_ecc(docptr, ecc_buf);
982 ecc_buf[7] = 0;
983 }
984
985
986 else {
987 writew(nand->oob_poi[7], docptr + DOCG4_OOB_6_7);
988 write_nop(docptr);
989 memcpy(ecc_buf, &nand->oob_poi[8], 8);
990 }
991
992 docg4_write_buf16(mtd, ecc_buf, 8);
993 write_nop(docptr);
994 write_nop(docptr);
995 writew(0, docptr + DOC_DATAEND);
996 write_nop(docptr);
997
998 return 0;
999}
1000
1001static int docg4_write_page_raw(struct mtd_info *mtd, struct nand_chip *nand,
1002 const uint8_t *buf, int oob_required, int page)
1003{
1004 return write_page(mtd, nand, buf, false);
1005}
1006
1007static int docg4_write_page(struct mtd_info *mtd, struct nand_chip *nand,
1008 const uint8_t *buf, int oob_required, int page)
1009{
1010 return write_page(mtd, nand, buf, true);
1011}
1012
1013static int docg4_write_oob(struct mtd_info *mtd, struct nand_chip *nand,
1014 int page)
1015{
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028 struct docg4_priv *doc = nand_get_controller_data(nand);
1029 doc->oob_page = page;
1030 memcpy(doc->oob_buf, nand->oob_poi, 16);
1031 return 0;
1032}
1033
1034static int __init read_factory_bbt(struct mtd_info *mtd)
1035{
1036
1037
1038
1039
1040
1041 struct nand_chip *nand = mtd_to_nand(mtd);
1042 struct docg4_priv *doc = nand_get_controller_data(nand);
1043 uint32_t g4_addr = mtd_to_docg4_address(DOCG4_FACTORY_BBT_PAGE, 0);
1044 uint8_t *buf;
1045 int i, block;
1046 __u32 eccfailed_stats = mtd->ecc_stats.failed;
1047
1048 buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL);
1049 if (buf == NULL)
1050 return -ENOMEM;
1051
1052 read_page_prologue(mtd, g4_addr);
1053 docg4_read_page(mtd, nand, buf, 0, DOCG4_FACTORY_BBT_PAGE);
1054
1055
1056
1057
1058
1059
1060
1061
1062 if (nand->bbt == NULL)
1063 goto exit;
1064
1065 if (mtd->ecc_stats.failed > eccfailed_stats) {
1066
1067
1068
1069
1070 eccfailed_stats = mtd->ecc_stats.failed;
1071 docg4_read_page(mtd, nand, buf, 0, DOCG4_REDUNDANT_BBT_PAGE);
1072 if (mtd->ecc_stats.failed > eccfailed_stats) {
1073 dev_warn(doc->dev,
1074 "The factory bbt could not be read!\n");
1075 goto exit;
1076 }
1077 }
1078
1079
1080
1081
1082
1083
1084 for (i = block = 0; block < DOCG4_NUMBLOCKS; block += 8, i++) {
1085 int bitnum;
1086 unsigned long bits = ~buf[i];
1087 for_each_set_bit(bitnum, &bits, 8) {
1088 int badblock = block + 7 - bitnum;
1089 nand->bbt[badblock / 4] |=
1090 0x03 << ((badblock % 4) * 2);
1091 mtd->ecc_stats.badblocks++;
1092 dev_notice(doc->dev, "factory-marked bad block: %d\n",
1093 badblock);
1094 }
1095 }
1096 exit:
1097 kfree(buf);
1098 return 0;
1099}
1100
1101static int docg4_block_markbad(struct mtd_info *mtd, loff_t ofs)
1102{
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112 int ret, i;
1113 uint8_t *buf;
1114 struct nand_chip *nand = mtd_to_nand(mtd);
1115 struct docg4_priv *doc = nand_get_controller_data(nand);
1116 struct nand_bbt_descr *bbtd = nand->badblock_pattern;
1117 int page = (int)(ofs >> nand->page_shift);
1118 uint32_t g4_addr = mtd_to_docg4_address(page, 0);
1119
1120 dev_dbg(doc->dev, "%s: %08llx\n", __func__, ofs);
1121
1122 if (unlikely(ofs & (DOCG4_BLOCK_SIZE - 1)))
1123 dev_warn(doc->dev, "%s: ofs %llx not start of block!\n",
1124 __func__, ofs);
1125
1126
1127 buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL);
1128 if (buf == NULL)
1129 return -ENOMEM;
1130
1131
1132 memset(nand->oob_poi, 0xff, mtd->oobsize);
1133 for (i = 0; i < bbtd->len; i++)
1134 nand->oob_poi[bbtd->offs + i] = ~bbtd->pattern[i];
1135
1136
1137 write_page_prologue(mtd, g4_addr);
1138 docg4_write_page(mtd, nand, buf, 1, page);
1139 ret = pageprog(mtd);
1140
1141 kfree(buf);
1142
1143 return ret;
1144}
1145
1146static int docg4_block_neverbad(struct mtd_info *mtd, loff_t ofs)
1147{
1148
1149 return 0;
1150}
1151
1152static int docg4_suspend(struct platform_device *pdev, pm_message_t state)
1153{
1154
1155
1156
1157
1158
1159
1160
1161 int i;
1162 uint8_t pwr_down;
1163 struct docg4_priv *doc = platform_get_drvdata(pdev);
1164 void __iomem *docptr = doc->virtadr;
1165
1166 dev_dbg(doc->dev, "%s...\n", __func__);
1167
1168
1169 for (i = 0; i < 10; i++) {
1170 pwr_down = readb(docptr + DOC_POWERMODE);
1171 if (pwr_down & DOC_POWERDOWN_READY)
1172 break;
1173 usleep_range(1000, 4000);
1174 }
1175
1176 if (pwr_down & DOC_POWERDOWN_READY) {
1177 dev_err(doc->dev, "suspend failed; "
1178 "timeout polling DOC_POWERDOWN_READY\n");
1179 return -EIO;
1180 }
1181
1182 writew(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN,
1183 docptr + DOC_ASICMODE);
1184 writew(~(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN),
1185 docptr + DOC_ASICMODECONFIRM);
1186
1187 write_nop(docptr);
1188
1189 return 0;
1190}
1191
1192static int docg4_resume(struct platform_device *pdev)
1193{
1194
1195
1196
1197
1198
1199
1200 struct docg4_priv *doc = platform_get_drvdata(pdev);
1201 void __iomem *docptr = doc->virtadr;
1202 int i;
1203
1204 dev_dbg(doc->dev, "%s...\n", __func__);
1205
1206 for (i = 0; i < 12; i++)
1207 readb(docptr + 0x1fff);
1208
1209 return 0;
1210}
1211
1212static void __init init_mtd_structs(struct mtd_info *mtd)
1213{
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227 struct nand_chip *nand = mtd_to_nand(mtd);
1228 struct docg4_priv *doc = nand_get_controller_data(nand);
1229
1230 mtd->size = DOCG4_CHIP_SIZE;
1231 mtd->name = "Msys_Diskonchip_G4";
1232 mtd->writesize = DOCG4_PAGE_SIZE;
1233 mtd->erasesize = DOCG4_BLOCK_SIZE;
1234 mtd->oobsize = DOCG4_OOB_SIZE;
1235 mtd_set_ooblayout(mtd, &docg4_ooblayout_ops);
1236 nand->chipsize = DOCG4_CHIP_SIZE;
1237 nand->chip_shift = DOCG4_CHIP_SHIFT;
1238 nand->bbt_erase_shift = nand->phys_erase_shift = DOCG4_ERASE_SHIFT;
1239 nand->chip_delay = 20;
1240 nand->page_shift = DOCG4_PAGE_SHIFT;
1241 nand->pagemask = 0x3ffff;
1242 nand->badblockpos = NAND_LARGE_BADBLOCK_POS;
1243 nand->badblockbits = 8;
1244 nand->ecc.mode = NAND_ECC_HW_SYNDROME;
1245 nand->ecc.size = DOCG4_PAGE_SIZE;
1246 nand->ecc.prepad = 8;
1247 nand->ecc.bytes = 8;
1248 nand->ecc.strength = DOCG4_T;
1249 nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;
1250 nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA;
1251 nand->controller = &nand->hwcontrol;
1252 spin_lock_init(&nand->controller->lock);
1253 init_waitqueue_head(&nand->controller->wq);
1254
1255
1256 nand->cmdfunc = docg4_command;
1257 nand->waitfunc = docg4_wait;
1258 nand->select_chip = docg4_select_chip;
1259 nand->read_byte = docg4_read_byte;
1260 nand->block_markbad = docg4_block_markbad;
1261 nand->read_buf = docg4_read_buf;
1262 nand->write_buf = docg4_write_buf16;
1263 nand->erase = docg4_erase_block;
1264 nand->ecc.read_page = docg4_read_page;
1265 nand->ecc.write_page = docg4_write_page;
1266 nand->ecc.read_page_raw = docg4_read_page_raw;
1267 nand->ecc.write_page_raw = docg4_write_page_raw;
1268 nand->ecc.read_oob = docg4_read_oob;
1269 nand->ecc.write_oob = docg4_write_oob;
1270
1271
1272
1273
1274
1275
1276
1277 if (ignore_badblocks) {
1278 nand->options |= NAND_SKIP_BBTSCAN;
1279 nand->block_bad = docg4_block_neverbad;
1280 }
1281
1282}
1283
1284static int __init read_id_reg(struct mtd_info *mtd)
1285{
1286 struct nand_chip *nand = mtd_to_nand(mtd);
1287 struct docg4_priv *doc = nand_get_controller_data(nand);
1288 void __iomem *docptr = doc->virtadr;
1289 uint16_t id1, id2;
1290
1291
1292 id1 = readw(docptr + DOC_CHIPID);
1293 id1 = readw(docptr + DOCG4_MYSTERY_REG);
1294 id2 = readw(docptr + DOC_CHIPID_INV);
1295 id2 = readw(docptr + DOCG4_MYSTERY_REG);
1296
1297 if (id1 == DOCG4_IDREG1_VALUE && id2 == DOCG4_IDREG2_VALUE) {
1298 dev_info(doc->dev,
1299 "NAND device: 128MiB Diskonchip G4 detected\n");
1300 return 0;
1301 }
1302
1303 return -ENODEV;
1304}
1305
1306static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL };
1307
1308static int __init probe_docg4(struct platform_device *pdev)
1309{
1310 struct mtd_info *mtd;
1311 struct nand_chip *nand;
1312 void __iomem *virtadr;
1313 struct docg4_priv *doc;
1314 int len, retval;
1315 struct resource *r;
1316 struct device *dev = &pdev->dev;
1317
1318 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1319 if (r == NULL) {
1320 dev_err(dev, "no io memory resource defined!\n");
1321 return -ENODEV;
1322 }
1323
1324 virtadr = ioremap(r->start, resource_size(r));
1325 if (!virtadr) {
1326 dev_err(dev, "Diskonchip ioremap failed: %pR\n", r);
1327 return -EIO;
1328 }
1329
1330 len = sizeof(struct nand_chip) + sizeof(struct docg4_priv);
1331 nand = kzalloc(len, GFP_KERNEL);
1332 if (nand == NULL) {
1333 retval = -ENOMEM;
1334 goto fail_unmap;
1335 }
1336
1337 mtd = nand_to_mtd(nand);
1338 doc = (struct docg4_priv *) (nand + 1);
1339 nand_set_controller_data(nand, doc);
1340 mtd->dev.parent = &pdev->dev;
1341 doc->virtadr = virtadr;
1342 doc->dev = dev;
1343
1344 init_mtd_structs(mtd);
1345
1346
1347 doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
1348 if (doc->bch == NULL) {
1349 retval = -EINVAL;
1350 goto fail;
1351 }
1352
1353 platform_set_drvdata(pdev, doc);
1354
1355 reset(mtd);
1356 retval = read_id_reg(mtd);
1357 if (retval == -ENODEV) {
1358 dev_warn(dev, "No diskonchip G4 device found.\n");
1359 goto fail;
1360 }
1361
1362 retval = nand_scan_tail(mtd);
1363 if (retval)
1364 goto fail;
1365
1366 retval = read_factory_bbt(mtd);
1367 if (retval)
1368 goto fail;
1369
1370 retval = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
1371 if (retval)
1372 goto fail;
1373
1374 doc->mtd = mtd;
1375 return 0;
1376
1377fail:
1378 nand_release(mtd);
1379 free_bch(doc->bch);
1380 kfree(nand);
1381
1382fail_unmap:
1383 iounmap(virtadr);
1384
1385 return retval;
1386}
1387
1388static int __exit cleanup_docg4(struct platform_device *pdev)
1389{
1390 struct docg4_priv *doc = platform_get_drvdata(pdev);
1391 nand_release(doc->mtd);
1392 free_bch(doc->bch);
1393 kfree(mtd_to_nand(doc->mtd));
1394 iounmap(doc->virtadr);
1395 return 0;
1396}
1397
1398static struct platform_driver docg4_driver = {
1399 .driver = {
1400 .name = "docg4",
1401 },
1402 .suspend = docg4_suspend,
1403 .resume = docg4_resume,
1404 .remove = __exit_p(cleanup_docg4),
1405};
1406
1407module_platform_driver_probe(docg4_driver, probe_docg4);
1408
1409MODULE_LICENSE("GPL");
1410MODULE_AUTHOR("Mike Dunn");
1411MODULE_DESCRIPTION("M-Systems DiskOnChip G4 device driver");
1412