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17#ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H
18#define __DRIVERS_MTD_NAND_GPMI_NAND_H
19
20#include <linux/mtd/nand.h>
21#include <linux/platform_device.h>
22#include <linux/dma-mapping.h>
23#include <linux/dmaengine.h>
24
25#define GPMI_CLK_MAX 5
26struct resources {
27 void __iomem *gpmi_regs;
28 void __iomem *bch_regs;
29 unsigned int dma_low_channel;
30 unsigned int dma_high_channel;
31 struct clk *clock[GPMI_CLK_MAX];
32};
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55struct bch_geometry {
56 unsigned int gf_len;
57 unsigned int ecc_strength;
58 unsigned int page_size;
59 unsigned int metadata_size;
60 unsigned int ecc_chunk_size;
61 unsigned int ecc_chunk_count;
62 unsigned int payload_size;
63 unsigned int auxiliary_size;
64 unsigned int auxiliary_status_offset;
65 unsigned int block_mark_byte_offset;
66 unsigned int block_mark_bit_offset;
67};
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74
75struct boot_rom_geometry {
76 unsigned int stride_size_in_pages;
77 unsigned int search_area_stride_exponent;
78};
79
80
81enum dma_ops_type {
82 DMA_FOR_COMMAND = 1,
83 DMA_FOR_READ_DATA,
84 DMA_FOR_WRITE_DATA,
85 DMA_FOR_READ_ECC_PAGE,
86 DMA_FOR_WRITE_ECC_PAGE
87};
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112struct nand_timing {
113 int8_t data_setup_in_ns;
114 int8_t data_hold_in_ns;
115 int8_t address_setup_in_ns;
116 int8_t gpmi_sample_delay_in_ns;
117 int8_t tREA_in_ns;
118 int8_t tRLOH_in_ns;
119 int8_t tRHOH_in_ns;
120};
121
122enum gpmi_type {
123 IS_MX23,
124 IS_MX28,
125 IS_MX6Q,
126 IS_MX6SX
127};
128
129struct gpmi_devdata {
130 enum gpmi_type type;
131 int bch_max_ecc_strength;
132 int max_chain_delay;
133};
134
135struct gpmi_nand_data {
136
137#define GPMI_ASYNC_EDO_ENABLED (1 << 0)
138#define GPMI_TIMING_INIT_OK (1 << 1)
139 int flags;
140 const struct gpmi_devdata *devdata;
141
142
143 struct device *dev;
144 struct platform_device *pdev;
145
146
147 struct resources resources;
148
149
150 struct nand_timing timing;
151 int timing_mode;
152
153
154 struct bch_geometry bch_geometry;
155 struct completion bch_done;
156
157
158 bool swap_block_mark;
159 struct boot_rom_geometry rom_geometry;
160
161
162 struct nand_chip nand;
163
164
165 int current_chip;
166 unsigned int command_length;
167
168
169 uint8_t *upper_buf;
170 int upper_len;
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172
173 bool direct_dma_map_ok;
174
175 struct scatterlist cmd_sgl;
176 char *cmd_buffer;
177
178 struct scatterlist data_sgl;
179 char *data_buffer_dma;
180
181 void *page_buffer_virt;
182 dma_addr_t page_buffer_phys;
183 unsigned int page_buffer_size;
184
185 void *payload_virt;
186 dma_addr_t payload_phys;
187
188 void *auxiliary_virt;
189 dma_addr_t auxiliary_phys;
190
191 void *raw_buffer;
192
193
194#define DMA_CHANS 8
195 struct dma_chan *dma_chans[DMA_CHANS];
196 enum dma_ops_type last_dma_type;
197 enum dma_ops_type dma_type;
198 struct completion dma_done;
199
200
201 void *private;
202};
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217struct gpmi_nfc_hardware_timing {
218
219 uint8_t data_setup_in_cycles;
220 uint8_t data_hold_in_cycles;
221 uint8_t address_setup_in_cycles;
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224 uint16_t device_busy_timeout;
225#define GPMI_DEFAULT_BUSY_TIMEOUT 0x500
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228 bool use_half_periods;
229 uint8_t sample_delay_factor;
230 uint8_t wrn_dly_sel;
231};
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256struct timing_threshod {
257 const unsigned int max_chip_count;
258 const unsigned int max_data_setup_cycles;
259 const unsigned int internal_data_setup_in_ns;
260 const unsigned int max_sample_delay_factor;
261 const unsigned int max_dll_clock_period_in_ns;
262 const unsigned int max_dll_delay_in_ns;
263 unsigned long clock_frequency_in_hz;
264
265};
266
267
268extern int common_nfc_set_geometry(struct gpmi_nand_data *);
269extern struct dma_chan *get_dma_chan(struct gpmi_nand_data *);
270extern void prepare_data_dma(struct gpmi_nand_data *,
271 enum dma_data_direction dr);
272extern int start_dma_without_bch_irq(struct gpmi_nand_data *,
273 struct dma_async_tx_descriptor *);
274extern int start_dma_with_bch_irq(struct gpmi_nand_data *,
275 struct dma_async_tx_descriptor *);
276
277
278extern int gpmi_init(struct gpmi_nand_data *);
279extern int gpmi_extra_init(struct gpmi_nand_data *);
280extern void gpmi_clear_bch(struct gpmi_nand_data *);
281extern void gpmi_dump_info(struct gpmi_nand_data *);
282extern int bch_set_geometry(struct gpmi_nand_data *);
283extern int gpmi_is_ready(struct gpmi_nand_data *, unsigned chip);
284extern int gpmi_send_command(struct gpmi_nand_data *);
285extern void gpmi_begin(struct gpmi_nand_data *);
286extern void gpmi_end(struct gpmi_nand_data *);
287extern int gpmi_read_data(struct gpmi_nand_data *);
288extern int gpmi_send_data(struct gpmi_nand_data *);
289extern int gpmi_send_page(struct gpmi_nand_data *,
290 dma_addr_t payload, dma_addr_t auxiliary);
291extern int gpmi_read_page(struct gpmi_nand_data *,
292 dma_addr_t payload, dma_addr_t auxiliary);
293
294void gpmi_copy_bits(u8 *dst, size_t dst_bit_off,
295 const u8 *src, size_t src_bit_off,
296 size_t nbits);
297
298
299#define STATUS_GOOD 0x00
300#define STATUS_ERASED 0xff
301#define STATUS_UNCORRECTABLE 0xfe
302
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304#define GPMI_IS_MX23(x) ((x)->devdata->type == IS_MX23)
305#define GPMI_IS_MX28(x) ((x)->devdata->type == IS_MX28)
306#define GPMI_IS_MX6Q(x) ((x)->devdata->type == IS_MX6Q)
307#define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX)
308
309#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x))
310#endif
311