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16#include <linux/crc32.h>
17#include <linux/etherdevice.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/module.h>
21#include <linux/of_address.h>
22#include <linux/of_irq.h>
23#include <linux/of_mdio.h>
24#include <linux/of_net.h>
25#include <linux/of_platform.h>
26
27#include "emac.h"
28
29
30
31
32
33
34
35static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
36{
37 return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
38}
39
40
41
42
43
44
45
46
47static void arc_emac_adjust_link(struct net_device *ndev)
48{
49 struct arc_emac_priv *priv = netdev_priv(ndev);
50 struct phy_device *phy_dev = priv->phy_dev;
51 unsigned int reg, state_changed = 0;
52
53 if (priv->link != phy_dev->link) {
54 priv->link = phy_dev->link;
55 state_changed = 1;
56 }
57
58 if (priv->speed != phy_dev->speed) {
59 priv->speed = phy_dev->speed;
60 state_changed = 1;
61 if (priv->set_mac_speed)
62 priv->set_mac_speed(priv, priv->speed);
63 }
64
65 if (priv->duplex != phy_dev->duplex) {
66 reg = arc_reg_get(priv, R_CTRL);
67
68 if (phy_dev->duplex == DUPLEX_FULL)
69 reg |= ENFL_MASK;
70 else
71 reg &= ~ENFL_MASK;
72
73 arc_reg_set(priv, R_CTRL, reg);
74 priv->duplex = phy_dev->duplex;
75 state_changed = 1;
76 }
77
78 if (state_changed)
79 phy_print_status(phy_dev);
80}
81
82
83
84
85
86
87
88
89
90
91
92static int arc_emac_get_settings(struct net_device *ndev,
93 struct ethtool_cmd *cmd)
94{
95 struct arc_emac_priv *priv = netdev_priv(ndev);
96
97 return phy_ethtool_gset(priv->phy_dev, cmd);
98}
99
100
101
102
103
104
105
106
107
108
109
110
111static int arc_emac_set_settings(struct net_device *ndev,
112 struct ethtool_cmd *cmd)
113{
114 struct arc_emac_priv *priv = netdev_priv(ndev);
115
116 if (!capable(CAP_NET_ADMIN))
117 return -EPERM;
118
119 return phy_ethtool_sset(priv->phy_dev, cmd);
120}
121
122
123
124
125
126
127
128
129
130static void arc_emac_get_drvinfo(struct net_device *ndev,
131 struct ethtool_drvinfo *info)
132{
133 struct arc_emac_priv *priv = netdev_priv(ndev);
134
135 strlcpy(info->driver, priv->drv_name, sizeof(info->driver));
136 strlcpy(info->version, priv->drv_version, sizeof(info->version));
137}
138
139static const struct ethtool_ops arc_emac_ethtool_ops = {
140 .get_settings = arc_emac_get_settings,
141 .set_settings = arc_emac_set_settings,
142 .get_drvinfo = arc_emac_get_drvinfo,
143 .get_link = ethtool_op_get_link,
144};
145
146#define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
147
148
149
150
151
152static void arc_emac_tx_clean(struct net_device *ndev)
153{
154 struct arc_emac_priv *priv = netdev_priv(ndev);
155 struct net_device_stats *stats = &ndev->stats;
156 unsigned int i;
157
158 for (i = 0; i < TX_BD_NUM; i++) {
159 unsigned int *txbd_dirty = &priv->txbd_dirty;
160 struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
161 struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
162 struct sk_buff *skb = tx_buff->skb;
163 unsigned int info = le32_to_cpu(txbd->info);
164
165 if ((info & FOR_EMAC) || !txbd->data || !skb)
166 break;
167
168 if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
169 stats->tx_errors++;
170 stats->tx_dropped++;
171
172 if (info & DEFR)
173 stats->tx_carrier_errors++;
174
175 if (info & LTCL)
176 stats->collisions++;
177
178 if (info & UFLO)
179 stats->tx_fifo_errors++;
180 } else if (likely(info & FIRST_OR_LAST_MASK)) {
181 stats->tx_packets++;
182 stats->tx_bytes += skb->len;
183 }
184
185 dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
186 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
187
188
189 dev_kfree_skb_irq(skb);
190
191 txbd->data = 0;
192 txbd->info = 0;
193 tx_buff->skb = NULL;
194
195 *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
196 }
197
198
199
200
201 smp_mb();
202
203 if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
204 netif_wake_queue(ndev);
205}
206
207
208
209
210
211
212
213
214
215
216static int arc_emac_rx(struct net_device *ndev, int budget)
217{
218 struct arc_emac_priv *priv = netdev_priv(ndev);
219 unsigned int work_done;
220
221 for (work_done = 0; work_done < budget; work_done++) {
222 unsigned int *last_rx_bd = &priv->last_rx_bd;
223 struct net_device_stats *stats = &ndev->stats;
224 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
225 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
226 unsigned int pktlen, info = le32_to_cpu(rxbd->info);
227 struct sk_buff *skb;
228 dma_addr_t addr;
229
230 if (unlikely((info & OWN_MASK) == FOR_EMAC))
231 break;
232
233
234
235
236 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
237
238 if (unlikely((info & FIRST_OR_LAST_MASK) !=
239 FIRST_OR_LAST_MASK)) {
240
241
242
243 if (net_ratelimit())
244 netdev_err(ndev, "incomplete packet received\n");
245
246
247 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
248 stats->rx_errors++;
249 stats->rx_length_errors++;
250 continue;
251 }
252
253 pktlen = info & LEN_MASK;
254 stats->rx_packets++;
255 stats->rx_bytes += pktlen;
256 skb = rx_buff->skb;
257 skb_put(skb, pktlen);
258 skb->dev = ndev;
259 skb->protocol = eth_type_trans(skb, ndev);
260
261 dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
262 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
263
264
265 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
266 EMAC_BUFFER_SIZE);
267 if (unlikely(!rx_buff->skb)) {
268 stats->rx_errors++;
269
270 stats->rx_dropped++;
271 continue;
272 }
273
274
275 netif_receive_skb(skb);
276
277 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
278 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
279 if (dma_mapping_error(&ndev->dev, addr)) {
280 if (net_ratelimit())
281 netdev_err(ndev, "cannot dma map\n");
282 dev_kfree_skb(rx_buff->skb);
283 stats->rx_errors++;
284 continue;
285 }
286 dma_unmap_addr_set(rx_buff, addr, addr);
287 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
288
289 rxbd->data = cpu_to_le32(addr);
290
291
292 wmb();
293
294
295 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
296 }
297
298 return work_done;
299}
300
301
302
303
304
305
306
307
308static int arc_emac_poll(struct napi_struct *napi, int budget)
309{
310 struct net_device *ndev = napi->dev;
311 struct arc_emac_priv *priv = netdev_priv(ndev);
312 unsigned int work_done;
313
314 arc_emac_tx_clean(ndev);
315
316 work_done = arc_emac_rx(ndev, budget);
317 if (work_done < budget) {
318 napi_complete(napi);
319 arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
320 }
321
322 return work_done;
323}
324
325
326
327
328
329
330
331
332
333
334
335static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
336{
337 struct net_device *ndev = dev_instance;
338 struct arc_emac_priv *priv = netdev_priv(ndev);
339 struct net_device_stats *stats = &ndev->stats;
340 unsigned int status;
341
342 status = arc_reg_get(priv, R_STATUS);
343 status &= ~MDIO_MASK;
344
345
346 arc_reg_set(priv, R_STATUS, status);
347
348 if (status & (RXINT_MASK | TXINT_MASK)) {
349 if (likely(napi_schedule_prep(&priv->napi))) {
350 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
351 __napi_schedule(&priv->napi);
352 }
353 }
354
355 if (status & ERR_MASK) {
356
357
358
359
360 if (status & MSER_MASK) {
361 stats->rx_missed_errors += 0x100;
362 stats->rx_errors += 0x100;
363 }
364
365 if (status & RXCR_MASK) {
366 stats->rx_crc_errors += 0x100;
367 stats->rx_errors += 0x100;
368 }
369
370 if (status & RXFR_MASK) {
371 stats->rx_frame_errors += 0x100;
372 stats->rx_errors += 0x100;
373 }
374
375 if (status & RXFL_MASK) {
376 stats->rx_over_errors += 0x100;
377 stats->rx_errors += 0x100;
378 }
379 }
380
381 return IRQ_HANDLED;
382}
383
384#ifdef CONFIG_NET_POLL_CONTROLLER
385static void arc_emac_poll_controller(struct net_device *dev)
386{
387 disable_irq(dev->irq);
388 arc_emac_intr(dev->irq, dev);
389 enable_irq(dev->irq);
390}
391#endif
392
393
394
395
396
397
398
399
400
401
402
403static int arc_emac_open(struct net_device *ndev)
404{
405 struct arc_emac_priv *priv = netdev_priv(ndev);
406 struct phy_device *phy_dev = priv->phy_dev;
407 int i;
408
409 phy_dev->autoneg = AUTONEG_ENABLE;
410 phy_dev->speed = 0;
411 phy_dev->duplex = 0;
412 phy_dev->advertising &= phy_dev->supported;
413
414 priv->last_rx_bd = 0;
415
416
417 for (i = 0; i < RX_BD_NUM; i++) {
418 dma_addr_t addr;
419 unsigned int *last_rx_bd = &priv->last_rx_bd;
420 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
421 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
422
423 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
424 EMAC_BUFFER_SIZE);
425 if (unlikely(!rx_buff->skb))
426 return -ENOMEM;
427
428 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
429 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
430 if (dma_mapping_error(&ndev->dev, addr)) {
431 netdev_err(ndev, "cannot dma map\n");
432 dev_kfree_skb(rx_buff->skb);
433 return -ENOMEM;
434 }
435 dma_unmap_addr_set(rx_buff, addr, addr);
436 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
437
438 rxbd->data = cpu_to_le32(addr);
439
440
441 wmb();
442
443
444 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
445
446 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
447 }
448
449 priv->txbd_curr = 0;
450 priv->txbd_dirty = 0;
451
452
453 memset(priv->txbd, 0, TX_RING_SZ);
454
455
456 arc_reg_set(priv, R_LAFL, 0);
457 arc_reg_set(priv, R_LAFH, 0);
458
459
460 arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
461 arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
462
463
464 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
465
466
467 arc_reg_set(priv, R_CTRL,
468 (RX_BD_NUM << 24) |
469 (TX_BD_NUM << 16) |
470 TXRN_MASK | RXRN_MASK);
471
472 napi_enable(&priv->napi);
473
474
475 arc_reg_or(priv, R_CTRL, EN_MASK);
476
477 phy_start_aneg(priv->phy_dev);
478
479 netif_start_queue(ndev);
480
481 return 0;
482}
483
484
485
486
487
488
489
490
491static void arc_emac_set_rx_mode(struct net_device *ndev)
492{
493 struct arc_emac_priv *priv = netdev_priv(ndev);
494
495 if (ndev->flags & IFF_PROMISC) {
496 arc_reg_or(priv, R_CTRL, PROM_MASK);
497 } else {
498 arc_reg_clr(priv, R_CTRL, PROM_MASK);
499
500 if (ndev->flags & IFF_ALLMULTI) {
501 arc_reg_set(priv, R_LAFL, ~0);
502 arc_reg_set(priv, R_LAFH, ~0);
503 } else {
504 struct netdev_hw_addr *ha;
505 unsigned int filter[2] = { 0, 0 };
506 int bit;
507
508 netdev_for_each_mc_addr(ha, ndev) {
509 bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
510 filter[bit >> 5] |= 1 << (bit & 31);
511 }
512
513 arc_reg_set(priv, R_LAFL, filter[0]);
514 arc_reg_set(priv, R_LAFH, filter[1]);
515 }
516 }
517}
518
519
520
521
522
523
524
525static void arc_free_tx_queue(struct net_device *ndev)
526{
527 struct arc_emac_priv *priv = netdev_priv(ndev);
528 unsigned int i;
529
530 for (i = 0; i < TX_BD_NUM; i++) {
531 struct arc_emac_bd *txbd = &priv->txbd[i];
532 struct buffer_state *tx_buff = &priv->tx_buff[i];
533
534 if (tx_buff->skb) {
535 dma_unmap_single(&ndev->dev,
536 dma_unmap_addr(tx_buff, addr),
537 dma_unmap_len(tx_buff, len),
538 DMA_TO_DEVICE);
539
540
541 dev_kfree_skb_irq(tx_buff->skb);
542 }
543
544 txbd->info = 0;
545 txbd->data = 0;
546 tx_buff->skb = NULL;
547 }
548}
549
550
551
552
553
554
555
556static void arc_free_rx_queue(struct net_device *ndev)
557{
558 struct arc_emac_priv *priv = netdev_priv(ndev);
559 unsigned int i;
560
561 for (i = 0; i < RX_BD_NUM; i++) {
562 struct arc_emac_bd *rxbd = &priv->rxbd[i];
563 struct buffer_state *rx_buff = &priv->rx_buff[i];
564
565 if (rx_buff->skb) {
566 dma_unmap_single(&ndev->dev,
567 dma_unmap_addr(rx_buff, addr),
568 dma_unmap_len(rx_buff, len),
569 DMA_FROM_DEVICE);
570
571
572 dev_kfree_skb_irq(rx_buff->skb);
573 }
574
575 rxbd->info = 0;
576 rxbd->data = 0;
577 rx_buff->skb = NULL;
578 }
579}
580
581
582
583
584
585
586
587
588
589static int arc_emac_stop(struct net_device *ndev)
590{
591 struct arc_emac_priv *priv = netdev_priv(ndev);
592
593 napi_disable(&priv->napi);
594 netif_stop_queue(ndev);
595
596
597 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
598
599
600 arc_reg_clr(priv, R_CTRL, EN_MASK);
601
602
603 arc_free_tx_queue(ndev);
604 arc_free_rx_queue(ndev);
605
606 return 0;
607}
608
609
610
611
612
613
614
615
616static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
617{
618 struct arc_emac_priv *priv = netdev_priv(ndev);
619 struct net_device_stats *stats = &ndev->stats;
620 unsigned long miss, rxerr;
621 u8 rxcrc, rxfram, rxoflow;
622
623 rxerr = arc_reg_get(priv, R_RXERR);
624 miss = arc_reg_get(priv, R_MISS);
625
626 rxcrc = rxerr;
627 rxfram = rxerr >> 8;
628 rxoflow = rxerr >> 16;
629
630 stats->rx_errors += miss;
631 stats->rx_errors += rxcrc + rxfram + rxoflow;
632
633 stats->rx_over_errors += rxoflow;
634 stats->rx_frame_errors += rxfram;
635 stats->rx_crc_errors += rxcrc;
636 stats->rx_missed_errors += miss;
637
638 return stats;
639}
640
641
642
643
644
645
646
647
648
649
650
651static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
652{
653 struct arc_emac_priv *priv = netdev_priv(ndev);
654 unsigned int len, *txbd_curr = &priv->txbd_curr;
655 struct net_device_stats *stats = &ndev->stats;
656 __le32 *info = &priv->txbd[*txbd_curr].info;
657 dma_addr_t addr;
658
659 if (skb_padto(skb, ETH_ZLEN))
660 return NETDEV_TX_OK;
661
662 len = max_t(unsigned int, ETH_ZLEN, skb->len);
663
664 if (unlikely(!arc_emac_tx_avail(priv))) {
665 netif_stop_queue(ndev);
666 netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
667 return NETDEV_TX_BUSY;
668 }
669
670 addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
671 DMA_TO_DEVICE);
672
673 if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
674 stats->tx_dropped++;
675 stats->tx_errors++;
676 dev_kfree_skb(skb);
677 return NETDEV_TX_OK;
678 }
679 dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
680 dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
681
682 priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
683
684
685 wmb();
686
687 skb_tx_timestamp(skb);
688
689 *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
690
691
692 wmb();
693
694 priv->tx_buff[*txbd_curr].skb = skb;
695
696
697 *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
698
699
700
701
702
703 smp_mb();
704
705 if (!arc_emac_tx_avail(priv)) {
706 netif_stop_queue(ndev);
707
708 smp_mb();
709 if (arc_emac_tx_avail(priv))
710 netif_start_queue(ndev);
711 }
712
713 arc_reg_set(priv, R_STATUS, TXPL_MASK);
714
715 return NETDEV_TX_OK;
716}
717
718static void arc_emac_set_address_internal(struct net_device *ndev)
719{
720 struct arc_emac_priv *priv = netdev_priv(ndev);
721 unsigned int addr_low, addr_hi;
722
723 addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
724 addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
725
726 arc_reg_set(priv, R_ADDRL, addr_low);
727 arc_reg_set(priv, R_ADDRH, addr_hi);
728}
729
730
731
732
733
734
735
736
737
738
739
740
741static int arc_emac_set_address(struct net_device *ndev, void *p)
742{
743 struct sockaddr *addr = p;
744
745 if (netif_running(ndev))
746 return -EBUSY;
747
748 if (!is_valid_ether_addr(addr->sa_data))
749 return -EADDRNOTAVAIL;
750
751 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
752
753 arc_emac_set_address_internal(ndev);
754
755 return 0;
756}
757
758static const struct net_device_ops arc_emac_netdev_ops = {
759 .ndo_open = arc_emac_open,
760 .ndo_stop = arc_emac_stop,
761 .ndo_start_xmit = arc_emac_tx,
762 .ndo_set_mac_address = arc_emac_set_address,
763 .ndo_get_stats = arc_emac_stats,
764 .ndo_set_rx_mode = arc_emac_set_rx_mode,
765#ifdef CONFIG_NET_POLL_CONTROLLER
766 .ndo_poll_controller = arc_emac_poll_controller,
767#endif
768};
769
770int arc_emac_probe(struct net_device *ndev, int interface)
771{
772 struct device *dev = ndev->dev.parent;
773 struct resource res_regs;
774 struct device_node *phy_node;
775 struct arc_emac_priv *priv;
776 const char *mac_addr;
777 unsigned int id, clock_frequency, irq;
778 int err;
779
780
781 phy_node = of_parse_phandle(dev->of_node, "phy", 0);
782 if (!phy_node) {
783 dev_err(dev, "failed to retrieve phy description from device tree\n");
784 return -ENODEV;
785 }
786
787
788 err = of_address_to_resource(dev->of_node, 0, &res_regs);
789 if (err) {
790 dev_err(dev, "failed to retrieve registers base from device tree\n");
791 return -ENODEV;
792 }
793
794
795 irq = irq_of_parse_and_map(dev->of_node, 0);
796 if (!irq) {
797 dev_err(dev, "failed to retrieve <irq> value from device tree\n");
798 return -ENODEV;
799 }
800
801 ndev->netdev_ops = &arc_emac_netdev_ops;
802 ndev->ethtool_ops = &arc_emac_ethtool_ops;
803 ndev->watchdog_timeo = TX_TIMEOUT;
804
805 ndev->flags &= ~IFF_MULTICAST;
806
807 priv = netdev_priv(ndev);
808 priv->dev = dev;
809
810 priv->regs = devm_ioremap_resource(dev, &res_regs);
811 if (IS_ERR(priv->regs))
812 return PTR_ERR(priv->regs);
813
814 dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
815
816 if (priv->clk) {
817 err = clk_prepare_enable(priv->clk);
818 if (err) {
819 dev_err(dev, "failed to enable clock\n");
820 return err;
821 }
822
823 clock_frequency = clk_get_rate(priv->clk);
824 } else {
825
826 if (of_property_read_u32(dev->of_node, "clock-frequency",
827 &clock_frequency)) {
828 dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
829 return -EINVAL;
830 }
831 }
832
833 id = arc_reg_get(priv, R_ID);
834
835
836 if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
837 dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
838 err = -ENODEV;
839 goto out_clken;
840 }
841 dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
842
843
844 arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
845
846 ndev->irq = irq;
847 dev_info(dev, "IRQ is %d\n", ndev->irq);
848
849
850 err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
851 ndev->name, ndev);
852 if (err) {
853 dev_err(dev, "could not allocate IRQ\n");
854 goto out_clken;
855 }
856
857
858 mac_addr = of_get_mac_address(dev->of_node);
859
860 if (mac_addr)
861 memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
862 else
863 eth_hw_addr_random(ndev);
864
865 arc_emac_set_address_internal(ndev);
866 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
867
868
869 priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
870 &priv->rxbd_dma, GFP_KERNEL);
871
872 if (!priv->rxbd) {
873 dev_err(dev, "failed to allocate data buffers\n");
874 err = -ENOMEM;
875 goto out_clken;
876 }
877
878 priv->txbd = priv->rxbd + RX_BD_NUM;
879
880 priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
881 dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
882 (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
883
884 err = arc_mdio_probe(priv);
885 if (err) {
886 dev_err(dev, "failed to probe MII bus\n");
887 goto out_clken;
888 }
889
890 priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
891 interface);
892 if (!priv->phy_dev) {
893 dev_err(dev, "of_phy_connect() failed\n");
894 err = -ENODEV;
895 goto out_mdio;
896 }
897
898 dev_info(dev, "connected to %s phy with id 0x%x\n",
899 priv->phy_dev->drv->name, priv->phy_dev->phy_id);
900
901 netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
902
903 err = register_netdev(ndev);
904 if (err) {
905 dev_err(dev, "failed to register network device\n");
906 goto out_netif_api;
907 }
908
909 return 0;
910
911out_netif_api:
912 netif_napi_del(&priv->napi);
913 phy_disconnect(priv->phy_dev);
914 priv->phy_dev = NULL;
915out_mdio:
916 arc_mdio_remove(priv);
917out_clken:
918 if (priv->clk)
919 clk_disable_unprepare(priv->clk);
920 return err;
921}
922EXPORT_SYMBOL_GPL(arc_emac_probe);
923
924int arc_emac_remove(struct net_device *ndev)
925{
926 struct arc_emac_priv *priv = netdev_priv(ndev);
927
928 phy_disconnect(priv->phy_dev);
929 priv->phy_dev = NULL;
930 arc_mdio_remove(priv);
931 unregister_netdev(ndev);
932 netif_napi_del(&priv->napi);
933
934 if (!IS_ERR(priv->clk))
935 clk_disable_unprepare(priv->clk);
936
937 return 0;
938}
939EXPORT_SYMBOL_GPL(arc_emac_remove);
940
941MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
942MODULE_DESCRIPTION("ARC EMAC driver");
943MODULE_LICENSE("GPL");
944