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20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
39
40static int
41mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
42 size_t size, int flags)
43{
44 struct pcie_service_card *card = adapter->card;
45 struct mwifiex_dma_mapping mapping;
46
47 mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
48 if (pci_dma_mapping_error(card->dev, mapping.addr)) {
49 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
50 return -1;
51 }
52 mapping.len = size;
53 mwifiex_store_mapping(skb, &mapping);
54 return 0;
55}
56
57static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
58 struct sk_buff *skb, int flags)
59{
60 struct pcie_service_card *card = adapter->card;
61 struct mwifiex_dma_mapping mapping;
62
63 mwifiex_get_mapping(skb, &mapping);
64 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
65}
66
67
68
69
70static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
71{
72 u32 *cookie_addr;
73 struct pcie_service_card *card = adapter->card;
74 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
75
76 if (!reg->sleep_cookie)
77 return true;
78
79 if (card->sleep_cookie_vbase) {
80 cookie_addr = (u32 *)card->sleep_cookie_vbase;
81 mwifiex_dbg(adapter, INFO,
82 "info: ACCESS_HW: sleep cookie=0x%x\n",
83 *cookie_addr);
84 if (*cookie_addr == FW_AWAKE_COOKIE)
85 return true;
86 }
87
88 return false;
89}
90
91#ifdef CONFIG_PM_SLEEP
92
93
94
95
96
97
98
99
100static int mwifiex_pcie_suspend(struct device *dev)
101{
102 struct mwifiex_adapter *adapter;
103 struct pcie_service_card *card;
104 int hs_actived;
105 struct pci_dev *pdev = to_pci_dev(dev);
106
107 if (pdev) {
108 card = pci_get_drvdata(pdev);
109 if (!card || !card->adapter) {
110 pr_err("Card or adapter structure is not valid\n");
111 return 0;
112 }
113 } else {
114 pr_err("PCIE device is not specified\n");
115 return 0;
116 }
117
118 adapter = card->adapter;
119
120 hs_actived = mwifiex_enable_hs(adapter);
121
122
123 adapter->is_suspended = true;
124 adapter->hs_enabling = false;
125
126 return 0;
127}
128
129
130
131
132
133
134
135
136
137static int mwifiex_pcie_resume(struct device *dev)
138{
139 struct mwifiex_adapter *adapter;
140 struct pcie_service_card *card;
141 struct pci_dev *pdev = to_pci_dev(dev);
142
143 if (pdev) {
144 card = pci_get_drvdata(pdev);
145 if (!card || !card->adapter) {
146 pr_err("Card or adapter structure is not valid\n");
147 return 0;
148 }
149 } else {
150 pr_err("PCIE device is not specified\n");
151 return 0;
152 }
153
154 adapter = card->adapter;
155
156 if (!adapter->is_suspended) {
157 mwifiex_dbg(adapter, WARN,
158 "Device already resumed\n");
159 return 0;
160 }
161
162 adapter->is_suspended = false;
163
164 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
165 MWIFIEX_ASYNC_CMD);
166
167 return 0;
168}
169#endif
170
171
172
173
174
175
176
177static int mwifiex_pcie_probe(struct pci_dev *pdev,
178 const struct pci_device_id *ent)
179{
180 struct pcie_service_card *card;
181
182 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
183 pdev->vendor, pdev->device, pdev->revision);
184
185 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
186 if (!card)
187 return -ENOMEM;
188
189 card->dev = pdev;
190
191 if (ent->driver_data) {
192 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
193 card->pcie.reg = data->reg;
194 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
195 card->pcie.tx_buf_size = data->tx_buf_size;
196 card->pcie.can_dump_fw = data->can_dump_fw;
197 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
198 card->pcie.num_mem_types = data->num_mem_types;
199 card->pcie.can_ext_scan = data->can_ext_scan;
200 }
201
202 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
203 MWIFIEX_PCIE)) {
204 pr_err("%s failed\n", __func__);
205 kfree(card);
206 return -1;
207 }
208
209 return 0;
210}
211
212
213
214
215static void mwifiex_pcie_remove(struct pci_dev *pdev)
216{
217 struct pcie_service_card *card;
218 struct mwifiex_adapter *adapter;
219 struct mwifiex_private *priv;
220
221 card = pci_get_drvdata(pdev);
222 if (!card)
223 return;
224
225 adapter = card->adapter;
226 if (!adapter || !adapter->priv_num)
227 return;
228
229 if (user_rmmod) {
230#ifdef CONFIG_PM_SLEEP
231 if (adapter->is_suspended)
232 mwifiex_pcie_resume(&pdev->dev);
233#endif
234
235 mwifiex_deauthenticate_all(adapter);
236
237 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
238
239 mwifiex_disable_auto_ds(priv);
240
241 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
242 }
243
244 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
245}
246
247static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
248{
249 user_rmmod = 1;
250 mwifiex_pcie_remove(pdev);
251
252 return;
253}
254
255static const struct pci_device_id mwifiex_ids[] = {
256 {
257 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
259 .driver_data = (unsigned long)&mwifiex_pcie8766,
260 },
261 {
262 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
263 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
264 .driver_data = (unsigned long)&mwifiex_pcie8897,
265 },
266 {
267 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
269 .driver_data = (unsigned long)&mwifiex_pcie8997,
270 },
271 {
272 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
273 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
274 .driver_data = (unsigned long)&mwifiex_pcie8997,
275 },
276 {},
277};
278
279MODULE_DEVICE_TABLE(pci, mwifiex_ids);
280
281#ifdef CONFIG_PM_SLEEP
282
283static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
284 mwifiex_pcie_resume);
285#endif
286
287
288static struct pci_driver __refdata mwifiex_pcie = {
289 .name = "mwifiex_pcie",
290 .id_table = mwifiex_ids,
291 .probe = mwifiex_pcie_probe,
292 .remove = mwifiex_pcie_remove,
293#ifdef CONFIG_PM_SLEEP
294 .driver = {
295 .pm = &mwifiex_pcie_pm_ops,
296 },
297#endif
298 .shutdown = mwifiex_pcie_shutdown,
299};
300
301
302
303
304static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
305{
306 struct pcie_service_card *card = adapter->card;
307
308 iowrite32(data, card->pci_mmap1 + reg);
309
310 return 0;
311}
312
313
314
315
316static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
317{
318 struct pcie_service_card *card = adapter->card;
319
320 *data = ioread32(card->pci_mmap1 + reg);
321 if (*data == 0xffffffff)
322 return 0xffffffff;
323
324 return 0;
325}
326
327
328static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
329 int reg, u8 *data)
330{
331 struct pcie_service_card *card = adapter->card;
332
333 *data = ioread8(card->pci_mmap1 + reg);
334
335 return 0;
336}
337
338
339
340
341static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
342{
343 int i = 0;
344
345 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
346 i++;
347 usleep_range(10, 20);
348
349 if (i == 5000)
350 break;
351 }
352
353 return;
354}
355
356static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
357 u32 max_delay_loop_cnt)
358{
359 struct pcie_service_card *card = adapter->card;
360 u8 *buffer;
361 u32 sleep_cookie, count;
362
363 for (count = 0; count < max_delay_loop_cnt; count++) {
364 buffer = card->cmdrsp_buf->data - INTF_HEADER_LEN;
365 sleep_cookie = *(u32 *)buffer;
366
367 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
368 mwifiex_dbg(adapter, INFO,
369 "sleep cookie found at count %d\n", count);
370 break;
371 }
372 usleep_range(20, 30);
373 }
374
375 if (count >= max_delay_loop_cnt)
376 mwifiex_dbg(adapter, INFO,
377 "max count reached while accessing sleep cookie\n");
378}
379
380
381static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
382{
383 u32 fw_status;
384 struct pcie_service_card *card = adapter->card;
385 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
386
387 mwifiex_dbg(adapter, EVENT,
388 "event: Wakeup device...\n");
389
390 if (reg->sleep_cookie)
391 mwifiex_pcie_dev_wakeup_delay(adapter);
392
393
394 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) {
395 mwifiex_dbg(adapter, ERROR,
396 "Reading fw_status register failed\n");
397 return -1;
398 }
399
400 if (reg->sleep_cookie) {
401 mwifiex_pcie_dev_wakeup_delay(adapter);
402 mwifiex_dbg(adapter, INFO,
403 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
404 adapter->ps_state = PS_STATE_AWAKE;
405 }
406
407 return 0;
408}
409
410
411
412
413
414
415static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
416{
417 mwifiex_dbg(adapter, CMD,
418 "cmd: Wakeup device completed\n");
419
420 return 0;
421}
422
423
424
425
426
427
428
429static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
430{
431 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
432 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
433 0x00000000)) {
434 mwifiex_dbg(adapter, ERROR,
435 "Disable host interrupt failed\n");
436 return -1;
437 }
438 }
439
440 return 0;
441}
442
443
444
445
446
447
448
449static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
450{
451 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
452
453 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
454 HOST_INTR_MASK)) {
455 mwifiex_dbg(adapter, ERROR,
456 "Enable host interrupt failed\n");
457 return -1;
458 }
459 }
460
461 return 0;
462}
463
464
465
466
467static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
468{
469 struct pcie_service_card *card = adapter->card;
470 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
471 struct mwifiex_pcie_buf_desc *desc;
472 struct mwifiex_pfu_buf_desc *desc2;
473 int i;
474
475 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
476 card->tx_buf_list[i] = NULL;
477 if (reg->pfu_enabled) {
478 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
479 (sizeof(*desc2) * i);
480 desc2 = card->txbd_ring[i];
481 memset(desc2, 0, sizeof(*desc2));
482 } else {
483 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
484 (sizeof(*desc) * i);
485 desc = card->txbd_ring[i];
486 memset(desc, 0, sizeof(*desc));
487 }
488 }
489
490 return 0;
491}
492
493
494
495
496
497static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
498{
499 struct pcie_service_card *card = adapter->card;
500 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
501 struct sk_buff *skb;
502 struct mwifiex_pcie_buf_desc *desc;
503 struct mwifiex_pfu_buf_desc *desc2;
504 dma_addr_t buf_pa;
505 int i;
506
507 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
508
509 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
510 GFP_KERNEL | GFP_DMA);
511 if (!skb) {
512 mwifiex_dbg(adapter, ERROR,
513 "Unable to allocate skb for RX ring.\n");
514 kfree(card->rxbd_ring_vbase);
515 return -ENOMEM;
516 }
517
518 if (mwifiex_map_pci_memory(adapter, skb,
519 MWIFIEX_RX_DATA_BUF_SIZE,
520 PCI_DMA_FROMDEVICE))
521 return -1;
522
523 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
524
525 mwifiex_dbg(adapter, INFO,
526 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
527 skb, skb->len, skb->data, (u32)buf_pa,
528 (u32)((u64)buf_pa >> 32));
529
530 card->rx_buf_list[i] = skb;
531 if (reg->pfu_enabled) {
532 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
533 (sizeof(*desc2) * i);
534 desc2 = card->rxbd_ring[i];
535 desc2->paddr = buf_pa;
536 desc2->len = (u16)skb->len;
537 desc2->frag_len = (u16)skb->len;
538 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
539 desc2->offset = 0;
540 } else {
541 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
542 (sizeof(*desc) * i));
543 desc = card->rxbd_ring[i];
544 desc->paddr = buf_pa;
545 desc->len = (u16)skb->len;
546 desc->flags = 0;
547 }
548 }
549
550 return 0;
551}
552
553
554
555
556
557static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
558{
559 struct pcie_service_card *card = adapter->card;
560 struct mwifiex_evt_buf_desc *desc;
561 struct sk_buff *skb;
562 dma_addr_t buf_pa;
563 int i;
564
565 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
566
567 skb = dev_alloc_skb(MAX_EVENT_SIZE);
568 if (!skb) {
569 mwifiex_dbg(adapter, ERROR,
570 "Unable to allocate skb for EVENT buf.\n");
571 kfree(card->evtbd_ring_vbase);
572 return -ENOMEM;
573 }
574 skb_put(skb, MAX_EVENT_SIZE);
575
576 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
577 PCI_DMA_FROMDEVICE))
578 return -1;
579
580 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
581
582 mwifiex_dbg(adapter, EVENT,
583 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
584 skb, skb->len, skb->data, (u32)buf_pa,
585 (u32)((u64)buf_pa >> 32));
586
587 card->evt_buf_list[i] = skb;
588 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
589 (sizeof(*desc) * i));
590 desc = card->evtbd_ring[i];
591 desc->paddr = buf_pa;
592 desc->len = (u16)skb->len;
593 desc->flags = 0;
594 }
595
596 return 0;
597}
598
599
600
601
602static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
603{
604 struct pcie_service_card *card = adapter->card;
605 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
606 struct sk_buff *skb;
607 struct mwifiex_pcie_buf_desc *desc;
608 struct mwifiex_pfu_buf_desc *desc2;
609 int i;
610
611 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
612 if (reg->pfu_enabled) {
613 desc2 = card->txbd_ring[i];
614 if (card->tx_buf_list[i]) {
615 skb = card->tx_buf_list[i];
616 mwifiex_unmap_pci_memory(adapter, skb,
617 PCI_DMA_TODEVICE);
618 dev_kfree_skb_any(skb);
619 }
620 memset(desc2, 0, sizeof(*desc2));
621 } else {
622 desc = card->txbd_ring[i];
623 if (card->tx_buf_list[i]) {
624 skb = card->tx_buf_list[i];
625 mwifiex_unmap_pci_memory(adapter, skb,
626 PCI_DMA_TODEVICE);
627 dev_kfree_skb_any(skb);
628 }
629 memset(desc, 0, sizeof(*desc));
630 }
631 card->tx_buf_list[i] = NULL;
632 }
633
634 return;
635}
636
637
638
639
640static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
641{
642 struct pcie_service_card *card = adapter->card;
643 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
644 struct mwifiex_pcie_buf_desc *desc;
645 struct mwifiex_pfu_buf_desc *desc2;
646 struct sk_buff *skb;
647 int i;
648
649 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
650 if (reg->pfu_enabled) {
651 desc2 = card->rxbd_ring[i];
652 if (card->rx_buf_list[i]) {
653 skb = card->rx_buf_list[i];
654 mwifiex_unmap_pci_memory(adapter, skb,
655 PCI_DMA_FROMDEVICE);
656 dev_kfree_skb_any(skb);
657 }
658 memset(desc2, 0, sizeof(*desc2));
659 } else {
660 desc = card->rxbd_ring[i];
661 if (card->rx_buf_list[i]) {
662 skb = card->rx_buf_list[i];
663 mwifiex_unmap_pci_memory(adapter, skb,
664 PCI_DMA_FROMDEVICE);
665 dev_kfree_skb_any(skb);
666 }
667 memset(desc, 0, sizeof(*desc));
668 }
669 card->rx_buf_list[i] = NULL;
670 }
671
672 return;
673}
674
675
676
677
678static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
679{
680 struct pcie_service_card *card = adapter->card;
681 struct mwifiex_evt_buf_desc *desc;
682 struct sk_buff *skb;
683 int i;
684
685 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
686 desc = card->evtbd_ring[i];
687 if (card->evt_buf_list[i]) {
688 skb = card->evt_buf_list[i];
689 mwifiex_unmap_pci_memory(adapter, skb,
690 PCI_DMA_FROMDEVICE);
691 dev_kfree_skb_any(skb);
692 }
693 card->evt_buf_list[i] = NULL;
694 memset(desc, 0, sizeof(*desc));
695 }
696
697 return;
698}
699
700
701
702static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
703{
704 struct pcie_service_card *card = adapter->card;
705 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
706
707
708
709
710
711
712 card->txbd_wrptr = 0;
713
714 if (reg->pfu_enabled)
715 card->txbd_rdptr = 0;
716 else
717 card->txbd_rdptr |= reg->tx_rollover_ind;
718
719
720
721 if (reg->pfu_enabled)
722 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
723 MWIFIEX_MAX_TXRX_BD;
724 else
725 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
726 MWIFIEX_MAX_TXRX_BD;
727
728 mwifiex_dbg(adapter, INFO,
729 "info: txbd_ring: Allocating %d bytes\n",
730 card->txbd_ring_size);
731 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
732 card->txbd_ring_size,
733 &card->txbd_ring_pbase);
734 if (!card->txbd_ring_vbase) {
735 mwifiex_dbg(adapter, ERROR,
736 "allocate consistent memory (%d bytes) failed!\n",
737 card->txbd_ring_size);
738 return -ENOMEM;
739 }
740 mwifiex_dbg(adapter, DATA,
741 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
742 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
743 (u32)((u64)card->txbd_ring_pbase >> 32),
744 card->txbd_ring_size);
745
746 return mwifiex_init_txq_ring(adapter);
747}
748
749static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
750{
751 struct pcie_service_card *card = adapter->card;
752 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
753
754 mwifiex_cleanup_txq_ring(adapter);
755
756 if (card->txbd_ring_vbase)
757 pci_free_consistent(card->dev, card->txbd_ring_size,
758 card->txbd_ring_vbase,
759 card->txbd_ring_pbase);
760 card->txbd_ring_size = 0;
761 card->txbd_wrptr = 0;
762 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
763 card->txbd_ring_vbase = NULL;
764 card->txbd_ring_pbase = 0;
765
766 return 0;
767}
768
769
770
771
772static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
773{
774 struct pcie_service_card *card = adapter->card;
775 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
776
777
778
779
780
781
782 card->rxbd_wrptr = 0;
783 card->rxbd_rdptr = reg->rx_rollover_ind;
784
785 if (reg->pfu_enabled)
786 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
787 MWIFIEX_MAX_TXRX_BD;
788 else
789 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
790 MWIFIEX_MAX_TXRX_BD;
791
792 mwifiex_dbg(adapter, INFO,
793 "info: rxbd_ring: Allocating %d bytes\n",
794 card->rxbd_ring_size);
795 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
796 card->rxbd_ring_size,
797 &card->rxbd_ring_pbase);
798 if (!card->rxbd_ring_vbase) {
799 mwifiex_dbg(adapter, ERROR,
800 "allocate consistent memory (%d bytes) failed!\n",
801 card->rxbd_ring_size);
802 return -ENOMEM;
803 }
804
805 mwifiex_dbg(adapter, DATA,
806 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
807 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
808 (u32)((u64)card->rxbd_ring_pbase >> 32),
809 card->rxbd_ring_size);
810
811 return mwifiex_init_rxq_ring(adapter);
812}
813
814
815
816
817static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
818{
819 struct pcie_service_card *card = adapter->card;
820 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
821
822 mwifiex_cleanup_rxq_ring(adapter);
823
824 if (card->rxbd_ring_vbase)
825 pci_free_consistent(card->dev, card->rxbd_ring_size,
826 card->rxbd_ring_vbase,
827 card->rxbd_ring_pbase);
828 card->rxbd_ring_size = 0;
829 card->rxbd_wrptr = 0;
830 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
831 card->rxbd_ring_vbase = NULL;
832 card->rxbd_ring_pbase = 0;
833
834 return 0;
835}
836
837
838
839
840static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
841{
842 struct pcie_service_card *card = adapter->card;
843 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
844
845
846
847
848
849
850 card->evtbd_wrptr = 0;
851 card->evtbd_rdptr = reg->evt_rollover_ind;
852
853 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
854 MWIFIEX_MAX_EVT_BD;
855
856 mwifiex_dbg(adapter, INFO,
857 "info: evtbd_ring: Allocating %d bytes\n",
858 card->evtbd_ring_size);
859 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
860 card->evtbd_ring_size,
861 &card->evtbd_ring_pbase);
862 if (!card->evtbd_ring_vbase) {
863 mwifiex_dbg(adapter, ERROR,
864 "allocate consistent memory (%d bytes) failed!\n",
865 card->evtbd_ring_size);
866 return -ENOMEM;
867 }
868
869 mwifiex_dbg(adapter, EVENT,
870 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
871 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
872 (u32)((u64)card->evtbd_ring_pbase >> 32),
873 card->evtbd_ring_size);
874
875 return mwifiex_pcie_init_evt_ring(adapter);
876}
877
878
879
880
881static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
882{
883 struct pcie_service_card *card = adapter->card;
884 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
885
886 mwifiex_cleanup_evt_ring(adapter);
887
888 if (card->evtbd_ring_vbase)
889 pci_free_consistent(card->dev, card->evtbd_ring_size,
890 card->evtbd_ring_vbase,
891 card->evtbd_ring_pbase);
892 card->evtbd_wrptr = 0;
893 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
894 card->evtbd_ring_size = 0;
895 card->evtbd_ring_vbase = NULL;
896 card->evtbd_ring_pbase = 0;
897
898 return 0;
899}
900
901
902
903
904static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
905{
906 struct pcie_service_card *card = adapter->card;
907 struct sk_buff *skb;
908
909
910 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
911 if (!skb) {
912 mwifiex_dbg(adapter, ERROR,
913 "Unable to allocate skb for command response data.\n");
914 return -ENOMEM;
915 }
916 skb_put(skb, MWIFIEX_UPLD_SIZE);
917 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
918 PCI_DMA_FROMDEVICE))
919 return -1;
920
921 card->cmdrsp_buf = skb;
922
923 return 0;
924}
925
926
927
928
929static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
930{
931 struct pcie_service_card *card;
932
933 if (!adapter)
934 return 0;
935
936 card = adapter->card;
937
938 if (card && card->cmdrsp_buf) {
939 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
940 PCI_DMA_FROMDEVICE);
941 dev_kfree_skb_any(card->cmdrsp_buf);
942 }
943
944 if (card && card->cmd_buf) {
945 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
946 PCI_DMA_TODEVICE);
947 }
948 return 0;
949}
950
951
952
953
954static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
955{
956 struct pcie_service_card *card = adapter->card;
957
958 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
959 &card->sleep_cookie_pbase);
960 if (!card->sleep_cookie_vbase) {
961 mwifiex_dbg(adapter, ERROR,
962 "pci_alloc_consistent failed!\n");
963 return -ENOMEM;
964 }
965
966 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
967
968 mwifiex_dbg(adapter, INFO,
969 "alloc_scook: sleep cookie=0x%x\n",
970 *((u32 *)card->sleep_cookie_vbase));
971
972 return 0;
973}
974
975
976
977
978static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
979{
980 struct pcie_service_card *card;
981
982 if (!adapter)
983 return 0;
984
985 card = adapter->card;
986
987 if (card && card->sleep_cookie_vbase) {
988 pci_free_consistent(card->dev, sizeof(u32),
989 card->sleep_cookie_vbase,
990 card->sleep_cookie_pbase);
991 card->sleep_cookie_vbase = NULL;
992 }
993
994 return 0;
995}
996
997
998
999
1000
1001static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1002{
1003 struct pcie_service_card *card = adapter->card;
1004
1005 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1006 card->txbd_flush = 1;
1007
1008
1009
1010 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1011 CPU_INTR_DNLD_RDY)) {
1012 mwifiex_dbg(adapter, ERROR,
1013 "failed to assert dnld-rdy interrupt.\n");
1014 return -1;
1015 }
1016 }
1017 return 0;
1018}
1019
1020
1021
1022
1023static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1024{
1025 struct sk_buff *skb;
1026 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1027 struct mwifiex_pcie_buf_desc *desc;
1028 struct mwifiex_pfu_buf_desc *desc2;
1029 struct pcie_service_card *card = adapter->card;
1030 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1031
1032 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1033 mwifiex_pm_wakeup_card(adapter);
1034
1035
1036 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1037 mwifiex_dbg(adapter, ERROR,
1038 "SEND COMP: failed to read reg->tx_rdptr\n");
1039 return -1;
1040 }
1041
1042 mwifiex_dbg(adapter, DATA,
1043 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1044 card->txbd_rdptr, rdptr);
1045
1046 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1047
1048 while (((card->txbd_rdptr & reg->tx_mask) !=
1049 (rdptr & reg->tx_mask)) ||
1050 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1051 (rdptr & reg->tx_rollover_ind))) {
1052 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1053 reg->tx_start_ptr;
1054
1055 skb = card->tx_buf_list[wrdoneidx];
1056
1057 if (skb) {
1058 mwifiex_dbg(adapter, DATA,
1059 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1060 skb, wrdoneidx);
1061 mwifiex_unmap_pci_memory(adapter, skb,
1062 PCI_DMA_TODEVICE);
1063
1064 unmap_count++;
1065
1066 if (card->txbd_flush)
1067 mwifiex_write_data_complete(adapter, skb, 0,
1068 -1);
1069 else
1070 mwifiex_write_data_complete(adapter, skb, 0, 0);
1071 }
1072
1073 card->tx_buf_list[wrdoneidx] = NULL;
1074
1075 if (reg->pfu_enabled) {
1076 desc2 = card->txbd_ring[wrdoneidx];
1077 memset(desc2, 0, sizeof(*desc2));
1078 } else {
1079 desc = card->txbd_ring[wrdoneidx];
1080 memset(desc, 0, sizeof(*desc));
1081 }
1082 switch (card->dev->device) {
1083 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1084 card->txbd_rdptr++;
1085 break;
1086 case PCIE_DEVICE_ID_MARVELL_88W8897:
1087 case PCIE_DEVICE_ID_MARVELL_88W8997:
1088 card->txbd_rdptr += reg->ring_tx_start_ptr;
1089 break;
1090 }
1091
1092
1093 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1094 card->txbd_rdptr = ((card->txbd_rdptr &
1095 reg->tx_rollover_ind) ^
1096 reg->tx_rollover_ind);
1097 }
1098
1099 if (unmap_count)
1100 adapter->data_sent = false;
1101
1102 if (card->txbd_flush) {
1103 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1104 card->txbd_flush = 0;
1105 else
1106 mwifiex_clean_pcie_ring_buf(adapter);
1107 }
1108
1109 return 0;
1110}
1111
1112
1113
1114
1115
1116
1117
1118
1119static int
1120mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1121 struct mwifiex_tx_param *tx_param)
1122{
1123 struct pcie_service_card *card = adapter->card;
1124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1125 u32 wrindx, num_tx_buffs, rx_val;
1126 int ret;
1127 dma_addr_t buf_pa;
1128 struct mwifiex_pcie_buf_desc *desc = NULL;
1129 struct mwifiex_pfu_buf_desc *desc2 = NULL;
1130 __le16 *tmp;
1131
1132 if (!(skb->data && skb->len)) {
1133 mwifiex_dbg(adapter, ERROR,
1134 "%s(): invalid parameter <%p, %#x>\n",
1135 __func__, skb->data, skb->len);
1136 return -1;
1137 }
1138
1139 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1140 mwifiex_pm_wakeup_card(adapter);
1141
1142 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1143 mwifiex_dbg(adapter, DATA,
1144 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1145 card->txbd_rdptr, card->txbd_wrptr);
1146 if (mwifiex_pcie_txbd_not_full(card)) {
1147 u8 *payload;
1148
1149 adapter->data_sent = true;
1150 payload = skb->data;
1151 tmp = (__le16 *)&payload[0];
1152 *tmp = cpu_to_le16((u16)skb->len);
1153 tmp = (__le16 *)&payload[2];
1154 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
1155
1156 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1157 PCI_DMA_TODEVICE))
1158 return -1;
1159
1160 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1161 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1162 card->tx_buf_list[wrindx] = skb;
1163
1164 if (reg->pfu_enabled) {
1165 desc2 = card->txbd_ring[wrindx];
1166 desc2->paddr = buf_pa;
1167 desc2->len = (u16)skb->len;
1168 desc2->frag_len = (u16)skb->len;
1169 desc2->offset = 0;
1170 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1171 MWIFIEX_BD_FLAG_LAST_DESC;
1172 } else {
1173 desc = card->txbd_ring[wrindx];
1174 desc->paddr = buf_pa;
1175 desc->len = (u16)skb->len;
1176 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1177 MWIFIEX_BD_FLAG_LAST_DESC;
1178 }
1179
1180 switch (card->dev->device) {
1181 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1182 card->txbd_wrptr++;
1183 break;
1184 case PCIE_DEVICE_ID_MARVELL_88W8897:
1185 case PCIE_DEVICE_ID_MARVELL_88W8997:
1186 card->txbd_wrptr += reg->ring_tx_start_ptr;
1187 break;
1188 }
1189
1190 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1191 card->txbd_wrptr = ((card->txbd_wrptr &
1192 reg->tx_rollover_ind) ^
1193 reg->tx_rollover_ind);
1194
1195 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1196
1197 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1198 card->txbd_wrptr | rx_val)) {
1199 mwifiex_dbg(adapter, ERROR,
1200 "SEND DATA: failed to write reg->tx_wrptr\n");
1201 ret = -1;
1202 goto done_unmap;
1203 }
1204 if ((mwifiex_pcie_txbd_not_full(card)) &&
1205 tx_param->next_pkt_len) {
1206
1207 mwifiex_dbg(adapter, DATA,
1208 "SEND DATA: delay dnld-rdy interrupt.\n");
1209 adapter->data_sent = false;
1210 } else {
1211
1212 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1213 CPU_INTR_DNLD_RDY)) {
1214 mwifiex_dbg(adapter, ERROR,
1215 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1216 ret = -1;
1217 goto done_unmap;
1218 }
1219 }
1220 mwifiex_dbg(adapter, DATA,
1221 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1222 "%#x> and sent packet to firmware successfully\n",
1223 card->txbd_rdptr, card->txbd_wrptr);
1224 } else {
1225 mwifiex_dbg(adapter, DATA,
1226 "info: TX Ring full, can't send packets to fw\n");
1227 adapter->data_sent = true;
1228
1229 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1230 CPU_INTR_DNLD_RDY))
1231 mwifiex_dbg(adapter, ERROR,
1232 "SEND DATA: failed to assert door-bell intr\n");
1233 return -EBUSY;
1234 }
1235
1236 return -EINPROGRESS;
1237done_unmap:
1238 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1239 card->tx_buf_list[wrindx] = NULL;
1240 if (reg->pfu_enabled)
1241 memset(desc2, 0, sizeof(*desc2));
1242 else
1243 memset(desc, 0, sizeof(*desc));
1244
1245 return ret;
1246}
1247
1248
1249
1250
1251
1252static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1253{
1254 struct pcie_service_card *card = adapter->card;
1255 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1256 u32 wrptr, rd_index, tx_val;
1257 dma_addr_t buf_pa;
1258 int ret = 0;
1259 struct sk_buff *skb_tmp = NULL;
1260 struct mwifiex_pcie_buf_desc *desc;
1261 struct mwifiex_pfu_buf_desc *desc2;
1262
1263 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1264 mwifiex_pm_wakeup_card(adapter);
1265
1266
1267 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1268 mwifiex_dbg(adapter, ERROR,
1269 "RECV DATA: failed to read reg->rx_wrptr\n");
1270 ret = -1;
1271 goto done;
1272 }
1273 card->rxbd_wrptr = wrptr;
1274
1275 while (((wrptr & reg->rx_mask) !=
1276 (card->rxbd_rdptr & reg->rx_mask)) ||
1277 ((wrptr & reg->rx_rollover_ind) ==
1278 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1279 struct sk_buff *skb_data;
1280 u16 rx_len;
1281 __le16 pkt_len;
1282
1283 rd_index = card->rxbd_rdptr & reg->rx_mask;
1284 skb_data = card->rx_buf_list[rd_index];
1285
1286
1287
1288
1289 if (!skb_data)
1290 return -ENOMEM;
1291
1292 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
1293 card->rx_buf_list[rd_index] = NULL;
1294
1295
1296
1297
1298 pkt_len = *((__le16 *)skb_data->data);
1299 rx_len = le16_to_cpu(pkt_len);
1300 if (WARN_ON(rx_len <= INTF_HEADER_LEN ||
1301 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1302 mwifiex_dbg(adapter, ERROR,
1303 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1304 rx_len, card->rxbd_rdptr, wrptr);
1305 dev_kfree_skb_any(skb_data);
1306 } else {
1307 skb_put(skb_data, rx_len);
1308 mwifiex_dbg(adapter, DATA,
1309 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1310 card->rxbd_rdptr, wrptr, rx_len);
1311 skb_pull(skb_data, INTF_HEADER_LEN);
1312 if (adapter->rx_work_enabled) {
1313 skb_queue_tail(&adapter->rx_data_q, skb_data);
1314 adapter->data_received = true;
1315 atomic_inc(&adapter->rx_pending);
1316 } else {
1317 mwifiex_handle_rx_packet(adapter, skb_data);
1318 }
1319 }
1320
1321 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1322 GFP_KERNEL | GFP_DMA);
1323 if (!skb_tmp) {
1324 mwifiex_dbg(adapter, ERROR,
1325 "Unable to allocate skb.\n");
1326 return -ENOMEM;
1327 }
1328
1329 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1330 MWIFIEX_RX_DATA_BUF_SIZE,
1331 PCI_DMA_FROMDEVICE))
1332 return -1;
1333
1334 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1335
1336 mwifiex_dbg(adapter, INFO,
1337 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1338 skb_tmp, rd_index);
1339 card->rx_buf_list[rd_index] = skb_tmp;
1340
1341 if (reg->pfu_enabled) {
1342 desc2 = card->rxbd_ring[rd_index];
1343 desc2->paddr = buf_pa;
1344 desc2->len = skb_tmp->len;
1345 desc2->frag_len = skb_tmp->len;
1346 desc2->offset = 0;
1347 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1348 } else {
1349 desc = card->rxbd_ring[rd_index];
1350 desc->paddr = buf_pa;
1351 desc->len = skb_tmp->len;
1352 desc->flags = 0;
1353 }
1354
1355 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1356 MWIFIEX_MAX_TXRX_BD) {
1357 card->rxbd_rdptr = ((card->rxbd_rdptr &
1358 reg->rx_rollover_ind) ^
1359 reg->rx_rollover_ind);
1360 }
1361 mwifiex_dbg(adapter, DATA,
1362 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1363 card->rxbd_rdptr, wrptr);
1364
1365 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1366
1367 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1368 card->rxbd_rdptr | tx_val)) {
1369 mwifiex_dbg(adapter, DATA,
1370 "RECV DATA: failed to write reg->rx_rdptr\n");
1371 ret = -1;
1372 goto done;
1373 }
1374
1375
1376 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1377 mwifiex_dbg(adapter, ERROR,
1378 "RECV DATA: failed to read reg->rx_wrptr\n");
1379 ret = -1;
1380 goto done;
1381 }
1382 mwifiex_dbg(adapter, DATA,
1383 "info: RECV DATA: Rcvd packet from fw successfully\n");
1384 card->rxbd_wrptr = wrptr;
1385 }
1386
1387done:
1388 return ret;
1389}
1390
1391
1392
1393
1394static int
1395mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1396{
1397 dma_addr_t buf_pa;
1398 struct pcie_service_card *card = adapter->card;
1399 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1400
1401 if (!(skb->data && skb->len)) {
1402 mwifiex_dbg(adapter, ERROR,
1403 "Invalid parameter in %s <%p. len %d>\n",
1404 __func__, skb->data, skb->len);
1405 return -1;
1406 }
1407
1408 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1409 return -1;
1410
1411 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1412
1413
1414
1415
1416 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1417 mwifiex_dbg(adapter, ERROR,
1418 "%s: failed to write download command to boot code.\n",
1419 __func__);
1420 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1421 return -1;
1422 }
1423
1424
1425
1426
1427 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1428 (u32)((u64)buf_pa >> 32))) {
1429 mwifiex_dbg(adapter, ERROR,
1430 "%s: failed to write download command to boot code.\n",
1431 __func__);
1432 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1433 return -1;
1434 }
1435
1436
1437 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1438 mwifiex_dbg(adapter, ERROR,
1439 "%s: failed to write command len to cmd_size scratch reg\n",
1440 __func__);
1441 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1442 return -1;
1443 }
1444
1445
1446 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1447 CPU_INTR_DOOR_BELL)) {
1448 mwifiex_dbg(adapter, ERROR,
1449 "%s: failed to assert door-bell intr\n", __func__);
1450 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1451 return -1;
1452 }
1453
1454 return 0;
1455}
1456
1457
1458
1459
1460static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1461{
1462 struct pcie_service_card *card = adapter->card;
1463 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1464 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1465
1466
1467 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1468 tx_wrap)) {
1469 mwifiex_dbg(adapter, ERROR,
1470 "RECV DATA: failed to write reg->rx_rdptr\n");
1471 return -1;
1472 }
1473 return 0;
1474}
1475
1476
1477
1478static int
1479mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1480{
1481 struct pcie_service_card *card = adapter->card;
1482 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1483 int ret = 0;
1484 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1485 u8 *payload = (u8 *)skb->data;
1486
1487 if (!(skb->data && skb->len)) {
1488 mwifiex_dbg(adapter, ERROR,
1489 "Invalid parameter in %s <%p, %#x>\n",
1490 __func__, skb->data, skb->len);
1491 return -1;
1492 }
1493
1494
1495 if (!card->cmdrsp_buf) {
1496 mwifiex_dbg(adapter, ERROR,
1497 "No response buffer available, send command failed\n");
1498 return -EBUSY;
1499 }
1500
1501 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1502 mwifiex_pm_wakeup_card(adapter);
1503
1504 adapter->cmd_sent = true;
1505
1506 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1507 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1508
1509 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1510 return -1;
1511
1512 card->cmd_buf = skb;
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524 if (card->cmdrsp_buf) {
1525 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1526
1527
1528 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1529 (u32)cmdrsp_buf_pa)) {
1530 mwifiex_dbg(adapter, ERROR,
1531 "Failed to write download cmd to boot code.\n");
1532 ret = -1;
1533 goto done;
1534 }
1535
1536
1537 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1538 (u32)((u64)cmdrsp_buf_pa >> 32))) {
1539 mwifiex_dbg(adapter, ERROR,
1540 "Failed to write download cmd to boot code.\n");
1541 ret = -1;
1542 goto done;
1543 }
1544 }
1545
1546 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1547
1548 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1549 (u32)cmd_buf_pa)) {
1550 mwifiex_dbg(adapter, ERROR,
1551 "Failed to write download cmd to boot code.\n");
1552 ret = -1;
1553 goto done;
1554 }
1555
1556 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1557 (u32)((u64)cmd_buf_pa >> 32))) {
1558 mwifiex_dbg(adapter, ERROR,
1559 "Failed to write download cmd to boot code.\n");
1560 ret = -1;
1561 goto done;
1562 }
1563
1564
1565 if (mwifiex_write_reg(adapter, reg->cmd_size,
1566 card->cmd_buf->len)) {
1567 mwifiex_dbg(adapter, ERROR,
1568 "Failed to write cmd len to reg->cmd_size\n");
1569 ret = -1;
1570 goto done;
1571 }
1572
1573
1574 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1575 CPU_INTR_DOOR_BELL)) {
1576 mwifiex_dbg(adapter, ERROR,
1577 "Failed to assert door-bell intr\n");
1578 ret = -1;
1579 goto done;
1580 }
1581
1582done:
1583 if (ret)
1584 adapter->cmd_sent = false;
1585
1586 return 0;
1587}
1588
1589
1590
1591
1592static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1593{
1594 struct pcie_service_card *card = adapter->card;
1595 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1596 struct sk_buff *skb = card->cmdrsp_buf;
1597 int count = 0;
1598 u16 rx_len;
1599 __le16 pkt_len;
1600
1601 mwifiex_dbg(adapter, CMD,
1602 "info: Rx CMD Response\n");
1603
1604 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
1605
1606
1607 if (card->cmd_buf) {
1608 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1609 PCI_DMA_TODEVICE);
1610 card->cmd_buf = NULL;
1611 }
1612
1613 pkt_len = *((__le16 *)skb->data);
1614 rx_len = le16_to_cpu(pkt_len);
1615 skb_trim(skb, rx_len);
1616 skb_pull(skb, INTF_HEADER_LEN);
1617
1618 if (!adapter->curr_cmd) {
1619 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1620 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1621 skb->len);
1622 mwifiex_pcie_enable_host_int(adapter);
1623 if (mwifiex_write_reg(adapter,
1624 PCIE_CPU_INT_EVENT,
1625 CPU_INTR_SLEEP_CFM_DONE)) {
1626 mwifiex_dbg(adapter, ERROR,
1627 "Write register failed\n");
1628 return -1;
1629 }
1630 mwifiex_delay_for_sleep_cookie(adapter,
1631 MWIFIEX_MAX_DELAY_COUNT);
1632 while (reg->sleep_cookie && (count++ < 10) &&
1633 mwifiex_pcie_ok_to_access_hw(adapter))
1634 usleep_range(50, 60);
1635 } else {
1636 mwifiex_dbg(adapter, ERROR,
1637 "There is no command but got cmdrsp\n");
1638 }
1639 memcpy(adapter->upld_buf, skb->data,
1640 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1641 skb_push(skb, INTF_HEADER_LEN);
1642 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1643 PCI_DMA_FROMDEVICE))
1644 return -1;
1645 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1646 adapter->curr_cmd->resp_skb = skb;
1647 adapter->cmd_resp_received = true;
1648
1649
1650 card->cmdrsp_buf = NULL;
1651
1652
1653
1654
1655 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1656 mwifiex_dbg(adapter, ERROR,
1657 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1658 return -1;
1659 }
1660
1661
1662 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1663 mwifiex_dbg(adapter, ERROR,
1664 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1665 return -1;
1666 }
1667 }
1668
1669 return 0;
1670}
1671
1672
1673
1674
1675static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1676 struct sk_buff *skb)
1677{
1678 struct pcie_service_card *card = adapter->card;
1679
1680 if (skb) {
1681 card->cmdrsp_buf = skb;
1682 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
1683 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1684 PCI_DMA_FROMDEVICE))
1685 return -1;
1686 }
1687
1688 return 0;
1689}
1690
1691
1692
1693
1694static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1695{
1696 struct pcie_service_card *card = adapter->card;
1697 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1698 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1699 u32 wrptr, event;
1700 struct mwifiex_evt_buf_desc *desc;
1701
1702 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1703 mwifiex_pm_wakeup_card(adapter);
1704
1705 if (adapter->event_received) {
1706 mwifiex_dbg(adapter, EVENT,
1707 "info: Event being processed,\t"
1708 "do not process this interrupt just yet\n");
1709 return 0;
1710 }
1711
1712 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1713 mwifiex_dbg(adapter, ERROR,
1714 "info: Invalid read pointer...\n");
1715 return -1;
1716 }
1717
1718
1719 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1720 mwifiex_dbg(adapter, ERROR,
1721 "EventReady: failed to read reg->evt_wrptr\n");
1722 return -1;
1723 }
1724
1725 mwifiex_dbg(adapter, EVENT,
1726 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1727 card->evtbd_rdptr, wrptr);
1728 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1729 & MWIFIEX_EVTBD_MASK)) ||
1730 ((wrptr & reg->evt_rollover_ind) ==
1731 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
1732 struct sk_buff *skb_cmd;
1733 __le16 data_len = 0;
1734 u16 evt_len;
1735
1736 mwifiex_dbg(adapter, INFO,
1737 "info: Read Index: %d\n", rdptr);
1738 skb_cmd = card->evt_buf_list[rdptr];
1739 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
1740
1741
1742
1743 card->evt_buf_list[rdptr] = NULL;
1744 desc = card->evtbd_ring[rdptr];
1745 memset(desc, 0, sizeof(*desc));
1746
1747 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1748 adapter->event_cause = event;
1749
1750
1751 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1752 evt_len = le16_to_cpu(data_len);
1753 skb_trim(skb_cmd, evt_len);
1754 skb_pull(skb_cmd, INTF_HEADER_LEN);
1755 mwifiex_dbg(adapter, EVENT,
1756 "info: Event length: %d\n", evt_len);
1757
1758 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1759 memcpy(adapter->event_body, skb_cmd->data +
1760 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1761 MWIFIEX_EVENT_HEADER_LEN);
1762
1763 adapter->event_received = true;
1764 adapter->event_skb = skb_cmd;
1765
1766
1767
1768
1769
1770 } else {
1771 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1772 CPU_INTR_EVENT_DONE)) {
1773 mwifiex_dbg(adapter, ERROR,
1774 "Write register failed\n");
1775 return -1;
1776 }
1777 }
1778
1779 return 0;
1780}
1781
1782
1783
1784
1785static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1786 struct sk_buff *skb)
1787{
1788 struct pcie_service_card *card = adapter->card;
1789 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1790 int ret = 0;
1791 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1792 u32 wrptr;
1793 struct mwifiex_evt_buf_desc *desc;
1794
1795 if (!skb)
1796 return 0;
1797
1798 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1799 mwifiex_dbg(adapter, ERROR,
1800 "event_complete: Invalid rdptr 0x%x\n",
1801 rdptr);
1802 return -EINVAL;
1803 }
1804
1805
1806 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1807 mwifiex_dbg(adapter, ERROR,
1808 "event_complete: failed to read reg->evt_wrptr\n");
1809 return -1;
1810 }
1811
1812 if (!card->evt_buf_list[rdptr]) {
1813 skb_push(skb, INTF_HEADER_LEN);
1814 skb_put(skb, MAX_EVENT_SIZE - skb->len);
1815 if (mwifiex_map_pci_memory(adapter, skb,
1816 MAX_EVENT_SIZE,
1817 PCI_DMA_FROMDEVICE))
1818 return -1;
1819 card->evt_buf_list[rdptr] = skb;
1820 desc = card->evtbd_ring[rdptr];
1821 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
1822 desc->len = (u16)skb->len;
1823 desc->flags = 0;
1824 skb = NULL;
1825 } else {
1826 mwifiex_dbg(adapter, ERROR,
1827 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1828 rdptr, card->evt_buf_list[rdptr], skb);
1829 }
1830
1831 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1832 card->evtbd_rdptr = ((card->evtbd_rdptr &
1833 reg->evt_rollover_ind) ^
1834 reg->evt_rollover_ind);
1835 }
1836
1837 mwifiex_dbg(adapter, EVENT,
1838 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1839 card->evtbd_rdptr, wrptr);
1840
1841
1842 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1843 card->evtbd_rdptr)) {
1844 mwifiex_dbg(adapter, ERROR,
1845 "event_complete: failed to read reg->evt_rdptr\n");
1846 return -1;
1847 }
1848
1849 mwifiex_dbg(adapter, EVENT,
1850 "info: Check Events Again\n");
1851 ret = mwifiex_pcie_process_event_ready(adapter);
1852
1853 return ret;
1854}
1855
1856
1857
1858
1859
1860
1861
1862
1863static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1864 struct mwifiex_fw_image *fw)
1865{
1866 int ret;
1867 u8 *firmware = fw->fw_buf;
1868 u32 firmware_len = fw->fw_len;
1869 u32 offset = 0;
1870 struct sk_buff *skb;
1871 u32 txlen, tx_blocks = 0, tries, len;
1872 u32 block_retry_cnt = 0;
1873 struct pcie_service_card *card = adapter->card;
1874 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1875
1876 if (!firmware || !firmware_len) {
1877 mwifiex_dbg(adapter, ERROR,
1878 "No firmware image found! Terminating download\n");
1879 return -1;
1880 }
1881
1882 mwifiex_dbg(adapter, INFO,
1883 "info: Downloading FW image (%d bytes)\n",
1884 firmware_len);
1885
1886 if (mwifiex_pcie_disable_host_int(adapter)) {
1887 mwifiex_dbg(adapter, ERROR,
1888 "%s: Disabling interrupts failed.\n", __func__);
1889 return -1;
1890 }
1891
1892 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1893 if (!skb) {
1894 ret = -ENOMEM;
1895 goto done;
1896 }
1897
1898
1899 do {
1900 u32 ireg_intr = 0;
1901
1902
1903 if (offset >= firmware_len)
1904 break;
1905
1906 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1907 ret = mwifiex_read_reg(adapter, reg->cmd_size,
1908 &len);
1909 if (ret) {
1910 mwifiex_dbg(adapter, FATAL,
1911 "Failed reading len from boot code\n");
1912 goto done;
1913 }
1914 if (len)
1915 break;
1916 usleep_range(10, 20);
1917 }
1918
1919 if (!len) {
1920 break;
1921 } else if (len > MWIFIEX_UPLD_SIZE) {
1922 mwifiex_dbg(adapter, ERROR,
1923 "FW download failure @ %d, invalid length %d\n",
1924 offset, len);
1925 ret = -1;
1926 goto done;
1927 }
1928
1929 txlen = len;
1930
1931 if (len & BIT(0)) {
1932 block_retry_cnt++;
1933 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1934 mwifiex_dbg(adapter, ERROR,
1935 "FW download failure @ %d, over max\t"
1936 "retry count\n", offset);
1937 ret = -1;
1938 goto done;
1939 }
1940 mwifiex_dbg(adapter, ERROR,
1941 "FW CRC error indicated by the\t"
1942 "helper: len = 0x%04X, txlen = %d\n",
1943 len, txlen);
1944 len &= ~BIT(0);
1945
1946 txlen = 0;
1947 } else {
1948 block_retry_cnt = 0;
1949
1950
1951 if (firmware_len - offset < txlen)
1952 txlen = firmware_len - offset;
1953
1954 mwifiex_dbg(adapter, INFO, ".");
1955
1956 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1957 card->pcie.blksz_fw_dl;
1958
1959
1960 memmove(skb->data, &firmware[offset], txlen);
1961 }
1962
1963 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1964 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
1965
1966
1967 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
1968 mwifiex_dbg(adapter, ERROR,
1969 "Failed to send firmware download command\n");
1970 ret = -1;
1971 goto done;
1972 }
1973
1974
1975 do {
1976 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1977 &ireg_intr)) {
1978 mwifiex_dbg(adapter, ERROR,
1979 "%s: Failed to read\t"
1980 "interrupt status during fw dnld.\n",
1981 __func__);
1982 mwifiex_unmap_pci_memory(adapter, skb,
1983 PCI_DMA_TODEVICE);
1984 ret = -1;
1985 goto done;
1986 }
1987 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1988 CPU_INTR_DOOR_BELL);
1989
1990 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1991
1992 offset += txlen;
1993 } while (true);
1994
1995 mwifiex_dbg(adapter, MSG,
1996 "info: FW download over, size %d bytes\n", offset);
1997
1998 ret = 0;
1999
2000done:
2001 dev_kfree_skb_any(skb);
2002 return ret;
2003}
2004
2005
2006
2007
2008static int
2009mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2010{
2011 int ret = 0;
2012 u32 firmware_stat;
2013 struct pcie_service_card *card = adapter->card;
2014 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2015 u32 tries;
2016
2017
2018 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2019 HOST_INTR_MASK)) {
2020 mwifiex_dbg(adapter, ERROR,
2021 "Write register failed\n");
2022 return -1;
2023 }
2024
2025 mwifiex_dbg(adapter, INFO,
2026 "Setting driver ready signature\n");
2027 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2028 FIRMWARE_READY_PCIE)) {
2029 mwifiex_dbg(adapter, ERROR,
2030 "Failed to write driver ready signature\n");
2031 return -1;
2032 }
2033
2034
2035 for (tries = 0; tries < poll_num; tries++) {
2036 if (mwifiex_read_reg(adapter, reg->fw_status,
2037 &firmware_stat))
2038 ret = -1;
2039 else
2040 ret = 0;
2041 if (ret)
2042 continue;
2043 if (firmware_stat == FIRMWARE_READY_PCIE) {
2044 ret = 0;
2045 break;
2046 } else {
2047 msleep(100);
2048 ret = -1;
2049 }
2050 }
2051
2052 return ret;
2053}
2054
2055
2056
2057static int
2058mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2059{
2060 u32 winner = 0;
2061 int ret = 0;
2062 struct pcie_service_card *card = adapter->card;
2063 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2064
2065 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2066 ret = -1;
2067 } else if (!winner) {
2068 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2069 adapter->winner = 1;
2070 } else {
2071 mwifiex_dbg(adapter, ERROR,
2072 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
2073 ret, adapter->winner);
2074 }
2075
2076 return ret;
2077}
2078
2079
2080
2081
2082static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2083 int msg_id)
2084{
2085 u32 pcie_ireg;
2086 unsigned long flags;
2087 struct pcie_service_card *card = adapter->card;
2088
2089 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2090 return;
2091
2092 if (card->msix_enable && msg_id >= 0) {
2093 pcie_ireg = BIT(msg_id);
2094 } else {
2095 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2096 &pcie_ireg)) {
2097 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2098 return;
2099 }
2100
2101 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2102 return;
2103
2104
2105 mwifiex_pcie_disable_host_int(adapter);
2106
2107
2108 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2109 ~pcie_ireg)) {
2110 mwifiex_dbg(adapter, ERROR,
2111 "Write register failed\n");
2112 return;
2113 }
2114 }
2115
2116 if (!adapter->pps_uapsd_mode &&
2117 adapter->ps_state == PS_STATE_SLEEP &&
2118 mwifiex_pcie_ok_to_access_hw(adapter)) {
2119
2120
2121
2122
2123 adapter->ps_state = PS_STATE_AWAKE;
2124 adapter->pm_wakeup_fw_try = false;
2125 del_timer(&adapter->wakeup_timer);
2126 }
2127
2128 spin_lock_irqsave(&adapter->int_lock, flags);
2129 adapter->int_status |= pcie_ireg;
2130 spin_unlock_irqrestore(&adapter->int_lock, flags);
2131 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2132}
2133
2134
2135
2136
2137
2138
2139
2140static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2141{
2142 struct mwifiex_msix_context *ctx = context;
2143 struct pci_dev *pdev = ctx->dev;
2144 struct pcie_service_card *card;
2145 struct mwifiex_adapter *adapter;
2146
2147 if (!pdev) {
2148 pr_err("info: %s: pdev is NULL\n", __func__);
2149 goto exit;
2150 }
2151
2152 card = pci_get_drvdata(pdev);
2153 if (!card || !card->adapter) {
2154 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2155 card ? card->adapter : NULL);
2156 goto exit;
2157 }
2158 adapter = card->adapter;
2159
2160 if (adapter->surprise_removed)
2161 goto exit;
2162
2163 if (card->msix_enable)
2164 mwifiex_interrupt_status(adapter, ctx->msg_id);
2165 else
2166 mwifiex_interrupt_status(adapter, -1);
2167
2168 mwifiex_queue_main_work(adapter);
2169
2170exit:
2171 return IRQ_HANDLED;
2172}
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter)
2188{
2189 int ret;
2190 u32 pcie_ireg;
2191 unsigned long flags;
2192
2193 spin_lock_irqsave(&adapter->int_lock, flags);
2194
2195 pcie_ireg = adapter->int_status;
2196 adapter->int_status = 0;
2197 spin_unlock_irqrestore(&adapter->int_lock, flags);
2198
2199 while (pcie_ireg & HOST_INTR_MASK) {
2200 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2201 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
2202 mwifiex_dbg(adapter, INTR,
2203 "info: TX DNLD Done\n");
2204 ret = mwifiex_pcie_send_data_complete(adapter);
2205 if (ret)
2206 return ret;
2207 }
2208 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2209 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
2210 mwifiex_dbg(adapter, INTR,
2211 "info: Rx DATA\n");
2212 ret = mwifiex_pcie_process_recv_data(adapter);
2213 if (ret)
2214 return ret;
2215 }
2216 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2217 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
2218 mwifiex_dbg(adapter, INTR,
2219 "info: Rx EVENT\n");
2220 ret = mwifiex_pcie_process_event_ready(adapter);
2221 if (ret)
2222 return ret;
2223 }
2224
2225 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2226 pcie_ireg &= ~HOST_INTR_CMD_DONE;
2227 if (adapter->cmd_sent) {
2228 mwifiex_dbg(adapter, INTR,
2229 "info: CMD sent Interrupt\n");
2230 adapter->cmd_sent = false;
2231 }
2232
2233 ret = mwifiex_pcie_process_cmd_complete(adapter);
2234 if (ret)
2235 return ret;
2236 }
2237
2238 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2239 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2240 &pcie_ireg)) {
2241 mwifiex_dbg(adapter, ERROR,
2242 "Read register failed\n");
2243 return -1;
2244 }
2245
2246 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2247 if (mwifiex_write_reg(adapter,
2248 PCIE_HOST_INT_STATUS,
2249 ~pcie_ireg)) {
2250 mwifiex_dbg(adapter, ERROR,
2251 "Write register failed\n");
2252 return -1;
2253 }
2254 }
2255
2256 }
2257 }
2258 mwifiex_dbg(adapter, INTR,
2259 "info: cmd_sent=%d data_sent=%d\n",
2260 adapter->cmd_sent, adapter->data_sent);
2261 if (adapter->ps_state != PS_STATE_SLEEP)
2262 mwifiex_pcie_enable_host_int(adapter);
2263
2264 return 0;
2265}
2266
2267static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter)
2268{
2269 int ret;
2270 u32 pcie_ireg;
2271 unsigned long flags;
2272
2273 spin_lock_irqsave(&adapter->int_lock, flags);
2274
2275 pcie_ireg = adapter->int_status;
2276 adapter->int_status = 0;
2277 spin_unlock_irqrestore(&adapter->int_lock, flags);
2278
2279 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2280 mwifiex_dbg(adapter, INTR,
2281 "info: TX DNLD Done\n");
2282 ret = mwifiex_pcie_send_data_complete(adapter);
2283 if (ret)
2284 return ret;
2285 }
2286 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2287 mwifiex_dbg(adapter, INTR,
2288 "info: Rx DATA\n");
2289 ret = mwifiex_pcie_process_recv_data(adapter);
2290 if (ret)
2291 return ret;
2292 }
2293 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2294 mwifiex_dbg(adapter, INTR,
2295 "info: Rx EVENT\n");
2296 ret = mwifiex_pcie_process_event_ready(adapter);
2297 if (ret)
2298 return ret;
2299 }
2300
2301 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2302 if (adapter->cmd_sent) {
2303 mwifiex_dbg(adapter, INTR,
2304 "info: CMD sent Interrupt\n");
2305 adapter->cmd_sent = false;
2306 }
2307
2308 ret = mwifiex_pcie_process_cmd_complete(adapter);
2309 if (ret)
2310 return ret;
2311 }
2312
2313 mwifiex_dbg(adapter, INTR,
2314 "info: cmd_sent=%d data_sent=%d\n",
2315 adapter->cmd_sent, adapter->data_sent);
2316
2317 return 0;
2318}
2319
2320static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2321{
2322 struct pcie_service_card *card = adapter->card;
2323
2324 if (card->msix_enable)
2325 return mwifiex_process_msix_int(adapter);
2326 else
2327 return mwifiex_process_pcie_int(adapter);
2328}
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2341 struct sk_buff *skb,
2342 struct mwifiex_tx_param *tx_param)
2343{
2344 if (!skb) {
2345 mwifiex_dbg(adapter, ERROR,
2346 "Passed NULL skb to %s\n", __func__);
2347 return -1;
2348 }
2349
2350 if (type == MWIFIEX_TYPE_DATA)
2351 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2352 else if (type == MWIFIEX_TYPE_CMD)
2353 return mwifiex_pcie_send_cmd(adapter, skb);
2354
2355 return 0;
2356}
2357
2358
2359
2360static int
2361mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2362{
2363 char *p = drv_buf;
2364 char buf[256], *ptr;
2365 int i;
2366 u32 value;
2367 struct pcie_service_card *card = adapter->card;
2368 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2369 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2370 PCIE_SCRATCH_13_REG,
2371 PCIE_SCRATCH_14_REG};
2372
2373 if (!p)
2374 return 0;
2375
2376 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2377
2378 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2379 mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2380 return 0;
2381 }
2382
2383 ptr = buf;
2384 mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2385 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2386 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2387 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2388 pcie_scratch_reg[i], value);
2389 }
2390
2391 mwifiex_dbg(adapter, MSG, "%s\n", buf);
2392 p += sprintf(p, "%s\n", buf);
2393
2394 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2395
2396 return p - drv_buf;
2397}
2398
2399
2400static enum rdwr_status
2401mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2402{
2403 int ret, tries;
2404 u8 ctrl_data;
2405 u32 fw_status;
2406 struct pcie_service_card *card = adapter->card;
2407 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2408
2409 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2410 return RDWR_STATUS_FAILURE;
2411
2412 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2413 reg->fw_dump_host_ready);
2414 if (ret) {
2415 mwifiex_dbg(adapter, ERROR,
2416 "PCIE write err\n");
2417 return RDWR_STATUS_FAILURE;
2418 }
2419
2420 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2421 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2422 if (ctrl_data == FW_DUMP_DONE)
2423 return RDWR_STATUS_SUCCESS;
2424 if (doneflag && ctrl_data == doneflag)
2425 return RDWR_STATUS_DONE;
2426 if (ctrl_data != reg->fw_dump_host_ready) {
2427 mwifiex_dbg(adapter, WARN,
2428 "The ctrl reg was changed, re-try again!\n");
2429 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2430 reg->fw_dump_host_ready);
2431 if (ret) {
2432 mwifiex_dbg(adapter, ERROR,
2433 "PCIE write err\n");
2434 return RDWR_STATUS_FAILURE;
2435 }
2436 }
2437 usleep_range(100, 200);
2438 }
2439
2440 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2441 return RDWR_STATUS_FAILURE;
2442}
2443
2444
2445static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2446{
2447 struct pcie_service_card *card = adapter->card;
2448 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2449 unsigned int reg, reg_start, reg_end;
2450 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2451 u8 idx, i, read_reg, doneflag = 0;
2452 enum rdwr_status stat;
2453 u32 memory_size;
2454 int ret;
2455
2456 if (!card->pcie.can_dump_fw)
2457 return;
2458
2459 for (idx = 0; idx < adapter->num_mem_types; idx++) {
2460 struct memory_type_mapping *entry =
2461 &adapter->mem_type_mapping_tbl[idx];
2462
2463 if (entry->mem_ptr) {
2464 vfree(entry->mem_ptr);
2465 entry->mem_ptr = NULL;
2466 }
2467 entry->mem_size = 0;
2468 }
2469
2470 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2471
2472
2473 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2474 if (stat == RDWR_STATUS_FAILURE)
2475 return;
2476
2477 reg = creg->fw_dump_start;
2478 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2479
2480
2481 if (fw_dump_num == 0)
2482 dump_num = 1;
2483 else
2484 dump_num = fw_dump_num;
2485
2486
2487 for (idx = 0; idx < dump_num; idx++) {
2488 struct memory_type_mapping *entry =
2489 &adapter->mem_type_mapping_tbl[idx];
2490 memory_size = 0;
2491 if (fw_dump_num != 0) {
2492 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2493 if (stat == RDWR_STATUS_FAILURE)
2494 return;
2495
2496 reg = creg->fw_dump_start;
2497 for (i = 0; i < 4; i++) {
2498 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2499 memory_size |= (read_reg << (i * 8));
2500 reg++;
2501 }
2502 } else {
2503 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2504 }
2505
2506 if (memory_size == 0) {
2507 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2508 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2509 creg->fw_dump_read_done);
2510 if (ret) {
2511 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2512 return;
2513 }
2514 break;
2515 }
2516
2517 mwifiex_dbg(adapter, DUMP,
2518 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2519 entry->mem_ptr = vmalloc(memory_size + 1);
2520 entry->mem_size = memory_size;
2521 if (!entry->mem_ptr) {
2522 mwifiex_dbg(adapter, ERROR,
2523 "Vmalloc %s failed\n", entry->mem_name);
2524 return;
2525 }
2526 dbg_ptr = entry->mem_ptr;
2527 end_ptr = dbg_ptr + memory_size;
2528
2529 doneflag = entry->done_flag;
2530 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2531 entry->mem_name);
2532
2533 do {
2534 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2535 if (RDWR_STATUS_FAILURE == stat)
2536 return;
2537
2538 reg_start = creg->fw_dump_start;
2539 reg_end = creg->fw_dump_end;
2540 for (reg = reg_start; reg <= reg_end; reg++) {
2541 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2542 if (dbg_ptr < end_ptr) {
2543 dbg_ptr++;
2544 continue;
2545 }
2546 mwifiex_dbg(adapter, ERROR,
2547 "pre-allocated buf not enough\n");
2548 tmp_ptr =
2549 vzalloc(memory_size + MWIFIEX_SIZE_4K);
2550 if (!tmp_ptr)
2551 return;
2552 memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2553 vfree(entry->mem_ptr);
2554 entry->mem_ptr = tmp_ptr;
2555 tmp_ptr = NULL;
2556 dbg_ptr = entry->mem_ptr + memory_size;
2557 memory_size += MWIFIEX_SIZE_4K;
2558 end_ptr = entry->mem_ptr + memory_size;
2559 }
2560
2561 if (stat != RDWR_STATUS_DONE)
2562 continue;
2563
2564 mwifiex_dbg(adapter, DUMP,
2565 "%s done: size=0x%tx\n",
2566 entry->mem_name, dbg_ptr - entry->mem_ptr);
2567 break;
2568 } while (true);
2569 }
2570 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2571}
2572
2573static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2574{
2575 mwifiex_drv_info_dump(adapter);
2576 mwifiex_pcie_fw_dump(adapter);
2577 mwifiex_upload_device_dump(adapter);
2578}
2579
2580static unsigned long iface_work_flags;
2581static struct mwifiex_adapter *save_adapter;
2582static void mwifiex_pcie_work(struct work_struct *work)
2583{
2584 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2585 &iface_work_flags))
2586 mwifiex_pcie_device_dump_work(save_adapter);
2587}
2588
2589static DECLARE_WORK(pcie_work, mwifiex_pcie_work);
2590
2591static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2592{
2593 save_adapter = adapter;
2594 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags))
2595 return;
2596
2597 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags);
2598
2599 schedule_work(&pcie_work);
2600}
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2613{
2614 struct pcie_service_card *card = adapter->card;
2615 int ret;
2616 struct pci_dev *pdev = card->dev;
2617 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2618
2619 pci_set_drvdata(pdev, card);
2620
2621 ret = pci_enable_device(pdev);
2622 if (ret)
2623 goto err_enable_dev;
2624
2625 pci_set_master(pdev);
2626
2627 pr_notice("try set_consistent_dma_mask(32)\n");
2628 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2629 if (ret) {
2630 pr_err("set_dma_mask(32) failed\n");
2631 goto err_set_dma_mask;
2632 }
2633
2634 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2635 if (ret) {
2636 pr_err("set_consistent_dma_mask(64) failed\n");
2637 goto err_set_dma_mask;
2638 }
2639
2640 ret = pci_request_region(pdev, 0, DRV_NAME);
2641 if (ret) {
2642 pr_err("req_reg(0) error\n");
2643 goto err_req_region0;
2644 }
2645 card->pci_mmap = pci_iomap(pdev, 0, 0);
2646 if (!card->pci_mmap) {
2647 pr_err("iomap(0) error\n");
2648 ret = -EIO;
2649 goto err_iomap0;
2650 }
2651 ret = pci_request_region(pdev, 2, DRV_NAME);
2652 if (ret) {
2653 pr_err("req_reg(2) error\n");
2654 goto err_req_region2;
2655 }
2656 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2657 if (!card->pci_mmap1) {
2658 pr_err("iomap(2) error\n");
2659 ret = -EIO;
2660 goto err_iomap2;
2661 }
2662
2663 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2664 card->pci_mmap, card->pci_mmap1);
2665
2666 card->cmdrsp_buf = NULL;
2667 ret = mwifiex_pcie_create_txbd_ring(adapter);
2668 if (ret)
2669 goto err_cre_txbd;
2670 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2671 if (ret)
2672 goto err_cre_rxbd;
2673 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2674 if (ret)
2675 goto err_cre_evtbd;
2676 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2677 if (ret)
2678 goto err_alloc_cmdbuf;
2679 if (reg->sleep_cookie) {
2680 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2681 if (ret)
2682 goto err_alloc_cookie;
2683 } else {
2684 card->sleep_cookie_vbase = NULL;
2685 }
2686 return ret;
2687
2688err_alloc_cookie:
2689 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2690err_alloc_cmdbuf:
2691 mwifiex_pcie_delete_evtbd_ring(adapter);
2692err_cre_evtbd:
2693 mwifiex_pcie_delete_rxbd_ring(adapter);
2694err_cre_rxbd:
2695 mwifiex_pcie_delete_txbd_ring(adapter);
2696err_cre_txbd:
2697 pci_iounmap(pdev, card->pci_mmap1);
2698err_iomap2:
2699 pci_release_region(pdev, 2);
2700err_req_region2:
2701 pci_iounmap(pdev, card->pci_mmap);
2702err_iomap0:
2703 pci_release_region(pdev, 0);
2704err_req_region0:
2705err_set_dma_mask:
2706 pci_disable_device(pdev);
2707err_enable_dev:
2708 pci_set_drvdata(pdev, NULL);
2709 return ret;
2710}
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2723{
2724 struct pcie_service_card *card = adapter->card;
2725 struct pci_dev *pdev = card->dev;
2726 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2727
2728 if (user_rmmod) {
2729 mwifiex_dbg(adapter, INFO,
2730 "Clearing driver ready signature\n");
2731 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
2732 mwifiex_dbg(adapter, ERROR,
2733 "Failed to write driver not-ready signature\n");
2734 }
2735
2736 if (pdev) {
2737 pci_iounmap(pdev, card->pci_mmap);
2738 pci_iounmap(pdev, card->pci_mmap1);
2739 pci_disable_device(pdev);
2740 pci_release_region(pdev, 2);
2741 pci_release_region(pdev, 0);
2742 pci_set_drvdata(pdev, NULL);
2743 }
2744 kfree(card);
2745}
2746
2747static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
2748{
2749 int ret, i, j;
2750 struct pcie_service_card *card = adapter->card;
2751 struct pci_dev *pdev = card->dev;
2752
2753 if (card->pcie.reg->msix_support) {
2754 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
2755 card->msix_entries[i].entry = i;
2756 ret = pci_enable_msix_exact(pdev, card->msix_entries,
2757 MWIFIEX_NUM_MSIX_VECTORS);
2758 if (!ret) {
2759 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
2760 card->msix_ctx[i].dev = pdev;
2761 card->msix_ctx[i].msg_id = i;
2762
2763 ret = request_irq(card->msix_entries[i].vector,
2764 mwifiex_pcie_interrupt, 0,
2765 "MWIFIEX_PCIE_MSIX",
2766 &card->msix_ctx[i]);
2767 if (ret)
2768 break;
2769 }
2770
2771 if (ret) {
2772 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
2773 ret);
2774 for (j = 0; j < i; j++)
2775 free_irq(card->msix_entries[j].vector,
2776 &card->msix_ctx[i]);
2777 pci_disable_msix(pdev);
2778 } else {
2779 mwifiex_dbg(adapter, MSG, "MSIx enabled!");
2780 card->msix_enable = 1;
2781 return 0;
2782 }
2783 }
2784 }
2785
2786 if (pci_enable_msi(pdev) != 0)
2787 pci_disable_msi(pdev);
2788 else
2789 card->msi_enable = 1;
2790
2791 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
2792
2793 card->share_irq_ctx.dev = pdev;
2794 card->share_irq_ctx.msg_id = -1;
2795 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2796 "MRVL_PCIE", &card->share_irq_ctx);
2797 if (ret) {
2798 pr_err("request_irq failed: ret=%d\n", ret);
2799 adapter->card = NULL;
2800 return -1;
2801 }
2802
2803 return 0;
2804}
2805
2806
2807
2808
2809
2810
2811static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
2812{
2813 int revision_id = 0;
2814 int version;
2815 struct pcie_service_card *card = adapter->card;
2816
2817 switch (card->dev->device) {
2818 case PCIE_DEVICE_ID_MARVELL_88W8766P:
2819 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
2820 break;
2821 case PCIE_DEVICE_ID_MARVELL_88W8897:
2822 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
2823 mwifiex_read_reg(adapter, 0x0c58, &revision_id);
2824 revision_id &= 0xff00;
2825 switch (revision_id) {
2826 case PCIE8897_A0:
2827 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
2828 break;
2829 case PCIE8897_B0:
2830 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
2831 break;
2832 default:
2833 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
2834
2835 break;
2836 }
2837 break;
2838 case PCIE_DEVICE_ID_MARVELL_88W8997:
2839 mwifiex_read_reg(adapter, 0x0c48, &revision_id);
2840 mwifiex_read_reg(adapter, 0x0cd0, &version);
2841 version &= 0x7;
2842 switch (revision_id) {
2843 case PCIE8997_V2:
2844 if (version == CHIP_VER_PCIEUSB)
2845 strcpy(adapter->fw_name,
2846 PCIEUSB8997_FW_NAME_V2);
2847 else
2848 strcpy(adapter->fw_name,
2849 PCIEUART8997_FW_NAME_V2);
2850 break;
2851 case PCIE8997_Z:
2852 if (version == CHIP_VER_PCIEUSB)
2853 strcpy(adapter->fw_name,
2854 PCIEUSB8997_FW_NAME_Z);
2855 else
2856 strcpy(adapter->fw_name,
2857 PCIEUART8997_FW_NAME_Z);
2858 break;
2859 default:
2860 strcpy(adapter->fw_name, PCIE8997_DEFAULT_FW_NAME);
2861 break;
2862 }
2863 default:
2864 break;
2865 }
2866}
2867
2868
2869
2870
2871
2872
2873static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2874{
2875 struct pcie_service_card *card = adapter->card;
2876 struct pci_dev *pdev = card->dev;
2877
2878
2879 card->adapter = adapter;
2880 adapter->dev = &pdev->dev;
2881
2882 if (mwifiex_pcie_request_irq(adapter))
2883 return -1;
2884
2885 adapter->tx_buf_size = card->pcie.tx_buf_size;
2886 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
2887 adapter->num_mem_types = card->pcie.num_mem_types;
2888 adapter->ext_scan = card->pcie.can_ext_scan;
2889 mwifiex_pcie_get_fw_name(adapter);
2890
2891 return 0;
2892}
2893
2894
2895
2896
2897
2898
2899
2900static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2901{
2902 struct pcie_service_card *card = adapter->card;
2903 const struct mwifiex_pcie_card_reg *reg;
2904 struct pci_dev *pdev = card->dev;
2905 int i;
2906
2907 if (card) {
2908 if (card->msix_enable) {
2909 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
2910 synchronize_irq(card->msix_entries[i].vector);
2911
2912 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
2913 free_irq(card->msix_entries[i].vector,
2914 &card->msix_ctx[i]);
2915
2916 card->msix_enable = 0;
2917 pci_disable_msix(pdev);
2918 } else {
2919 mwifiex_dbg(adapter, INFO,
2920 "%s(): calling free_irq()\n", __func__);
2921 free_irq(card->dev->irq, &card->share_irq_ctx);
2922
2923 if (card->msi_enable)
2924 pci_disable_msi(pdev);
2925 }
2926
2927 reg = card->pcie.reg;
2928 if (reg->sleep_cookie)
2929 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2930
2931 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2932 mwifiex_pcie_delete_evtbd_ring(adapter);
2933 mwifiex_pcie_delete_rxbd_ring(adapter);
2934 mwifiex_pcie_delete_txbd_ring(adapter);
2935 card->cmdrsp_buf = NULL;
2936 }
2937}
2938
2939static struct mwifiex_if_ops pcie_ops = {
2940 .init_if = mwifiex_pcie_init,
2941 .cleanup_if = mwifiex_pcie_cleanup,
2942 .check_fw_status = mwifiex_check_fw_status,
2943 .check_winner_status = mwifiex_check_winner_status,
2944 .prog_fw = mwifiex_prog_fw_w_helper,
2945 .register_dev = mwifiex_register_dev,
2946 .unregister_dev = mwifiex_unregister_dev,
2947 .enable_int = mwifiex_pcie_enable_host_int,
2948 .process_int_status = mwifiex_process_int_status,
2949 .host_to_card = mwifiex_pcie_host_to_card,
2950 .wakeup = mwifiex_pm_wakeup_card,
2951 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2952
2953
2954 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2955 .event_complete = mwifiex_pcie_event_complete,
2956 .update_mp_end_port = NULL,
2957 .cleanup_mpa_buf = NULL,
2958 .init_fw_port = mwifiex_pcie_init_fw_port,
2959 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
2960 .reg_dump = mwifiex_pcie_reg_dump,
2961 .device_dump = mwifiex_pcie_device_dump,
2962};
2963
2964
2965
2966
2967
2968
2969
2970static int mwifiex_pcie_init_module(void)
2971{
2972 int ret;
2973
2974 pr_debug("Marvell PCIe Driver\n");
2975
2976 sema_init(&add_remove_card_sem, 1);
2977
2978
2979 user_rmmod = 0;
2980
2981 ret = pci_register_driver(&mwifiex_pcie);
2982 if (ret)
2983 pr_err("Driver register failed!\n");
2984 else
2985 pr_debug("info: Driver registered successfully!\n");
2986
2987 return ret;
2988}
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999static void mwifiex_pcie_cleanup_module(void)
3000{
3001 if (!down_interruptible(&add_remove_card_sem))
3002 up(&add_remove_card_sem);
3003
3004
3005 user_rmmod = 1;
3006
3007 cancel_work_sync(&pcie_work);
3008 pci_unregister_driver(&mwifiex_pcie);
3009}
3010
3011module_init(mwifiex_pcie_init_module);
3012module_exit(mwifiex_pcie_cleanup_module);
3013
3014MODULE_AUTHOR("Marvell International Ltd.");
3015MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3016MODULE_VERSION(PCIE_VERSION);
3017MODULE_LICENSE("GPL v2");
3018