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26#ifndef __RTL8723BE_PHY_H__
27#define __RTL8723BE_PHY_H__
28
29
30
31
32#define MAX_TX_COUNT 4
33#define TX_1S 0
34#define TX_2S 1
35#define TX_3S 2
36#define TX_4S 3
37
38#define MAX_POWER_INDEX 0x3F
39
40#define MAX_PRECMD_CNT 16
41#define MAX_RFDEPENDCMD_CNT 16
42#define MAX_POSTCMD_CNT 16
43
44#define MAX_DOZE_WAITING_TIMES_9x 64
45
46#define RT_CANNOT_IO(hw) false
47#define HIGHPOWER_RADIOA_ARRAYLEN 22
48
49#define TARGET_CHNL_NUM_2G_5G 59
50
51#define IQK_ADDA_REG_NUM 16
52#define IQK_BB_REG_NUM 9
53#define MAX_TOLERANCE 5
54#define IQK_DELAY_TIME 10
55#define index_mapping_NUM 15
56
57#define APK_BB_REG_NUM 5
58#define APK_AFE_REG_NUM 16
59#define APK_CURVE_REG_NUM 4
60#define PATH_NUM 1
61
62#define LOOP_LIMIT 5
63#define MAX_STALL_TIME 50
64#define ANTENNADIVERSITYVALUE 0x80
65#define MAX_TXPWR_IDX_NMODE_92S 63
66#define RESET_CNT_LIMIT 3
67
68#define IQK_ADDA_REG_NUM 16
69#define IQK_MAC_REG_NUM 4
70
71#define RF6052_MAX_PATH 2
72
73#define CT_OFFSET_MAC_ADDR 0X16
74
75#define CT_OFFSET_CCK_TX_PWR_IDX 0x5A
76#define CT_OFFSET_HT401S_TX_PWR_IDX 0x60
77#define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF 0x66
78#define CT_OFFSET_HT20_TX_PWR_IDX_DIFF 0x69
79#define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF 0x6C
80
81#define CT_OFFSET_HT40_MAX_PWR_OFFSET 0x6F
82#define CT_OFFSET_HT20_MAX_PWR_OFFSET 0x72
83
84#define CT_OFFSET_CHANNEL_PLAH 0x75
85#define CT_OFFSET_THERMAL_METER 0x78
86#define CT_OFFSET_RF_OPTION 0x79
87#define CT_OFFSET_VERSION 0x7E
88#define CT_OFFSET_CUSTOMER_ID 0x7F
89
90#define RTL92C_MAX_PATH_NUM 2
91
92enum baseband_config_type {
93 BASEBAND_CONFIG_PHY_REG = 0,
94 BASEBAND_CONFIG_AGC_TAB = 1,
95};
96
97enum ant_div_type {
98 NO_ANTDIV = 0xFF,
99 CG_TRX_HW_ANTDIV = 0x01,
100 CGCS_RX_HW_ANTDIV = 0x02,
101 FIXED_HW_ANTDIV = 0x03,
102 CG_TRX_SMART_ANTDIV = 0x04,
103 CGCS_RX_SW_ANTDIV = 0x05,
104
105};
106
107u32 rtl8723be_phy_query_rf_reg(struct ieee80211_hw *hw,
108 enum radio_path rfpath,
109 u32 regaddr, u32 bitmask);
110void rtl8723be_phy_set_rf_reg(struct ieee80211_hw *hw,
111 enum radio_path rfpath,
112 u32 regaddr, u32 bitmask, u32 data);
113bool rtl8723be_phy_mac_config(struct ieee80211_hw *hw);
114bool rtl8723be_phy_bb_config(struct ieee80211_hw *hw);
115bool rtl8723be_phy_rf_config(struct ieee80211_hw *hw);
116void rtl8723be_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
117void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw,
118 u8 channel);
119void rtl8723be_phy_scan_operation_backup(struct ieee80211_hw *hw,
120 u8 operation);
121void rtl8723be_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
122void rtl8723be_phy_set_bw_mode(struct ieee80211_hw *hw,
123 enum nl80211_channel_type ch_type);
124void rtl8723be_phy_sw_chnl_callback(struct ieee80211_hw *hw);
125u8 rtl8723be_phy_sw_chnl(struct ieee80211_hw *hw);
126void rtl8723be_phy_iq_calibrate(struct ieee80211_hw *hw,
127 bool b_recovery);
128void rtl8723be_phy_lc_calibrate(struct ieee80211_hw *hw);
129void rtl8723be_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
130bool rtl8723be_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
131 enum radio_path rfpath);
132bool rtl8723be_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
133bool rtl8723be_phy_set_rf_power_state(struct ieee80211_hw *hw,
134 enum rf_pwrstate rfpwr_state);
135#endif
136