1/* 2 * Copyright (C) 2005 David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15#ifndef __LINUX_SPI_H 16#define __LINUX_SPI_H 17 18#include <linux/device.h> 19#include <linux/mod_devicetable.h> 20#include <linux/slab.h> 21#include <linux/kthread.h> 22#include <linux/completion.h> 23#include <linux/scatterlist.h> 24 25struct dma_chan; 26struct spi_master; 27struct spi_transfer; 28struct spi_flash_read_message; 29 30/* 31 * INTERFACES between SPI master-side drivers and SPI infrastructure. 32 * (There's no SPI slave support for Linux yet...) 33 */ 34extern struct bus_type spi_bus_type; 35 36/** 37 * struct spi_statistics - statistics for spi transfers 38 * @lock: lock protecting this structure 39 * 40 * @messages: number of spi-messages handled 41 * @transfers: number of spi_transfers handled 42 * @errors: number of errors during spi_transfer 43 * @timedout: number of timeouts during spi_transfer 44 * 45 * @spi_sync: number of times spi_sync is used 46 * @spi_sync_immediate: 47 * number of times spi_sync is executed immediately 48 * in calling context without queuing and scheduling 49 * @spi_async: number of times spi_async is used 50 * 51 * @bytes: number of bytes transferred to/from device 52 * @bytes_tx: number of bytes sent to device 53 * @bytes_rx: number of bytes received from device 54 * 55 * @transfer_bytes_histo: 56 * transfer bytes histogramm 57 * 58 * @transfers_split_maxsize: 59 * number of transfers that have been split because of 60 * maxsize limit 61 */ 62struct spi_statistics { 63 spinlock_t lock; /* lock for the whole structure */ 64 65 unsigned long messages; 66 unsigned long transfers; 67 unsigned long errors; 68 unsigned long timedout; 69 70 unsigned long spi_sync; 71 unsigned long spi_sync_immediate; 72 unsigned long spi_async; 73 74 unsigned long long bytes; 75 unsigned long long bytes_rx; 76 unsigned long long bytes_tx; 77 78#define SPI_STATISTICS_HISTO_SIZE 17 79 unsigned long transfer_bytes_histo[SPI_STATISTICS_HISTO_SIZE]; 80 81 unsigned long transfers_split_maxsize; 82}; 83 84void spi_statistics_add_transfer_stats(struct spi_statistics *stats, 85 struct spi_transfer *xfer, 86 struct spi_master *master); 87 88#define SPI_STATISTICS_ADD_TO_FIELD(stats, field, count) \ 89 do { \ 90 unsigned long flags; \ 91 spin_lock_irqsave(&(stats)->lock, flags); \ 92 (stats)->field += count; \ 93 spin_unlock_irqrestore(&(stats)->lock, flags); \ 94 } while (0) 95 96#define SPI_STATISTICS_INCREMENT_FIELD(stats, field) \ 97 SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1) 98 99/** 100 * struct spi_device - Master side proxy for an SPI slave device 101 * @dev: Driver model representation of the device. 102 * @master: SPI controller used with the device. 103 * @max_speed_hz: Maximum clock rate to be used with this chip 104 * (on this board); may be changed by the device's driver. 105 * The spi_transfer.speed_hz can override this for each transfer. 106 * @chip_select: Chipselect, distinguishing chips handled by @master. 107 * @mode: The spi mode defines how data is clocked out and in. 108 * This may be changed by the device's driver. 109 * The "active low" default for chipselect mode can be overridden 110 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for 111 * each word in a transfer (by specifying SPI_LSB_FIRST). 112 * @bits_per_word: Data transfers involve one or more words; word sizes 113 * like eight or 12 bits are common. In-memory wordsizes are 114 * powers of two bytes (e.g. 20 bit samples use 32 bits). 115 * This may be changed by the device's driver, or left at the 116 * default (0) indicating protocol words are eight bit bytes. 117 * The spi_transfer.bits_per_word can override this for each transfer. 118 * @irq: Negative, or the number passed to request_irq() to receive 119 * interrupts from this device. 120 * @controller_state: Controller's runtime state 121 * @controller_data: Board-specific definitions for controller, such as 122 * FIFO initialization parameters; from board_info.controller_data 123 * @modalias: Name of the driver to use with this device, or an alias 124 * for that name. This appears in the sysfs "modalias" attribute 125 * for driver coldplugging, and in uevents used for hotplugging 126 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when 127 * when not using a GPIO line) 128 * 129 * @statistics: statistics for the spi_device 130 * 131 * A @spi_device is used to interchange data between an SPI slave 132 * (usually a discrete chip) and CPU memory. 133 * 134 * In @dev, the platform_data is used to hold information about this 135 * device that's meaningful to the device's protocol driver, but not 136 * to its controller. One example might be an identifier for a chip 137 * variant with slightly different functionality; another might be 138 * information about how this particular board wires the chip's pins. 139 */ 140struct spi_device { 141 struct device dev; 142 struct spi_master *master; 143 u32 max_speed_hz; 144 u8 chip_select; 145 u8 bits_per_word; 146 u16 mode; 147#define SPI_CPHA 0x01 /* clock phase */ 148#define SPI_CPOL 0x02 /* clock polarity */ 149#define SPI_MODE_0 (0|0) /* (original MicroWire) */ 150#define SPI_MODE_1 (0|SPI_CPHA) 151#define SPI_MODE_2 (SPI_CPOL|0) 152#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 153#define SPI_CS_HIGH 0x04 /* chipselect active high? */ 154#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ 155#define SPI_3WIRE 0x10 /* SI/SO signals shared */ 156#define SPI_LOOP 0x20 /* loopback mode */ 157#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */ 158#define SPI_READY 0x80 /* slave pulls low to pause */ 159#define SPI_TX_DUAL 0x100 /* transmit with 2 wires */ 160#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ 161#define SPI_RX_DUAL 0x400 /* receive with 2 wires */ 162#define SPI_RX_QUAD 0x800 /* receive with 4 wires */ 163 int irq; 164 void *controller_state; 165 void *controller_data; 166 char modalias[SPI_NAME_SIZE]; 167 int cs_gpio; /* chip select gpio */ 168 169 /* the statistics */ 170 struct spi_statistics statistics; 171 172 /* 173 * likely need more hooks for more protocol options affecting how 174 * the controller talks to each chip, like: 175 * - memory packing (12 bit samples into low bits, others zeroed) 176 * - priority 177 * - drop chipselect after each word 178 * - chipselect delays 179 * - ... 180 */ 181}; 182 183static inline struct spi_device *to_spi_device(struct device *dev) 184{ 185 return dev ? container_of(dev, struct spi_device, dev) : NULL; 186} 187 188/* most drivers won't need to care about device refcounting */ 189static inline struct spi_device *spi_dev_get(struct spi_device *spi) 190{ 191 return (spi && get_device(&spi->dev)) ? spi : NULL; 192} 193 194static inline void spi_dev_put(struct spi_device *spi) 195{ 196 if (spi) 197 put_device(&spi->dev); 198} 199 200/* ctldata is for the bus_master driver's runtime state */ 201static inline void *spi_get_ctldata(struct spi_device *spi) 202{ 203 return spi->controller_state; 204} 205 206static inline void spi_set_ctldata(struct spi_device *spi, void *state) 207{ 208 spi->controller_state = state; 209} 210 211/* device driver data */ 212 213static inline void spi_set_drvdata(struct spi_device *spi, void *data) 214{ 215 dev_set_drvdata(&spi->dev, data); 216} 217 218static inline void *spi_get_drvdata(struct spi_device *spi) 219{ 220 return dev_get_drvdata(&spi->dev); 221} 222 223struct spi_message; 224struct spi_transfer; 225 226/** 227 * struct spi_driver - Host side "protocol" driver 228 * @id_table: List of SPI devices supported by this driver 229 * @probe: Binds this driver to the spi device. Drivers can verify 230 * that the device is actually present, and may need to configure 231 * characteristics (such as bits_per_word) which weren't needed for 232 * the initial configuration done during system setup. 233 * @remove: Unbinds this driver from the spi device 234 * @shutdown: Standard shutdown callback used during system state 235 * transitions such as powerdown/halt and kexec 236 * @driver: SPI device drivers should initialize the name and owner 237 * field of this structure. 238 * 239 * This represents the kind of device driver that uses SPI messages to 240 * interact with the hardware at the other end of a SPI link. It's called 241 * a "protocol" driver because it works through messages rather than talking 242 * directly to SPI hardware (which is what the underlying SPI controller 243 * driver does to pass those messages). These protocols are defined in the 244 * specification for the device(s) supported by the driver. 245 * 246 * As a rule, those device protocols represent the lowest level interface 247 * supported by a driver, and it will support upper level interfaces too. 248 * Examples of such upper levels include frameworks like MTD, networking, 249 * MMC, RTC, filesystem character device nodes, and hardware monitoring. 250 */ 251struct spi_driver { 252 const struct spi_device_id *id_table; 253 int (*probe)(struct spi_device *spi); 254 int (*remove)(struct spi_device *spi); 255 void (*shutdown)(struct spi_device *spi); 256 struct device_driver driver; 257}; 258 259static inline struct spi_driver *to_spi_driver(struct device_driver *drv) 260{ 261 return drv ? container_of(drv, struct spi_driver, driver) : NULL; 262} 263 264extern int __spi_register_driver(struct module *owner, struct spi_driver *sdrv); 265 266/** 267 * spi_unregister_driver - reverse effect of spi_register_driver 268 * @sdrv: the driver to unregister 269 * Context: can sleep 270 */ 271static inline void spi_unregister_driver(struct spi_driver *sdrv) 272{ 273 if (sdrv) 274 driver_unregister(&sdrv->driver); 275} 276 277/* use a define to avoid include chaining to get THIS_MODULE */ 278#define spi_register_driver(driver) \ 279 __spi_register_driver(THIS_MODULE, driver) 280 281/** 282 * module_spi_driver() - Helper macro for registering a SPI driver 283 * @__spi_driver: spi_driver struct 284 * 285 * Helper macro for SPI drivers which do not do anything special in module 286 * init/exit. This eliminates a lot of boilerplate. Each module may only 287 * use this macro once, and calling it replaces module_init() and module_exit() 288 */ 289#define module_spi_driver(__spi_driver) \ 290 module_driver(__spi_driver, spi_register_driver, \ 291 spi_unregister_driver) 292 293/** 294 * struct spi_master - interface to SPI master controller 295 * @dev: device interface to this driver 296 * @list: link with the global spi_master list 297 * @bus_num: board-specific (and often SOC-specific) identifier for a 298 * given SPI controller. 299 * @num_chipselect: chipselects are used to distinguish individual 300 * SPI slaves, and are numbered from zero to num_chipselects. 301 * each slave has a chipselect signal, but it's common that not 302 * every chipselect is connected to a slave. 303 * @dma_alignment: SPI controller constraint on DMA buffers alignment. 304 * @mode_bits: flags understood by this controller driver 305 * @bits_per_word_mask: A mask indicating which values of bits_per_word are 306 * supported by the driver. Bit n indicates that a bits_per_word n+1 is 307 * supported. If set, the SPI core will reject any transfer with an 308 * unsupported bits_per_word. If not set, this value is simply ignored, 309 * and it's up to the individual driver to perform any validation. 310 * @min_speed_hz: Lowest supported transfer speed 311 * @max_speed_hz: Highest supported transfer speed 312 * @flags: other constraints relevant to this driver 313 * @max_transfer_size: function that returns the max transfer size for 314 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used. 315 * @bus_lock_spinlock: spinlock for SPI bus locking 316 * @bus_lock_mutex: mutex for SPI bus locking 317 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use 318 * @setup: updates the device mode and clocking records used by a 319 * device's SPI controller; protocol code may call this. This 320 * must fail if an unrecognized or unsupported mode is requested. 321 * It's always safe to call this unless transfers are pending on 322 * the device whose settings are being modified. 323 * @transfer: adds a message to the controller's transfer queue. 324 * @cleanup: frees controller-specific state 325 * @can_dma: determine whether this master supports DMA 326 * @queued: whether this master is providing an internal message queue 327 * @kworker: thread struct for message pump 328 * @kworker_task: pointer to task for message pump kworker thread 329 * @pump_messages: work struct for scheduling work to the message pump 330 * @queue_lock: spinlock to syncronise access to message queue 331 * @queue: message queue 332 * @idling: the device is entering idle state 333 * @cur_msg: the currently in-flight message 334 * @cur_msg_prepared: spi_prepare_message was called for the currently 335 * in-flight message 336 * @cur_msg_mapped: message has been mapped for DMA 337 * @xfer_completion: used by core transfer_one_message() 338 * @busy: message pump is busy 339 * @running: message pump is running 340 * @rt: whether this queue is set to run as a realtime task 341 * @auto_runtime_pm: the core should ensure a runtime PM reference is held 342 * while the hardware is prepared, using the parent 343 * device for the spidev 344 * @max_dma_len: Maximum length of a DMA transfer for the device. 345 * @prepare_transfer_hardware: a message will soon arrive from the queue 346 * so the subsystem requests the driver to prepare the transfer hardware 347 * by issuing this call 348 * @transfer_one_message: the subsystem calls the driver to transfer a single 349 * message while queuing transfers that arrive in the meantime. When the 350 * driver is finished with this message, it must call 351 * spi_finalize_current_message() so the subsystem can issue the next 352 * message 353 * @unprepare_transfer_hardware: there are currently no more messages on the 354 * queue so the subsystem notifies the driver that it may relax the 355 * hardware by issuing this call 356 * @set_cs: set the logic level of the chip select line. May be called 357 * from interrupt context. 358 * @prepare_message: set up the controller to transfer a single message, 359 * for example doing DMA mapping. Called from threaded 360 * context. 361 * @transfer_one: transfer a single spi_transfer. 362 * - return 0 if the transfer is finished, 363 * - return 1 if the transfer is still in progress. When 364 * the driver is finished with this transfer it must 365 * call spi_finalize_current_transfer() so the subsystem 366 * can issue the next transfer. Note: transfer_one and 367 * transfer_one_message are mutually exclusive; when both 368 * are set, the generic subsystem does not call your 369 * transfer_one callback. 370 * @handle_err: the subsystem calls the driver to handle an error that occurs 371 * in the generic implementation of transfer_one_message(). 372 * @unprepare_message: undo any work done by prepare_message(). 373 * @spi_flash_read: to support spi-controller hardwares that provide 374 * accelerated interface to read from flash devices. 375 * @flash_read_supported: spi device supports flash read 376 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS 377 * number. Any individual value may be -ENOENT for CS lines that 378 * are not GPIOs (driven by the SPI controller itself). 379 * @statistics: statistics for the spi_master 380 * @dma_tx: DMA transmit channel 381 * @dma_rx: DMA receive channel 382 * @dummy_rx: dummy receive buffer for full-duplex devices 383 * @dummy_tx: dummy transmit buffer for full-duplex devices 384 * @fw_translate_cs: If the boot firmware uses different numbering scheme 385 * what Linux expects, this optional hook can be used to translate 386 * between the two. 387 * 388 * Each SPI master controller can communicate with one or more @spi_device 389 * children. These make a small bus, sharing MOSI, MISO and SCK signals 390 * but not chip select signals. Each device may be configured to use a 391 * different clock rate, since those shared signals are ignored unless 392 * the chip is selected. 393 * 394 * The driver for an SPI controller manages access to those devices through 395 * a queue of spi_message transactions, copying data between CPU memory and 396 * an SPI slave device. For each such message it queues, it calls the 397 * message's completion function when the transaction completes. 398 */ 399struct spi_master { 400 struct device dev; 401 402 struct list_head list; 403 404 /* other than negative (== assign one dynamically), bus_num is fully 405 * board-specific. usually that simplifies to being SOC-specific. 406 * example: one SOC has three SPI controllers, numbered 0..2, 407 * and one board's schematics might show it using SPI-2. software 408 * would normally use bus_num=2 for that controller. 409 */ 410 s16 bus_num; 411 412 /* chipselects will be integral to many controllers; some others 413 * might use board-specific GPIOs. 414 */ 415 u16 num_chipselect; 416 417 /* some SPI controllers pose alignment requirements on DMAable 418 * buffers; let protocol drivers know about these requirements. 419 */ 420 u16 dma_alignment; 421 422 /* spi_device.mode flags understood by this controller driver */ 423 u16 mode_bits; 424 425 /* bitmask of supported bits_per_word for transfers */ 426 u32 bits_per_word_mask; 427#define SPI_BPW_MASK(bits) BIT((bits) - 1) 428#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) 429#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1)) 430 431 /* limits on transfer speed */ 432 u32 min_speed_hz; 433 u32 max_speed_hz; 434 435 /* other constraints relevant to this driver */ 436 u16 flags; 437#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ 438#define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */ 439#define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */ 440#define SPI_MASTER_MUST_RX BIT(3) /* requires rx */ 441#define SPI_MASTER_MUST_TX BIT(4) /* requires tx */ 442 443 /* 444 * on some hardware transfer size may be constrained 445 * the limit may depend on device transfer settings 446 */ 447 size_t (*max_transfer_size)(struct spi_device *spi); 448 449 /* lock and mutex for SPI bus locking */ 450 spinlock_t bus_lock_spinlock; 451 struct mutex bus_lock_mutex; 452 453 /* flag indicating that the SPI bus is locked for exclusive use */ 454 bool bus_lock_flag; 455 456 /* Setup mode and clock, etc (spi driver may call many times). 457 * 458 * IMPORTANT: this may be called when transfers to another 459 * device are active. DO NOT UPDATE SHARED REGISTERS in ways 460 * which could break those transfers. 461 */ 462 int (*setup)(struct spi_device *spi); 463 464 /* bidirectional bulk transfers 465 * 466 * + The transfer() method may not sleep; its main role is 467 * just to add the message to the queue. 468 * + For now there's no remove-from-queue operation, or 469 * any other request management 470 * + To a given spi_device, message queueing is pure fifo 471 * 472 * + The master's main job is to process its message queue, 473 * selecting a chip then transferring data 474 * + If there are multiple spi_device children, the i/o queue 475 * arbitration algorithm is unspecified (round robin, fifo, 476 * priority, reservations, preemption, etc) 477 * 478 * + Chipselect stays active during the entire message 479 * (unless modified by spi_transfer.cs_change != 0). 480 * + The message transfers use clock and SPI mode parameters 481 * previously established by setup() for this device 482 */ 483 int (*transfer)(struct spi_device *spi, 484 struct spi_message *mesg); 485 486 /* called on release() to free memory provided by spi_master */ 487 void (*cleanup)(struct spi_device *spi); 488 489 /* 490 * Used to enable core support for DMA handling, if can_dma() 491 * exists and returns true then the transfer will be mapped 492 * prior to transfer_one() being called. The driver should 493 * not modify or store xfer and dma_tx and dma_rx must be set 494 * while the device is prepared. 495 */ 496 bool (*can_dma)(struct spi_master *master, 497 struct spi_device *spi, 498 struct spi_transfer *xfer); 499 500 /* 501 * These hooks are for drivers that want to use the generic 502 * master transfer queueing mechanism. If these are used, the 503 * transfer() function above must NOT be specified by the driver. 504 * Over time we expect SPI drivers to be phased over to this API. 505 */ 506 bool queued; 507 struct kthread_worker kworker; 508 struct task_struct *kworker_task; 509 struct kthread_work pump_messages; 510 spinlock_t queue_lock; 511 struct list_head queue; 512 struct spi_message *cur_msg; 513 bool idling; 514 bool busy; 515 bool running; 516 bool rt; 517 bool auto_runtime_pm; 518 bool cur_msg_prepared; 519 bool cur_msg_mapped; 520 struct completion xfer_completion; 521 size_t max_dma_len; 522 523 int (*prepare_transfer_hardware)(struct spi_master *master); 524 int (*transfer_one_message)(struct spi_master *master, 525 struct spi_message *mesg); 526 int (*unprepare_transfer_hardware)(struct spi_master *master); 527 int (*prepare_message)(struct spi_master *master, 528 struct spi_message *message); 529 int (*unprepare_message)(struct spi_master *master, 530 struct spi_message *message); 531 int (*spi_flash_read)(struct spi_device *spi, 532 struct spi_flash_read_message *msg); 533 bool (*flash_read_supported)(struct spi_device *spi); 534 535 /* 536 * These hooks are for drivers that use a generic implementation 537 * of transfer_one_message() provied by the core. 538 */ 539 void (*set_cs)(struct spi_device *spi, bool enable); 540 int (*transfer_one)(struct spi_master *master, struct spi_device *spi, 541 struct spi_transfer *transfer); 542 void (*handle_err)(struct spi_master *master, 543 struct spi_message *message); 544 545 /* gpio chip select */ 546 int *cs_gpios; 547 548 /* statistics */ 549 struct spi_statistics statistics; 550 551 /* DMA channels for use with core dmaengine helpers */ 552 struct dma_chan *dma_tx; 553 struct dma_chan *dma_rx; 554 555 /* dummy data for full duplex devices */ 556 void *dummy_rx; 557 void *dummy_tx; 558 559 int (*fw_translate_cs)(struct spi_master *master, unsigned cs); 560}; 561 562static inline void *spi_master_get_devdata(struct spi_master *master) 563{ 564 return dev_get_drvdata(&master->dev); 565} 566 567static inline void spi_master_set_devdata(struct spi_master *master, void *data) 568{ 569 dev_set_drvdata(&master->dev, data); 570} 571 572static inline struct spi_master *spi_master_get(struct spi_master *master) 573{ 574 if (!master || !get_device(&master->dev)) 575 return NULL; 576 return master; 577} 578 579static inline void spi_master_put(struct spi_master *master) 580{ 581 if (master) 582 put_device(&master->dev); 583} 584 585/* PM calls that need to be issued by the driver */ 586extern int spi_master_suspend(struct spi_master *master); 587extern int spi_master_resume(struct spi_master *master); 588 589/* Calls the driver make to interact with the message queue */ 590extern struct spi_message *spi_get_next_queued_message(struct spi_master *master); 591extern void spi_finalize_current_message(struct spi_master *master); 592extern void spi_finalize_current_transfer(struct spi_master *master); 593 594/* the spi driver core manages memory for the spi_master classdev */ 595extern struct spi_master * 596spi_alloc_master(struct device *host, unsigned size); 597 598extern int spi_register_master(struct spi_master *master); 599extern int devm_spi_register_master(struct device *dev, 600 struct spi_master *master); 601extern void spi_unregister_master(struct spi_master *master); 602 603extern struct spi_master *spi_busnum_to_master(u16 busnum); 604 605/* 606 * SPI resource management while processing a SPI message 607 */ 608 609typedef void (*spi_res_release_t)(struct spi_master *master, 610 struct spi_message *msg, 611 void *res); 612 613/** 614 * struct spi_res - spi resource management structure 615 * @entry: list entry 616 * @release: release code called prior to freeing this resource 617 * @data: extra data allocated for the specific use-case 618 * 619 * this is based on ideas from devres, but focused on life-cycle 620 * management during spi_message processing 621 */ 622struct spi_res { 623 struct list_head entry; 624 spi_res_release_t release; 625 unsigned long long data[]; /* guarantee ull alignment */ 626}; 627 628extern void *spi_res_alloc(struct spi_device *spi, 629 spi_res_release_t release, 630 size_t size, gfp_t gfp); 631extern void spi_res_add(struct spi_message *message, void *res); 632extern void spi_res_free(void *res); 633 634extern void spi_res_release(struct spi_master *master, 635 struct spi_message *message); 636 637/*---------------------------------------------------------------------------*/ 638 639/* 640 * I/O INTERFACE between SPI controller and protocol drivers 641 * 642 * Protocol drivers use a queue of spi_messages, each transferring data 643 * between the controller and memory buffers. 644 * 645 * The spi_messages themselves consist of a series of read+write transfer 646 * segments. Those segments always read the same number of bits as they 647 * write; but one or the other is easily ignored by passing a null buffer 648 * pointer. (This is unlike most types of I/O API, because SPI hardware 649 * is full duplex.) 650 * 651 * NOTE: Allocation of spi_transfer and spi_message memory is entirely 652 * up to the protocol driver, which guarantees the integrity of both (as 653 * well as the data buffers) for as long as the message is queued. 654 */ 655 656/** 657 * struct spi_transfer - a read/write buffer pair 658 * @tx_buf: data to be written (dma-safe memory), or NULL 659 * @rx_buf: data to be read (dma-safe memory), or NULL 660 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped 661 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped 662 * @tx_nbits: number of bits used for writing. If 0 the default 663 * (SPI_NBITS_SINGLE) is used. 664 * @rx_nbits: number of bits used for reading. If 0 the default 665 * (SPI_NBITS_SINGLE) is used. 666 * @len: size of rx and tx buffers (in bytes) 667 * @speed_hz: Select a speed other than the device default for this 668 * transfer. If 0 the default (from @spi_device) is used. 669 * @bits_per_word: select a bits_per_word other than the device default 670 * for this transfer. If 0 the default (from @spi_device) is used. 671 * @cs_change: affects chipselect after this transfer completes 672 * @delay_usecs: microseconds to delay after this transfer before 673 * (optionally) changing the chipselect status, then starting 674 * the next transfer or completing this @spi_message. 675 * @transfer_list: transfers are sequenced through @spi_message.transfers 676 * @tx_sg: Scatterlist for transmit, currently not for client use 677 * @rx_sg: Scatterlist for receive, currently not for client use 678 * 679 * SPI transfers always write the same number of bytes as they read. 680 * Protocol drivers should always provide @rx_buf and/or @tx_buf. 681 * In some cases, they may also want to provide DMA addresses for 682 * the data being transferred; that may reduce overhead, when the 683 * underlying driver uses dma. 684 * 685 * If the transmit buffer is null, zeroes will be shifted out 686 * while filling @rx_buf. If the receive buffer is null, the data 687 * shifted in will be discarded. Only "len" bytes shift out (or in). 688 * It's an error to try to shift out a partial word. (For example, by 689 * shifting out three bytes with word size of sixteen or twenty bits; 690 * the former uses two bytes per word, the latter uses four bytes.) 691 * 692 * In-memory data values are always in native CPU byte order, translated 693 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So 694 * for example when bits_per_word is sixteen, buffers are 2N bytes long 695 * (@len = 2N) and hold N sixteen bit words in CPU byte order. 696 * 697 * When the word size of the SPI transfer is not a power-of-two multiple 698 * of eight bits, those in-memory words include extra bits. In-memory 699 * words are always seen by protocol drivers as right-justified, so the 700 * undefined (rx) or unused (tx) bits are always the most significant bits. 701 * 702 * All SPI transfers start with the relevant chipselect active. Normally 703 * it stays selected until after the last transfer in a message. Drivers 704 * can affect the chipselect signal using cs_change. 705 * 706 * (i) If the transfer isn't the last one in the message, this flag is 707 * used to make the chipselect briefly go inactive in the middle of the 708 * message. Toggling chipselect in this way may be needed to terminate 709 * a chip command, letting a single spi_message perform all of group of 710 * chip transactions together. 711 * 712 * (ii) When the transfer is the last one in the message, the chip may 713 * stay selected until the next transfer. On multi-device SPI busses 714 * with nothing blocking messages going to other devices, this is just 715 * a performance hint; starting a message to another device deselects 716 * this one. But in other cases, this can be used to ensure correctness. 717 * Some devices need protocol transactions to be built from a series of 718 * spi_message submissions, where the content of one message is determined 719 * by the results of previous messages and where the whole transaction 720 * ends when the chipselect goes intactive. 721 * 722 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information 723 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these 724 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x) 725 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer. 726 * 727 * The code that submits an spi_message (and its spi_transfers) 728 * to the lower layers is responsible for managing its memory. 729 * Zero-initialize every field you don't set up explicitly, to 730 * insulate against future API updates. After you submit a message 731 * and its transfers, ignore them until its completion callback. 732 */ 733struct spi_transfer { 734 /* it's ok if tx_buf == rx_buf (right?) 735 * for MicroWire, one buffer must be null 736 * buffers must work with dma_*map_single() calls, unless 737 * spi_message.is_dma_mapped reports a pre-existing mapping 738 */ 739 const void *tx_buf; 740 void *rx_buf; 741 unsigned len; 742 743 dma_addr_t tx_dma; 744 dma_addr_t rx_dma; 745 struct sg_table tx_sg; 746 struct sg_table rx_sg; 747 748 unsigned cs_change:1; 749 unsigned tx_nbits:3; 750 unsigned rx_nbits:3; 751#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ 752#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ 753#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ 754 u8 bits_per_word; 755 u16 delay_usecs; 756 u32 speed_hz; 757 758 struct list_head transfer_list; 759}; 760 761/** 762 * struct spi_message - one multi-segment SPI transaction 763 * @transfers: list of transfer segments in this transaction 764 * @spi: SPI device to which the transaction is queued 765 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual 766 * addresses for each transfer buffer 767 * @complete: called to report transaction completions 768 * @context: the argument to complete() when it's called 769 * @frame_length: the total number of bytes in the message 770 * @actual_length: the total number of bytes that were transferred in all 771 * successful segments 772 * @status: zero for success, else negative errno 773 * @queue: for use by whichever driver currently owns the message 774 * @state: for use by whichever driver currently owns the message 775 * @resources: for resource management when the spi message is processed 776 * 777 * A @spi_message is used to execute an atomic sequence of data transfers, 778 * each represented by a struct spi_transfer. The sequence is "atomic" 779 * in the sense that no other spi_message may use that SPI bus until that 780 * sequence completes. On some systems, many such sequences can execute as 781 * as single programmed DMA transfer. On all systems, these messages are 782 * queued, and might complete after transactions to other devices. Messages 783 * sent to a given spi_device are always executed in FIFO order. 784 * 785 * The code that submits an spi_message (and its spi_transfers) 786 * to the lower layers is responsible for managing its memory. 787 * Zero-initialize every field you don't set up explicitly, to 788 * insulate against future API updates. After you submit a message 789 * and its transfers, ignore them until its completion callback. 790 */ 791struct spi_message { 792 struct list_head transfers; 793 794 struct spi_device *spi; 795 796 unsigned is_dma_mapped:1; 797 798 /* REVISIT: we might want a flag affecting the behavior of the 799 * last transfer ... allowing things like "read 16 bit length L" 800 * immediately followed by "read L bytes". Basically imposing 801 * a specific message scheduling algorithm. 802 * 803 * Some controller drivers (message-at-a-time queue processing) 804 * could provide that as their default scheduling algorithm. But 805 * others (with multi-message pipelines) could need a flag to 806 * tell them about such special cases. 807 */ 808 809 /* completion is reported through a callback */ 810 void (*complete)(void *context); 811 void *context; 812 unsigned frame_length; 813 unsigned actual_length; 814 int status; 815 816 /* for optional use by whatever driver currently owns the 817 * spi_message ... between calls to spi_async and then later 818 * complete(), that's the spi_master controller driver. 819 */ 820 struct list_head queue; 821 void *state; 822 823 /* list of spi_res reources when the spi message is processed */ 824 struct list_head resources; 825}; 826 827static inline void spi_message_init_no_memset(struct spi_message *m) 828{ 829 INIT_LIST_HEAD(&m->transfers); 830 INIT_LIST_HEAD(&m->resources); 831} 832 833static inline void spi_message_init(struct spi_message *m) 834{ 835 memset(m, 0, sizeof *m); 836 spi_message_init_no_memset(m); 837} 838 839static inline void 840spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) 841{ 842 list_add_tail(&t->transfer_list, &m->transfers); 843} 844 845static inline void 846spi_transfer_del(struct spi_transfer *t) 847{ 848 list_del(&t->transfer_list); 849} 850 851/** 852 * spi_message_init_with_transfers - Initialize spi_message and append transfers 853 * @m: spi_message to be initialized 854 * @xfers: An array of spi transfers 855 * @num_xfers: Number of items in the xfer array 856 * 857 * This function initializes the given spi_message and adds each spi_transfer in 858 * the given array to the message. 859 */ 860static inline void 861spi_message_init_with_transfers(struct spi_message *m, 862struct spi_transfer *xfers, unsigned int num_xfers) 863{ 864 unsigned int i; 865 866 spi_message_init(m); 867 for (i = 0; i < num_xfers; ++i) 868 spi_message_add_tail(&xfers[i], m); 869} 870 871/* It's fine to embed message and transaction structures in other data 872 * structures so long as you don't free them while they're in use. 873 */ 874 875static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) 876{ 877 struct spi_message *m; 878 879 m = kzalloc(sizeof(struct spi_message) 880 + ntrans * sizeof(struct spi_transfer), 881 flags); 882 if (m) { 883 unsigned i; 884 struct spi_transfer *t = (struct spi_transfer *)(m + 1); 885 886 INIT_LIST_HEAD(&m->transfers); 887 for (i = 0; i < ntrans; i++, t++) 888 spi_message_add_tail(t, m); 889 } 890 return m; 891} 892 893static inline void spi_message_free(struct spi_message *m) 894{ 895 kfree(m); 896} 897 898extern int spi_setup(struct spi_device *spi); 899extern int spi_async(struct spi_device *spi, struct spi_message *message); 900extern int spi_async_locked(struct spi_device *spi, 901 struct spi_message *message); 902 903static inline size_t 904spi_max_transfer_size(struct spi_device *spi) 905{ 906 struct spi_master *master = spi->master; 907 if (!master->max_transfer_size) 908 return SIZE_MAX; 909 return master->max_transfer_size(spi); 910} 911 912/*---------------------------------------------------------------------------*/ 913 914/* SPI transfer replacement methods which make use of spi_res */ 915 916struct spi_replaced_transfers; 917typedef void (*spi_replaced_release_t)(struct spi_master *master, 918 struct spi_message *msg, 919 struct spi_replaced_transfers *res); 920/** 921 * struct spi_replaced_transfers - structure describing the spi_transfer 922 * replacements that have occurred 923 * so that they can get reverted 924 * @release: some extra release code to get executed prior to 925 * relasing this structure 926 * @extradata: pointer to some extra data if requested or NULL 927 * @replaced_transfers: transfers that have been replaced and which need 928 * to get restored 929 * @replaced_after: the transfer after which the @replaced_transfers 930 * are to get re-inserted 931 * @inserted: number of transfers inserted 932 * @inserted_transfers: array of spi_transfers of array-size @inserted, 933 * that have been replacing replaced_transfers 934 * 935 * note: that @extradata will point to @inserted_transfers[@inserted] 936 * if some extra allocation is requested, so alignment will be the same 937 * as for spi_transfers 938 */ 939struct spi_replaced_transfers { 940 spi_replaced_release_t release; 941 void *extradata; 942 struct list_head replaced_transfers; 943 struct list_head *replaced_after; 944 size_t inserted; 945 struct spi_transfer inserted_transfers[]; 946}; 947 948extern struct spi_replaced_transfers *spi_replace_transfers( 949 struct spi_message *msg, 950 struct spi_transfer *xfer_first, 951 size_t remove, 952 size_t insert, 953 spi_replaced_release_t release, 954 size_t extradatasize, 955 gfp_t gfp); 956 957/*---------------------------------------------------------------------------*/ 958 959/* SPI transfer transformation methods */ 960 961extern int spi_split_transfers_maxsize(struct spi_master *master, 962 struct spi_message *msg, 963 size_t maxsize, 964 gfp_t gfp); 965 966/*---------------------------------------------------------------------------*/ 967 968/* All these synchronous SPI transfer routines are utilities layered 969 * over the core async transfer primitive. Here, "synchronous" means 970 * they will sleep uninterruptibly until the async transfer completes. 971 */ 972 973extern int spi_sync(struct spi_device *spi, struct spi_message *message); 974extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message); 975extern int spi_bus_lock(struct spi_master *master); 976extern int spi_bus_unlock(struct spi_master *master); 977 978/** 979 * spi_write - SPI synchronous write 980 * @spi: device to which data will be written 981 * @buf: data buffer 982 * @len: data buffer size 983 * Context: can sleep 984 * 985 * This function writes the buffer @buf. 986 * Callable only from contexts that can sleep. 987 * 988 * Return: zero on success, else a negative error code. 989 */ 990static inline int 991spi_write(struct spi_device *spi, const void *buf, size_t len) 992{ 993 struct spi_transfer t = { 994 .tx_buf = buf, 995 .len = len, 996 }; 997 struct spi_message m; 998 999 spi_message_init(&m); 1000 spi_message_add_tail(&t, &m);
1001 return spi_sync(spi, &m); 1002} 1003 1004/** 1005 * spi_read - SPI synchronous read 1006 * @spi: device from which data will be read 1007 * @buf: data buffer 1008 * @len: data buffer size 1009 * Context: can sleep 1010 * 1011 * This function reads the buffer @buf. 1012 * Callable only from contexts that can sleep. 1013 * 1014 * Return: zero on success, else a negative error code. 1015 */ 1016static inline int 1017spi_read(struct spi_device *spi, void *buf, size_t len) 1018{ 1019 struct spi_transfer t = { 1020 .rx_buf = buf, 1021 .len = len, 1022 }; 1023 struct spi_message m; 1024 1025 spi_message_init(&m); 1026 spi_message_add_tail(&t, &m); 1027 return spi_sync(spi, &m); 1028} 1029 1030/** 1031 * spi_sync_transfer - synchronous SPI data transfer 1032 * @spi: device with which data will be exchanged 1033 * @xfers: An array of spi_transfers 1034 * @num_xfers: Number of items in the xfer array 1035 * Context: can sleep 1036 * 1037 * Does a synchronous SPI data transfer of the given spi_transfer array. 1038 * 1039 * For more specific semantics see spi_sync(). 1040 * 1041 * Return: Return: zero on success, else a negative error code. 1042 */ 1043static inline int 1044spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, 1045 unsigned int num_xfers) 1046{ 1047 struct spi_message msg; 1048 1049 spi_message_init_with_transfers(&msg, xfers, num_xfers); 1050 1051 return spi_sync(spi, &msg); 1052} 1053 1054/* this copies txbuf and rxbuf data; for small transfers only! */ 1055extern int spi_write_then_read(struct spi_device *spi, 1056 const void *txbuf, unsigned n_tx, 1057 void *rxbuf, unsigned n_rx); 1058 1059/** 1060 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read 1061 * @spi: device with which data will be exchanged 1062 * @cmd: command to be written before data is read back 1063 * Context: can sleep 1064 * 1065 * Callable only from contexts that can sleep. 1066 * 1067 * Return: the (unsigned) eight bit number returned by the 1068 * device, or else a negative error code. 1069 */ 1070static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) 1071{ 1072 ssize_t status; 1073 u8 result; 1074 1075 status = spi_write_then_read(spi, &cmd, 1, &result, 1); 1076 1077 /* return negative errno or unsigned value */ 1078 return (status < 0) ? status : result; 1079} 1080 1081/** 1082 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read 1083 * @spi: device with which data will be exchanged 1084 * @cmd: command to be written before data is read back 1085 * Context: can sleep 1086 * 1087 * The number is returned in wire-order, which is at least sometimes 1088 * big-endian. 1089 * 1090 * Callable only from contexts that can sleep. 1091 * 1092 * Return: the (unsigned) sixteen bit number returned by the 1093 * device, or else a negative error code. 1094 */ 1095static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) 1096{ 1097 ssize_t status; 1098 u16 result; 1099 1100 status = spi_write_then_read(spi, &cmd, 1, &result, 2); 1101 1102 /* return negative errno or unsigned value */ 1103 return (status < 0) ? status : result; 1104} 1105 1106/** 1107 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read 1108 * @spi: device with which data will be exchanged 1109 * @cmd: command to be written before data is read back 1110 * Context: can sleep 1111 * 1112 * This function is similar to spi_w8r16, with the exception that it will 1113 * convert the read 16 bit data word from big-endian to native endianness. 1114 * 1115 * Callable only from contexts that can sleep. 1116 * 1117 * Return: the (unsigned) sixteen bit number returned by the device in cpu 1118 * endianness, or else a negative error code. 1119 */ 1120static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) 1121 1122{ 1123 ssize_t status; 1124 __be16 result; 1125 1126 status = spi_write_then_read(spi, &cmd, 1, &result, 2); 1127 if (status < 0) 1128 return status; 1129 1130 return be16_to_cpu(result); 1131} 1132 1133/** 1134 * struct spi_flash_read_message - flash specific information for 1135 * spi-masters that provide accelerated flash read interfaces 1136 * @buf: buffer to read data 1137 * @from: offset within the flash from where data is to be read 1138 * @len: length of data to be read 1139 * @retlen: actual length of data read 1140 * @read_opcode: read_opcode to be used to communicate with flash 1141 * @addr_width: number of address bytes 1142 * @dummy_bytes: number of dummy bytes 1143 * @opcode_nbits: number of lines to send opcode 1144 * @addr_nbits: number of lines to send address 1145 * @data_nbits: number of lines for data 1146 */ 1147struct spi_flash_read_message { 1148 void *buf; 1149 loff_t from; 1150 size_t len; 1151 size_t retlen; 1152 u8 read_opcode; 1153 u8 addr_width; 1154 u8 dummy_bytes; 1155 u8 opcode_nbits; 1156 u8 addr_nbits; 1157 u8 data_nbits; 1158}; 1159 1160/* SPI core interface for flash read support */ 1161static inline bool spi_flash_read_supported(struct spi_device *spi) 1162{ 1163 return spi->master->spi_flash_read && 1164 (!spi->master->flash_read_supported || 1165 spi->master->flash_read_supported(spi)); 1166} 1167 1168int spi_flash_read(struct spi_device *spi, 1169 struct spi_flash_read_message *msg); 1170 1171/*---------------------------------------------------------------------------*/ 1172 1173/* 1174 * INTERFACE between board init code and SPI infrastructure. 1175 * 1176 * No SPI driver ever sees these SPI device table segments, but 1177 * it's how the SPI core (or adapters that get hotplugged) grows 1178 * the driver model tree. 1179 * 1180 * As a rule, SPI devices can't be probed. Instead, board init code 1181 * provides a table listing the devices which are present, with enough 1182 * information to bind and set up the device's driver. There's basic 1183 * support for nonstatic configurations too; enough to handle adding 1184 * parport adapters, or microcontrollers acting as USB-to-SPI bridges. 1185 */ 1186 1187/** 1188 * struct spi_board_info - board-specific template for a SPI device 1189 * @modalias: Initializes spi_device.modalias; identifies the driver. 1190 * @platform_data: Initializes spi_device.platform_data; the particular 1191 * data stored there is driver-specific. 1192 * @controller_data: Initializes spi_device.controller_data; some 1193 * controllers need hints about hardware setup, e.g. for DMA. 1194 * @irq: Initializes spi_device.irq; depends on how the board is wired. 1195 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits 1196 * from the chip datasheet and board-specific signal quality issues. 1197 * @bus_num: Identifies which spi_master parents the spi_device; unused 1198 * by spi_new_device(), and otherwise depends on board wiring. 1199 * @chip_select: Initializes spi_device.chip_select; depends on how 1200 * the board is wired. 1201 * @mode: Initializes spi_device.mode; based on the chip datasheet, board 1202 * wiring (some devices support both 3WIRE and standard modes), and 1203 * possibly presence of an inverter in the chipselect path. 1204 * 1205 * When adding new SPI devices to the device tree, these structures serve 1206 * as a partial device template. They hold information which can't always 1207 * be determined by drivers. Information that probe() can establish (such 1208 * as the default transfer wordsize) is not included here. 1209 * 1210 * These structures are used in two places. Their primary role is to 1211 * be stored in tables of board-specific device descriptors, which are 1212 * declared early in board initialization and then used (much later) to 1213 * populate a controller's device tree after the that controller's driver 1214 * initializes. A secondary (and atypical) role is as a parameter to 1215 * spi_new_device() call, which happens after those controller drivers 1216 * are active in some dynamic board configuration models. 1217 */ 1218struct spi_board_info { 1219 /* the device name and module name are coupled, like platform_bus; 1220 * "modalias" is normally the driver name. 1221 * 1222 * platform_data goes to spi_device.dev.platform_data, 1223 * controller_data goes to spi_device.controller_data, 1224 * irq is copied too 1225 */ 1226 char modalias[SPI_NAME_SIZE]; 1227 const void *platform_data; 1228 void *controller_data; 1229 int irq; 1230 1231 /* slower signaling on noisy or low voltage boards */ 1232 u32 max_speed_hz; 1233 1234 1235 /* bus_num is board specific and matches the bus_num of some 1236 * spi_master that will probably be registered later. 1237 * 1238 * chip_select reflects how this chip is wired to that master; 1239 * it's less than num_chipselect. 1240 */ 1241 u16 bus_num; 1242 u16 chip_select; 1243 1244 /* mode becomes spi_device.mode, and is essential for chips 1245 * where the default of SPI_CS_HIGH = 0 is wrong. 1246 */ 1247 u16 mode; 1248 1249 /* ... may need additional spi_device chip config data here. 1250 * avoid stuff protocol drivers can set; but include stuff 1251 * needed to behave without being bound to a driver: 1252 * - quirks like clock rate mattering when not selected 1253 */ 1254}; 1255 1256#ifdef CONFIG_SPI 1257extern int 1258spi_register_board_info(struct spi_board_info const *info, unsigned n); 1259#else 1260/* board init code may ignore whether SPI is configured or not */ 1261static inline int 1262spi_register_board_info(struct spi_board_info const *info, unsigned n) 1263 { return 0; } 1264#endif 1265 1266 1267/* If you're hotplugging an adapter with devices (parport, usb, etc) 1268 * use spi_new_device() to describe each device. You can also call 1269 * spi_unregister_device() to start making that device vanish, but 1270 * normally that would be handled by spi_unregister_master(). 1271 * 1272 * You can also use spi_alloc_device() and spi_add_device() to use a two 1273 * stage registration sequence for each spi_device. This gives the caller 1274 * some more control over the spi_device structure before it is registered, 1275 * but requires that caller to initialize fields that would otherwise 1276 * be defined using the board info. 1277 */ 1278extern struct spi_device * 1279spi_alloc_device(struct spi_master *master); 1280 1281extern int 1282spi_add_device(struct spi_device *spi); 1283 1284extern struct spi_device * 1285spi_new_device(struct spi_master *, struct spi_board_info *); 1286 1287extern void spi_unregister_device(struct spi_device *spi); 1288 1289extern const struct spi_device_id * 1290spi_get_device_id(const struct spi_device *sdev); 1291 1292static inline bool 1293spi_transfer_is_last(struct spi_master *master, struct spi_transfer *xfer) 1294{ 1295 return list_is_last(&xfer->transfer_list, &master->cur_msg->transfers); 1296} 1297 1298#endif /* __LINUX_SPI_H */ 1299