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12#ifndef __ARC_DISASM_H__
13#define __ARC_DISASM_H__
14
15enum {
16 op_Bcc = 0, op_BLcc = 1, op_LD = 2, op_ST = 3, op_MAJOR_4 = 4,
17 op_MAJOR_5 = 5, op_LD_ADD = 12, op_ADD_SUB_SHIFT = 13,
18 op_ADD_MOV_CMP = 14, op_S = 15, op_LD_S = 16, op_LDB_S = 17,
19 op_LDW_S = 18, op_LDWX_S = 19, op_ST_S = 20, op_STB_S = 21,
20 op_STW_S = 22, op_Su5 = 23, op_SP = 24, op_GP = 25,
21 op_Pcl = 26, op_MOV_S = 27, op_ADD_CMP = 28, op_BR_S = 29,
22 op_B_S = 30, op_BL_S = 31
23};
24
25enum flow {
26 noflow,
27 direct_jump,
28 direct_call,
29 indirect_jump,
30 indirect_call,
31 invalid_instr
32};
33
34#define IS_BIT(word, n) ((word) & (1<<n))
35#define BITS(word, s, e) (((word) >> (s)) & (~((-2) << ((e) - (s)))))
36
37#define MAJOR_OPCODE(word) (BITS((word), 27, 31))
38#define MINOR_OPCODE(word) (BITS((word), 16, 21))
39#define FIELD_A(word) (BITS((word), 0, 5))
40#define FIELD_B(word) ((BITS((word), 12, 14)<<3) | \
41 (BITS((word), 24, 26)))
42#define FIELD_C(word) (BITS((word), 6, 11))
43#define FIELD_u6(word) FIELDC(word)
44#define FIELD_s12(word) sign_extend(((BITS((word), 0, 5) << 6) | \
45 BITS((word), 6, 11)), 12)
46
47
48
49#define FIELD_s9(word) sign_extend(((BITS(word, 15, 15) << 8) | \
50 BITS(word, 16, 23)), 9)
51#define FIELD_s21(word) sign_extend(((BITS(word, 6, 15) << 11) | \
52 (BITS(word, 17, 26) << 1)), 12)
53#define FIELD_s25(word) sign_extend(((BITS(word, 0, 3) << 21) | \
54 (BITS(word, 6, 15) << 11) | \
55 (BITS(word, 17, 26) << 1)), 12)
56
57
58#define FIELD_S_A(word) ((BITS((word), 2, 2)<<3) | BITS((word), 0, 2))
59#define FIELD_S_B(word) ((BITS((word), 10, 10)<<3) | \
60 BITS((word), 8, 10))
61#define FIELD_S_C(word) ((BITS((word), 7, 7)<<3) | BITS((word), 5, 7))
62#define FIELD_S_H(word) ((BITS((word), 0, 2)<<3) | BITS((word), 5, 8))
63#define FIELD_S_u5(word) (BITS((word), 0, 4))
64#define FIELD_S_u6(word) (BITS((word), 0, 4) << 1)
65#define FIELD_S_u7(word) (BITS((word), 0, 4) << 2)
66#define FIELD_S_u10(word) (BITS((word), 0, 7) << 2)
67#define FIELD_S_s7(word) sign_extend(BITS((word), 0, 5) << 1, 9)
68#define FIELD_S_s8(word) sign_extend(BITS((word), 0, 7) << 1, 9)
69#define FIELD_S_s9(word) sign_extend(BITS((word), 0, 8), 9)
70#define FIELD_S_s10(word) sign_extend(BITS((word), 0, 8) << 1, 10)
71#define FIELD_S_s11(word) sign_extend(BITS((word), 0, 8) << 2, 11)
72#define FIELD_S_s13(word) sign_extend(BITS((word), 0, 10) << 2, 13)
73
74#define STATUS32_L 0x00000100
75#define REG_LIMM 62
76
77struct disasm_state {
78
79 unsigned long words[2];
80 int instr_len;
81 int major_opcode;
82
83 int is_branch;
84 int target;
85 int delay_slot;
86 enum flow flow;
87
88 int src1, src2, src3, dest, wb_reg;
89 int zz, aa, x, pref, di;
90 int fault, write;
91};
92
93static inline int sign_extend(int value, int bits)
94{
95 if (IS_BIT(value, (bits - 1)))
96 value |= (0xffffffff << bits);
97
98 return value;
99}
100
101static inline int is_short_instr(unsigned long addr)
102{
103 uint16_t word = *((uint16_t *)addr);
104 int opcode = (word >> 11) & 0x1F;
105 return (opcode >= 0x0B);
106}
107
108void disasm_instr(unsigned long addr, struct disasm_state *state,
109 int userspace, struct pt_regs *regs, struct callee_regs *cregs);
110int disasm_next_pc(unsigned long pc, struct pt_regs *regs, struct callee_regs
111 *cregs, unsigned long *fall_thru, unsigned long *target);
112long get_reg(int reg, struct pt_regs *regs, struct callee_regs *cregs);
113void set_reg(int reg, long val, struct pt_regs *regs,
114 struct callee_regs *cregs);
115
116#endif
117