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16#ifndef __ARCH_ARM_MACH_OMAP2_PRM2XXX_3XXX_H
17#define __ARCH_ARM_MACH_OMAP2_PRM2XXX_3XXX_H
18
19#include "prcm-common.h"
20#include "prm.h"
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33
34#define OMAP2_RM_RSTCTRL 0x0050
35#define OMAP2_RM_RSTTIME 0x0054
36#define OMAP2_RM_RSTST 0x0058
37#define OMAP2_PM_PWSTCTRL 0x00e0
38#define OMAP2_PM_PWSTST 0x00e4
39
40#define PM_WKEN 0x00a0
41#define PM_WKEN1 PM_WKEN
42#define PM_WKST 0x00b0
43#define PM_WKST1 PM_WKST
44#define PM_WKDEP 0x00c8
45#define PM_EVGENCTRL 0x00d4
46#define PM_EVGENONTIM 0x00d8
47#define PM_EVGENOFFTIM 0x00dc
48
49
50#ifndef __ASSEMBLER__
51
52#include <linux/io.h>
53#include "powerdomain.h"
54
55
56static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
57{
58 return readl_relaxed(prm_base + module + idx);
59}
60
61static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
62{
63 writel_relaxed(val, prm_base + module + idx);
64}
65
66
67static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module,
68 s16 idx)
69{
70 u32 v;
71
72 v = omap2_prm_read_mod_reg(module, idx);
73 v &= ~mask;
74 v |= bits;
75 omap2_prm_write_mod_reg(v, module, idx);
76
77 return v;
78}
79
80
81static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
82{
83 u32 v;
84
85 v = omap2_prm_read_mod_reg(domain, idx);
86 v &= mask;
87 v >>= __ffs(mask);
88
89 return v;
90}
91
92static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
93{
94 return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx);
95}
96
97static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
98{
99 return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
100}
101
102
103int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
104int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,
105 u16 offset);
106int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part,
107 s16 prm_mod, u16 reset_offset,
108 u16 st_offset);
109
110extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
111extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
112extern int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm);
113extern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
114 u8 pwrst);
115extern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
116 u8 pwrst);
117extern int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
118extern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
119extern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
120extern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm);
121
122extern int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1,
123 struct clockdomain *clkdm2);
124extern int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1,
125 struct clockdomain *clkdm2);
126extern int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
127 struct clockdomain *clkdm2);
128extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm);
129
130#endif
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140
141#define OMAP_ONTIMEVAL_SHIFT 0
142#define OMAP_ONTIMEVAL_MASK (0xffffffff << 0)
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146#define OMAP_OFFTIMEVAL_SHIFT 0
147#define OMAP_OFFTIMEVAL_MASK (0xffffffff << 0)
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150
151#define OMAP_SETUP_TIME_SHIFT 0
152#define OMAP_SETUP_TIME_MASK (0xffff << 0)
153
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155
156#define OMAP_SYSCLKDIV_SHIFT 6
157#define OMAP_SYSCLKDIV_MASK (0x3 << 6)
158#define OMAP_SYSCLKDIV_WIDTH 2
159#define OMAP_AUTOEXTCLKMODE_SHIFT 3
160#define OMAP_AUTOEXTCLKMODE_MASK (0x3 << 3)
161#define OMAP_SYSCLKSEL_SHIFT 0
162#define OMAP_SYSCLKSEL_MASK (0x3 << 0)
163
164
165#define OMAP_OFFLOADMODE_SHIFT 3
166#define OMAP_OFFLOADMODE_MASK (0x3 << 3)
167#define OMAP_ONLOADMODE_SHIFT 1
168#define OMAP_ONLOADMODE_MASK (0x3 << 1)
169#define OMAP_ENABLE_MASK (1 << 0)
170
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172
173#define OMAP_RSTTIME2_SHIFT 8
174#define OMAP_RSTTIME2_MASK (0x1f << 8)
175#define OMAP_RSTTIME1_SHIFT 0
176#define OMAP_RSTTIME1_MASK (0xff << 0)
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181#define OMAP_RST_DPLL3_MASK (1 << 2)
182#define OMAP_RST_GS_MASK (1 << 1)
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198
199#define OMAP_COREDOMAINWKUP_RST_MASK (1 << 3)
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208#define OMAP_DOMAINWKUP_RST_MASK (1 << 2)
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218#define OMAP_GLOBALWARM_RST_SHIFT 1
219#define OMAP_GLOBALWARM_RST_MASK (1 << 1)
220#define OMAP_GLOBALCOLD_RST_SHIFT 0
221#define OMAP_GLOBALCOLD_RST_MASK (1 << 0)
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231
232#define OMAP_EN_WKUP_SHIFT 4
233#define OMAP_EN_WKUP_MASK (1 << 4)
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245#define OMAP_LOGICRETSTATE_MASK (1 << 2)
246
247
248#endif
249