1#ifndef STARTUP_INC_INCLUDED 2#define STARTUP_INC_INCLUDED 3 4#include <hwregs/asm/reg_map_asm.h> 5#include <hwregs/asm/gio_defs_asm.h> 6#include <hwregs/asm/pio_defs_asm.h> 7#include <hwregs/asm/clkgen_defs_asm.h> 8#include <hwregs/asm/pinmux_defs_asm.h> 9 10 .macro GIO_SET_P BITS, OUTREG 11 bmi 1f ; btstq: bit -> N flag 12 nop 13 or.d \BITS, \OUTREG 141: 15 .endm 16 17 .macro GIO_INIT 18 move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0 19 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1 20 move.d $r0, [$r1] 21 22 move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0 23 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1 24 move.d $r0, [$r1] 25 26 move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0 27 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1 28 move.d $r0, [$r1] 29 30 move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0 31 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1 32 move.d $r0, [$r1] 33 34 move.d CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0 35 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1 36 move.d $r0, [$r1] 37 38 move.d CONFIG_ETRAX_DEF_GIO_PC_OE, $r0 39 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1 40 move.d $r0, [$r1] 41 42 move.d 0xFFFFFFFF, $r0 43 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1 44 move.d $r0, [$r1] 45 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1 46 move.d $r0, [$r1] 47 48 ;; If eth_mdio, eth, geth bits are set in hwprot, don't 49 ;; set them to gpio, as this means they have been configured 50 ;; earlier and shouldn't be changed. 51 move.d 0xFC000000, $r2 ; pins 25..0 are eth_mdio, eth, geth 52 move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1 53 move.d [$r1], $r0 54 btstq REG_BIT(pinmux, rw_hwprot, eth), $r0 55 GIO_SET_P 0x00FFFF00, $r2 ;; pins 8..23 are eth 56 btstq REG_BIT(pinmux, rw_hwprot, eth_mdio), $r0 57 GIO_SET_P 0x03000000, $r2 ;; pins 24..25 are eth_mdio 58 btstq REG_BIT(pinmux, rw_hwprot, geth), $r0 59 GIO_SET_P 0x000000FF, $r2 ;; pins 0..7 are geth 60 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1 61 move.d $r2, [$r1] 62 .endm 63 64 .macro START_CLOCKS 65 move.d REG_ADDR(clkgen, regi_clkgen, rw_clk_ctrl), $r1 66 move.d [$r1], $r0 67 or.d REG_STATE(clkgen, rw_clk_ctrl, cpu, yes) | \ 68 REG_STATE(clkgen, rw_clk_ctrl, ddr2, yes) | \ 69 REG_STATE(clkgen, rw_clk_ctrl, memarb_bar_ddr, yes), $r0 70 move.d $r0, [$r1] 71 .endm 72 73 .macro SETUP_WAIT_STATES 74 move.d REG_ADDR(pio, regi_pio, rw_ce0_cfg), $r0 75 move.d CONFIG_ETRAX_PIO_CE0_CFG, $r1 76 move.d $r1, [$r0] 77 move.d REG_ADDR(pio, regi_pio, rw_ce1_cfg), $r0 78 move.d CONFIG_ETRAX_PIO_CE1_CFG, $r1 79 move.d $r1, [$r0] 80 move.d REG_ADDR(pio, regi_pio, rw_ce2_cfg), $r0 81 move.d CONFIG_ETRAX_PIO_CE2_CFG, $r1 82 move.d $r1, [$r0] 83 .endm 84#endif 85