1config FRV 2 bool 3 default y 4 select HAVE_IDE 5 select HAVE_ARCH_TRACEHOOK 6 select HAVE_PERF_EVENTS 7 select HAVE_UID16 8 select VIRT_TO_BUS 9 select GENERIC_IRQ_SHOW 10 select HAVE_DEBUG_BUGVERBOSE 11 select ARCH_HAVE_NMI_SAFE_CMPXCHG 12 select GENERIC_CPU_DEVICES 13 select ARCH_HAS_DEVMEM_IS_ALLOWED 14 select ARCH_WANT_IPC_PARSE_VERSION 15 select OLD_SIGSUSPEND3 16 select OLD_SIGACTION 17 select HAVE_DEBUG_STACKOVERFLOW 18 select ARCH_NO_COHERENT_DMA_MMAP 19 20config ZONE_DMA 21 bool 22 default y 23 24config RWSEM_GENERIC_SPINLOCK 25 bool 26 default y 27 28config RWSEM_XCHGADD_ALGORITHM 29 bool 30 31config GENERIC_HWEIGHT 32 bool 33 default y 34 35config GENERIC_CALIBRATE_DELAY 36 bool 37 default n 38 39config TIME_LOW_RES 40 bool 41 default y 42 43config QUICKLIST 44 bool 45 default y 46 47config ARCH_HAS_ILOG2_U32 48 bool 49 default y 50 51config ARCH_HAS_ILOG2_U64 52 bool 53 default y 54 55config HZ 56 int 57 default 1000 58 59source "init/Kconfig" 60 61source "kernel/Kconfig.freezer" 62 63 64menu "Fujitsu FR-V system setup" 65 66config MMU 67 bool "MMU support" 68 help 69 This options switches on and off support for the FR-V MMU 70 (effectively switching between vmlinux and uClinux). Not all FR-V 71 CPUs support this. Currently only the FR451 has a sufficiently 72 featured MMU. 73 74config FRV_OUTOFLINE_ATOMIC_OPS 75 bool "Out-of-line the FRV atomic operations" 76 default n 77 help 78 Setting this option causes the FR-V atomic operations to be mostly 79 implemented out-of-line. 80 81 See Documentation/frv/atomic-ops.txt for more information. 82 83config HIGHMEM 84 bool "High memory support" 85 depends on MMU 86 default y 87 help 88 If you wish to use more than 256MB of memory with your MMU based 89 system, you will need to select this option. The kernel can only see 90 the memory between 0xC0000000 and 0xD0000000 directly... everything 91 else must be kmapped. 92 93 The arch is, however, capable of supporting up to 3GB of SDRAM. 94 95config HIGHPTE 96 bool "Allocate page tables in highmem" 97 depends on HIGHMEM 98 default y 99 help 100 The VM uses one page of memory for each page table. For systems 101 with a lot of RAM, this can be wasteful of precious low memory. 102 Setting this option will put user-space page tables in high memory. 103 104source "mm/Kconfig" 105 106choice 107 prompt "uClinux kernel load address" 108 depends on !MMU 109 default UCPAGE_OFFSET_C0000000 110 help 111 This option sets the base address for the uClinux kernel. The kernel 112 will rearrange the SDRAM layout to start at this address, and move 113 itself to start there. It must be greater than 0, and it must be 114 sufficiently less than 0xE0000000 that the SDRAM does not intersect 115 the I/O region. 116 117 The base address must also be aligned such that the SDRAM controller 118 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned. 119 120config UCPAGE_OFFSET_20000000 121 bool "0x20000000" 122 123config UCPAGE_OFFSET_40000000 124 bool "0x40000000" 125 126config UCPAGE_OFFSET_60000000 127 bool "0x60000000" 128 129config UCPAGE_OFFSET_80000000 130 bool "0x80000000" 131 132config UCPAGE_OFFSET_A0000000 133 bool "0xA0000000" 134 135config UCPAGE_OFFSET_C0000000 136 bool "0xC0000000 (Recommended)" 137 138endchoice 139 140config PAGE_OFFSET 141 hex 142 default 0x20000000 if UCPAGE_OFFSET_20000000 143 default 0x40000000 if UCPAGE_OFFSET_40000000 144 default 0x60000000 if UCPAGE_OFFSET_60000000 145 default 0x80000000 if UCPAGE_OFFSET_80000000 146 default 0xA0000000 if UCPAGE_OFFSET_A0000000 147 default 0xC0000000 148 149config PROTECT_KERNEL 150 bool "Protect core kernel against userspace" 151 depends on !MMU 152 default y 153 help 154 Selecting this option causes the uClinux kernel to change the 155 permittivity of DAMPR register covering the core kernel image to 156 prevent userspace accessing the underlying memory directly. 157 158choice 159 prompt "CPU Caching mode" 160 default FRV_DEFL_CACHE_WBACK 161 help 162 This option determines the default caching mode for the kernel. 163 164 Write-Back caching mode involves the all reads and writes causing 165 the affected cacheline to be read into the cache first before being 166 operated upon. Memory is not then updated by a write until the cache 167 is filled and a cacheline needs to be displaced from the cache to 168 make room. Only at that point is it written back. 169 170 Write-Behind caching is similar to Write-Back caching, except that a 171 write won't fetch a cacheline into the cache if there isn't already 172 one there; it will write directly to memory instead. 173 174 Write-Through caching only fetches cachelines from memory on a 175 read. Writes always get written directly to memory. If the affected 176 cacheline is also in cache, it will be updated too. 177 178 The final option is to turn of caching entirely. 179 180 Note that not all CPUs support Write-Behind caching. If the CPU on 181 which the kernel is running doesn't, it'll fall back to Write-Back 182 caching. 183 184config FRV_DEFL_CACHE_WBACK 185 bool "Write-Back" 186 187config FRV_DEFL_CACHE_WBEHIND 188 bool "Write-Behind" 189 190config FRV_DEFL_CACHE_WTHRU 191 bool "Write-Through" 192 193config FRV_DEFL_CACHE_DISABLED 194 bool "Disabled" 195 196endchoice 197 198menu "CPU core support" 199 200config CPU_FR401 201 bool "Include FR401 core support" 202 depends on !MMU 203 default y 204 help 205 This enables support for the FR401, FR401A and FR403 CPUs 206 207config CPU_FR405 208 bool "Include FR405 core support" 209 depends on !MMU 210 default y 211 help 212 This enables support for the FR405 CPU 213 214config CPU_FR451 215 bool "Include FR451 core support" 216 default y 217 help 218 This enables support for the FR451 CPU 219 220config CPU_FR451_COMPILE 221 bool "Specifically compile for FR451 core" 222 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551 223 default y 224 help 225 This causes appropriate flags to be passed to the compiler to 226 optimise for the FR451 CPU 227 228config CPU_FR551 229 bool "Include FR551 core support" 230 depends on !MMU 231 default y 232 help 233 This enables support for the FR555 CPU 234 235config CPU_FR551_COMPILE 236 bool "Specifically compile for FR551 core" 237 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451 238 default y 239 help 240 This causes appropriate flags to be passed to the compiler to 241 optimise for the FR555 CPU 242 243config FRV_L1_CACHE_SHIFT 244 int 245 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451 246 default "6" if CPU_FR551 247 248endmenu 249 250choice 251 prompt "System support" 252 default MB93091_VDK 253 254config MB93091_VDK 255 bool "MB93091 CPU board with or without motherboard" 256 257config MB93093_PDK 258 bool "MB93093 PDK unit" 259 260endchoice 261 262if MB93091_VDK 263choice 264 prompt "Motherboard support" 265 default MB93090_MB00 266 267config MB93090_MB00 268 bool "Use the MB93090-MB00 motherboard" 269 help 270 Select this option if the MB93091 CPU board is going to be used with 271 a MB93090-MB00 VDK motherboard 272 273config MB93091_NO_MB 274 bool "Use standalone" 275 help 276 Select this option if the MB93091 CPU board is going to be used 277 without a motherboard 278 279endchoice 280endif 281 282config FUJITSU_MB93493 283 bool "MB93493 Multimedia chip" 284 help 285 Select this option if the MB93493 multimedia chip is going to be 286 used. 287 288choice 289 prompt "GP-Relative data support" 290 default GPREL_DATA_8 291 help 292 This option controls what data, if any, should be placed in the GP 293 relative data sections. Using this means that the compiler can 294 generate accesses to the data using GR16-relative addressing which 295 is faster than absolute instructions and saves space (2 instructions 296 per access). 297 298 However, the GPREL region is limited in size because the immediate 299 value used in the load and store instructions is limited to a 12-bit 300 signed number. 301 302 So if the linker starts complaining that accesses to GPREL data are 303 out of range, try changing this option from the default. 304 305 Note that modules will always be compiled with this feature disabled 306 as the module data will not be in range of the GP base address. 307 308config GPREL_DATA_8 309 bool "Put data objects of up to 8 bytes into GP-REL" 310 311config GPREL_DATA_4 312 bool "Put data objects of up to 4 bytes into GP-REL" 313 314config GPREL_DATA_NONE 315 bool "Don't use GP-REL" 316 317endchoice 318 319config FRV_ONCPU_SERIAL 320 bool "Use on-CPU serial ports" 321 select SERIAL_8250 322 default y 323 324config PCI 325 bool "Use PCI" 326 depends on MB93090_MB00 327 default y 328 select GENERIC_PCI_IOMAP 329 help 330 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI 331 onboard. If you have one of these boards and you wish to use the PCI 332 facilities, say Y here. 333 334config RESERVE_DMA_COHERENT 335 bool "Reserve DMA coherent memory" 336 depends on PCI && !MMU 337 default y 338 help 339 Many PCI drivers require access to uncached memory for DMA device 340 communications (such as is done with some Ethernet buffer rings). If 341 a fully featured MMU is available, this can be done through page 342 table settings, but if not, a region has to be set aside and marked 343 with a special DAMPR register. 344 345 Setting this option causes uClinux to set aside a portion of the 346 available memory for use in this manner. The memory will then be 347 unavailable for normal kernel use. 348 349source "drivers/pci/Kconfig" 350 351source "drivers/pcmcia/Kconfig" 352 353menu "Power management options" 354 355config ARCH_SUSPEND_POSSIBLE 356 def_bool y 357 358source kernel/power/Kconfig 359endmenu 360 361endmenu 362 363 364menu "Executable formats" 365 366source "fs/Kconfig.binfmt" 367 368endmenu 369 370source "net/Kconfig" 371 372source "drivers/Kconfig" 373 374source "fs/Kconfig" 375 376source "arch/frv/Kconfig.debug" 377 378source "security/Kconfig" 379 380source "crypto/Kconfig" 381 382source "lib/Kconfig" 383