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20#include <linux/types.h>
21#include <linux/string.h>
22#include <linux/kvm.h>
23#include <linux/kvm_host.h>
24#include <linux/highmem.h>
25
26#include <asm/tlbflush.h>
27#include <asm/kvm_ppc.h>
28#include <asm/kvm_book3s.h>
29
30
31
32
33
34#ifdef DEBUG_MMU
35#define dprintk(X...) printk(KERN_INFO X)
36#else
37#define dprintk(X...) do { } while(0)
38#endif
39
40#ifdef DEBUG_MMU_PTE
41#define dprintk_pte(X...) printk(KERN_INFO X)
42#else
43#define dprintk_pte(X...) do { } while(0)
44#endif
45
46#define PTEG_FLAG_ACCESSED 0x00000100
47#define PTEG_FLAG_DIRTY 0x00000080
48#ifndef SID_SHIFT
49#define SID_SHIFT 28
50#endif
51
52static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
53{
54#ifdef DEBUG_MMU_PTE_IP
55 return vcpu->arch.pc == DEBUG_MMU_PTE_IP;
56#else
57 return true;
58#endif
59}
60
61static inline u32 sr_vsid(u32 sr_raw)
62{
63 return sr_raw & 0x0fffffff;
64}
65
66static inline bool sr_valid(u32 sr_raw)
67{
68 return (sr_raw & 0x80000000) ? false : true;
69}
70
71static inline bool sr_ks(u32 sr_raw)
72{
73 return (sr_raw & 0x40000000) ? true: false;
74}
75
76static inline bool sr_kp(u32 sr_raw)
77{
78 return (sr_raw & 0x20000000) ? true: false;
79}
80
81static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
82 struct kvmppc_pte *pte, bool data,
83 bool iswrite);
84static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
85 u64 *vsid);
86
87static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
88{
89 return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
90}
91
92static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
93 bool data)
94{
95 u64 vsid;
96 struct kvmppc_pte pte;
97
98 if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
99 return pte.vpage;
100
101 kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
102 return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
103}
104
105static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
106{
107 kvmppc_set_msr(vcpu, 0);
108}
109
110static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
111 u32 sre, gva_t eaddr,
112 bool primary)
113{
114 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
115 u32 page, hash, pteg, htabmask;
116 hva_t r;
117
118 page = (eaddr & 0x0FFFFFFF) >> 12;
119 htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;
120
121 hash = ((sr_vsid(sre) ^ page) << 6);
122 if (!primary)
123 hash = ~hash;
124 hash &= htabmask;
125
126 pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
127
128 dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
129 kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
130 sr_vsid(sre));
131
132 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
133 if (kvm_is_error_hva(r))
134 return r;
135 return r | (pteg & ~PAGE_MASK);
136}
137
138static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
139{
140 return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
141 (primary ? 0 : 0x40) | 0x80000000;
142}
143
144static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
145 struct kvmppc_pte *pte, bool data,
146 bool iswrite)
147{
148 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
149 struct kvmppc_bat *bat;
150 int i;
151
152 for (i = 0; i < 8; i++) {
153 if (data)
154 bat = &vcpu_book3s->dbat[i];
155 else
156 bat = &vcpu_book3s->ibat[i];
157
158 if (kvmppc_get_msr(vcpu) & MSR_PR) {
159 if (!bat->vp)
160 continue;
161 } else {
162 if (!bat->vs)
163 continue;
164 }
165
166 if (check_debug_ip(vcpu))
167 {
168 dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
169 data ? 'd' : 'i', i, eaddr, bat->bepi,
170 bat->bepi_mask);
171 }
172 if ((eaddr & bat->bepi_mask) == bat->bepi) {
173 u64 vsid;
174 kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
175 eaddr >> SID_SHIFT, &vsid);
176 vsid <<= 16;
177 pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;
178
179 pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
180 pte->may_read = bat->pp;
181 pte->may_write = bat->pp > 1;
182 pte->may_execute = true;
183 if (!pte->may_read) {
184 printk(KERN_INFO "BAT is not readable!\n");
185 continue;
186 }
187 if (iswrite && !pte->may_write) {
188 dprintk_pte("BAT is read-only!\n");
189 continue;
190 }
191
192 return 0;
193 }
194 }
195
196 return -ENOENT;
197}
198
199static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
200 struct kvmppc_pte *pte, bool data,
201 bool iswrite, bool primary)
202{
203 u32 sre;
204 hva_t ptegp;
205 u32 pteg[16];
206 u32 pte0, pte1;
207 u32 ptem = 0;
208 int i;
209 int found = 0;
210
211 sre = find_sr(vcpu, eaddr);
212
213 dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
214 sr_vsid(sre), sre);
215
216 pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
217
218 ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
219 if (kvm_is_error_hva(ptegp)) {
220 printk(KERN_INFO "KVM: Invalid PTEG!\n");
221 goto no_page_found;
222 }
223
224 ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
225
226 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
227 printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp);
228 goto no_page_found;
229 }
230
231 for (i=0; i<16; i+=2) {
232 pte0 = be32_to_cpu(pteg[i]);
233 pte1 = be32_to_cpu(pteg[i + 1]);
234 if (ptem == pte0) {
235 u8 pp;
236
237 pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF);
238 pp = pte1 & 3;
239
240 if ((sr_kp(sre) && (kvmppc_get_msr(vcpu) & MSR_PR)) ||
241 (sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
242 pp |= 4;
243
244 pte->may_write = false;
245 pte->may_read = false;
246 pte->may_execute = true;
247 switch (pp) {
248 case 0:
249 case 1:
250 case 2:
251 case 6:
252 pte->may_write = true;
253 case 3:
254 case 5:
255 case 7:
256 pte->may_read = true;
257 break;
258 }
259
260 dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
261 pte0, pte1, pp);
262 found = 1;
263 break;
264 }
265 }
266
267
268
269 if (found) {
270 u32 pte_r = pte1;
271 char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32));
272
273
274
275
276
277 if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
278 pte_r |= PTEG_FLAG_ACCESSED;
279 put_user(pte_r >> 8, addr + 2);
280 }
281 if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
282 pte_r |= PTEG_FLAG_DIRTY;
283 put_user(pte_r, addr + 3);
284 }
285 if (!pte->may_read || (iswrite && !pte->may_write))
286 return -EPERM;
287 return 0;
288 }
289
290no_page_found:
291
292 if (check_debug_ip(vcpu)) {
293 dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
294 to_book3s(vcpu)->sdr1, ptegp);
295 for (i=0; i<16; i+=2) {
296 dprintk_pte(" %02d: 0x%x - 0x%x (0x%x)\n",
297 i, be32_to_cpu(pteg[i]),
298 be32_to_cpu(pteg[i+1]), ptem);
299 }
300 }
301
302 return -ENOENT;
303}
304
305static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
306 struct kvmppc_pte *pte, bool data,
307 bool iswrite)
308{
309 int r;
310 ulong mp_ea = vcpu->arch.magic_page_ea;
311
312 pte->eaddr = eaddr;
313 pte->page_size = MMU_PAGE_4K;
314
315
316 if (unlikely(mp_ea) &&
317 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
318 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
319 pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
320 pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
321 pte->raddr &= KVM_PAM;
322 pte->may_execute = true;
323 pte->may_read = true;
324 pte->may_write = true;
325
326 return 0;
327 }
328
329 r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
330 if (r < 0)
331 r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
332 data, iswrite, true);
333 if (r == -ENOENT)
334 r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
335 data, iswrite, false);
336
337 return r;
338}
339
340
341static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
342{
343 return kvmppc_get_sr(vcpu, srnum);
344}
345
346static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
347 ulong value)
348{
349 kvmppc_set_sr(vcpu, srnum, value);
350 kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
351}
352
353static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
354{
355 int i;
356 struct kvm_vcpu *v;
357
358
359 kvm_for_each_vcpu(i, v, vcpu->kvm)
360 kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
361}
362
363static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
364 u64 *vsid)
365{
366 ulong ea = esid << SID_SHIFT;
367 u32 sr;
368 u64 gvsid = esid;
369 u64 msr = kvmppc_get_msr(vcpu);
370
371 if (msr & (MSR_DR|MSR_IR)) {
372 sr = find_sr(vcpu, ea);
373 if (sr_valid(sr))
374 gvsid = sr_vsid(sr);
375 }
376
377
378
379
380 switch (msr & (MSR_DR|MSR_IR)) {
381 case 0:
382 *vsid = VSID_REAL | esid;
383 break;
384 case MSR_IR:
385 *vsid = VSID_REAL_IR | gvsid;
386 break;
387 case MSR_DR:
388 *vsid = VSID_REAL_DR | gvsid;
389 break;
390 case MSR_DR|MSR_IR:
391 if (sr_valid(sr))
392 *vsid = sr_vsid(sr);
393 else
394 *vsid = VSID_BAT | gvsid;
395 break;
396 default:
397 BUG();
398 }
399
400 if (msr & MSR_PR)
401 *vsid |= VSID_PR;
402
403 return 0;
404}
405
406static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
407{
408 return true;
409}
410
411
412void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
413{
414 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
415
416 mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
417 mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
418 mmu->xlate = kvmppc_mmu_book3s_32_xlate;
419 mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
420 mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
421 mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
422 mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
423 mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
424
425 mmu->slbmte = NULL;
426 mmu->slbmfee = NULL;
427 mmu->slbmfev = NULL;
428 mmu->slbie = NULL;
429 mmu->slbia = NULL;
430}
431
