LXR linux/arch/s390/include/asm/pci

   1#ifndef _ASM_S390_PCI_CLP_H
   2#define _ASM_S390_PCI_CLP_H
   3
   4#include <asm/clp.h>
   5
   6/*
   7 * Call Logical Processor - Command Codes
   8 */
   9#define CLP_LIST_PCI            0x0002
  10#define CLP_QUERY_PCI_FN        0x0003
  11#define CLP_QUERY_PCI_FNGRP     0x0004
  12#define CLP_SET_PCI_FN          0x0005
  13
  14/* PCI function handle list entry */
  15struct clp_fh_list_entry {
  16        u16 device_id;
  17        u16 vendor_id;
  18        u32 config_state :  1;
  19        u32              : 31;
  20        u32 fid;                /* PCI function id */
  21        u32 fh;                 /* PCI function handle */
  22} __packed;
  23
  24#define CLP_RC_SETPCIFN_FH      0x0101  /* Invalid PCI fn handle */
  25#define CLP_RC_SETPCIFN_FHOP    0x0102  /* Fn handle not valid for op */
  26#define CLP_RC_SETPCIFN_DMAAS   0x0103  /* Invalid DMA addr space */
  27#define CLP_RC_SETPCIFN_RES     0x0104  /* Insufficient resources */
  28#define CLP_RC_SETPCIFN_ALRDY   0x0105  /* Fn already in requested state */
  29#define CLP_RC_SETPCIFN_ERR     0x0106  /* Fn in permanent error state */
  30#define CLP_RC_SETPCIFN_RECPND  0x0107  /* Error recovery pending */
  31#define CLP_RC_SETPCIFN_BUSY    0x0108  /* Fn busy */
  32#define CLP_RC_LISTPCI_BADRT    0x010a  /* Resume token not recognized */
  33#define CLP_RC_QUERYPCIFG_PFGID 0x010b  /* Unrecognized PFGID */
  34
  35/* request or response block header length */
  36#define LIST_PCI_HDR_LEN        32
  37
  38/* Number of function handles fitting in response block */
  39#define CLP_FH_LIST_NR_ENTRIES                          \
  40        ((CLP_BLK_SIZE - 2 * LIST_PCI_HDR_LEN)          \
  41                / sizeof(struct clp_fh_list_entry))
  42
  43#define CLP_SET_ENABLE_PCI_FN   0       /* Yes, 0 enables it */
  44#define CLP_SET_DISABLE_PCI_FN  1       /* Yes, 1 disables it */
  45
  46#define CLP_UTIL_STR_LEN        64
  47#define CLP_PFIP_NR_SEGMENTS    4
  48
  49/* List PCI functions request */
  50struct clp_req_list_pci {
  51        struct clp_req_hdr hdr;
  52        u64 resume_token;
  53        u64 reserved2;
  54} __packed;
  55
  56/* List PCI functions response */
  57struct clp_rsp_list_pci {
  58        struct clp_rsp_hdr hdr;
  59        u64 resume_token;
  60        u32 reserved2;
  61        u16 max_fn;
  62        u8 reserved3;
  63        u8 entry_size;
  64        struct clp_fh_list_entry fh_list[CLP_FH_LIST_NR_ENTRIES];
  65} __packed;
  66
  67/* Query PCI function request */
  68struct clp_req_query_pci {
  69        struct clp_req_hdr hdr;
  70        u32 fh;                         /* function handle */
  71        u32 reserved2;
  72        u64 reserved3;
  73} __packed;
  74
  75/* Query PCI function response */
  76struct clp_rsp_query_pci {
  77        struct clp_rsp_hdr hdr;
  78        u16 vfn;                        /* virtual fn number */
  79        u16                     :  7;
  80        u16 util_str_avail      :  1;   /* utility string available? */
  81        u16 pfgid               :  8;   /* pci function group id */
  82        u32 fid;                        /* pci function id */
  83        u8 bar_size[PCI_BAR_COUNT];
  84        u16 pchid;
  85        u32 bar[PCI_BAR_COUNT];
  86        u8 pfip[CLP_PFIP_NR_SEGMENTS];  /* pci function internal path */
  87        u32                     : 24;
  88        u8 pft;                         /* pci function type */
  89        u64 sdma;                       /* start dma as */
  90        u64 edma;                       /* end dma as */
  91        u32 reserved[11];
  92        u32 uid;                        /* user defined id */
  93        u8 util_str[CLP_UTIL_STR_LEN];  /* utility string */
  94} __packed;
  95
  96/* Query PCI function group request */
  97struct clp_req_query_pci_grp {
  98        struct clp_req_hdr hdr;
  99        u32 reserved2           : 24;
 100        u32 pfgid               :  8;   /* function group id */
 101        u32 reserved3;
 102        u64 reserved4;
 103} __packed;
 104
 105/* Query PCI function group response */
 106struct clp_rsp_query_pci_grp {
 107        struct clp_rsp_hdr hdr;
 108        u16                     :  4;
 109        u16 noi                 : 12;   /* number of interrupts */
 110        u8 version;
 111        u8                      :  6;
 112        u8 frame                :  1;
 113        u8 refresh              :  1;   /* TLB refresh mode */
 114        u16 reserved2;
 115        u16 mui;
 116        u64 reserved3;
 117        u64 dasm;                       /* dma address space mask */
 118        u64 msia;                       /* MSI address */
 119        u64 reserved4;
 120        u64 reserved5;
 121} __packed;
 122
 123/* Set PCI function request */
 124struct clp_req_set_pci {
 125        struct clp_req_hdr hdr;
 126        u32 fh;                         /* function handle */
 127        u16 reserved2;
 128        u8 oc;                          /* operation controls */
 129        u8 ndas;                        /* number of dma spaces */
 130        u64 reserved3;
 131} __packed;
 132
 133/* Set PCI function response */
 134struct clp_rsp_set_pci {
 135        struct clp_rsp_hdr hdr;
 136        u32 fh;                         /* function handle */
 137        u32 reserved3;
 138        u64 reserved4;
 139} __packed;
 140
 141/* Combined request/response block structures used by clp insn */
 142struct clp_req_rsp_list_pci {
 143        struct clp_req_list_pci request;
 144        struct clp_rsp_list_pci response;
 145} __packed;
 146
 147struct clp_req_rsp_set_pci {
 148        struct clp_req_set_pci request;
 149        struct clp_rsp_set_pci response;
 150} __packed;
 151
 152struct clp_req_rsp_query_pci {
 153        struct clp_req_query_pci request;
 154        struct clp_rsp_query_pci response;
 155} __packed;
 156
 157struct clp_req_rsp_query_pci_grp {
 158        struct clp_req_query_pci_grp request;
 159        struct clp_rsp_query_pci_grp response;
 160} __packed;
 161
 162#endif
 163