LXR linux/arch/x86/include/asm/microcode.h

   1#ifndef _ASM_X86_MICROCODE_H
   2#define _ASM_X86_MICROCODE_H
   3
   4#include <asm/cpu.h>
   5#include <linux/earlycpio.h>
   6#include <linux/initrd.h>
   7
   8#define native_rdmsr(msr, val1, val2)                   \
   9do {                                                    \
  10        u64 __val = native_read_msr((msr));             \
  11        (void)((val1) = (u32)__val);                    \
  12        (void)((val2) = (u32)(__val >> 32));            \
  13} while (0)
  14
  15#define native_wrmsr(msr, low, high)                    \
  16        native_write_msr(msr, low, high)
  17
  18#define native_wrmsrl(msr, val)                         \
  19        native_write_msr((msr),                         \
  20                         (u32)((u64)(val)),             \
  21                         (u32)((u64)(val) >> 32))
  22
  23struct cpu_signature {
  24        unsigned int sig;
  25        unsigned int pf;
  26        unsigned int rev;
  27};
  28
  29struct device;
  30
  31enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
  32
  33struct microcode_ops {
  34        enum ucode_state (*request_microcode_user) (int cpu,
  35                                const void __user *buf, size_t size);
  36
  37        enum ucode_state (*request_microcode_fw) (int cpu, struct device *,
  38                                                  bool refresh_fw);
  39
  40        void (*microcode_fini_cpu) (int cpu);
  41
  42        /*
  43         * The generic 'microcode_core' part guarantees that
  44         * the callbacks below run on a target cpu when they
  45         * are being called.
  46         * See also the "Synchronization" section in microcode_core.c.
  47         */
  48        int (*apply_microcode) (int cpu);
  49        int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
  50};
  51
  52struct ucode_cpu_info {
  53        struct cpu_signature    cpu_sig;
  54        int                     valid;
  55        void                    *mc;
  56};
  57extern struct ucode_cpu_info ucode_cpu_info[];
  58
  59#ifdef CONFIG_MICROCODE
  60int __init microcode_init(void);
  61#else
  62static inline int __init microcode_init(void)   { return 0; };
  63#endif
  64
  65#ifdef CONFIG_MICROCODE_INTEL
  66extern struct microcode_ops * __init init_intel_microcode(void);
  67#else
  68static inline struct microcode_ops * __init init_intel_microcode(void)
  69{
  70        return NULL;
  71}
  72#endif /* CONFIG_MICROCODE_INTEL */
  73
  74#ifdef CONFIG_MICROCODE_AMD
  75extern struct microcode_ops * __init init_amd_microcode(void);
  76extern void __exit exit_amd_microcode(void);
  77#else
  78static inline struct microcode_ops * __init init_amd_microcode(void)
  79{
  80        return NULL;
  81}
  82static inline void __exit exit_amd_microcode(void) {}
  83#endif
  84
  85#define MAX_UCODE_COUNT 128
  86
  87#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
  88#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
  89#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
  90#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
  91#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
  92#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
  93#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
  94
  95#define CPUID_IS(a, b, c, ebx, ecx, edx)        \
  96                (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
  97
  98/*
  99 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
 100 * x86_cpuid_vendor() gets vendor id for BSP.
 101 *
 102 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
 103 * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
 104 *
 105 * x86_cpuid_vendor() gets vendor information directly from CPUID.
 106 */
 107static inline int x86_cpuid_vendor(void)
 108{
 109        u32 eax = 0x00000000;
 110        u32 ebx, ecx = 0, edx;
 111
 112        native_cpuid(&eax, &ebx, &ecx, &edx);
 113
 114        if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
 115                return X86_VENDOR_INTEL;
 116
 117        if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
 118                return X86_VENDOR_AMD;
 119
 120        return X86_VENDOR_UNKNOWN;
 121}
 122
 123static inline unsigned int x86_cpuid_family(void)
 124{
 125        u32 eax = 0x00000001;
 126        u32 ebx, ecx = 0, edx;
 127
 128        native_cpuid(&eax, &ebx, &ecx, &edx);
 129
 130        return x86_family(eax);
 131}
 132
 133#ifdef CONFIG_MICROCODE
 134extern void __init load_ucode_bsp(void);
 135extern void load_ucode_ap(void);
 136void reload_early_microcode(void);
 137extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);
 138#else
 139static inline void __init load_ucode_bsp(void)                  { }
 140static inline void load_ucode_ap(void)                          { }
 141static inline void reload_early_microcode(void)                 { }
 142static inline bool
 143get_builtin_firmware(struct cpio_data *cd, const char *name)    { return false; }
 144#endif
 145
 146#endif /* _ASM_X86_MICROCODE_H */
 147