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14#include <linux/cpu.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
19#include <linux/hardirq.h>
20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
24#include <linux/kprobes.h>
25#include <linux/bootmem.h>
26#include <linux/export.h>
27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
30#include <linux/console.h>
31#include <linux/pci.h>
32#include <linux/gfp.h>
33#include <linux/memblock.h>
34#include <linux/edd.h>
35#include <linux/frame.h>
36
37#include <linux/kexec.h>
38
39#include <xen/xen.h>
40#include <xen/events.h>
41#include <xen/interface/xen.h>
42#include <xen/interface/version.h>
43#include <xen/interface/physdev.h>
44#include <xen/interface/vcpu.h>
45#include <xen/interface/memory.h>
46#include <xen/interface/nmi.h>
47#include <xen/interface/xen-mca.h>
48#include <xen/features.h>
49#include <xen/page.h>
50#include <xen/hvm.h>
51#include <xen/hvc-console.h>
52#include <xen/acpi.h>
53
54#include <asm/paravirt.h>
55#include <asm/apic.h>
56#include <asm/page.h>
57#include <asm/xen/pci.h>
58#include <asm/xen/hypercall.h>
59#include <asm/xen/hypervisor.h>
60#include <asm/xen/cpuid.h>
61#include <asm/fixmap.h>
62#include <asm/processor.h>
63#include <asm/proto.h>
64#include <asm/msr-index.h>
65#include <asm/traps.h>
66#include <asm/setup.h>
67#include <asm/desc.h>
68#include <asm/pgalloc.h>
69#include <asm/pgtable.h>
70#include <asm/tlbflush.h>
71#include <asm/reboot.h>
72#include <asm/stackprotector.h>
73#include <asm/hypervisor.h>
74#include <asm/mach_traps.h>
75#include <asm/mwait.h>
76#include <asm/pci_x86.h>
77#include <asm/cpu.h>
78
79#ifdef CONFIG_ACPI
80#include <linux/acpi.h>
81#include <asm/acpi.h>
82#include <acpi/pdc_intel.h>
83#include <acpi/processor.h>
84#include <xen/interface/platform.h>
85#endif
86
87#include "xen-ops.h"
88#include "mmu.h"
89#include "smp.h"
90#include "multicalls.h"
91#include "pmu.h"
92
93EXPORT_SYMBOL_GPL(hypercall_page);
94
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109
110
111DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
112
113
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115
116
117
118DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
119
120
121DEFINE_PER_CPU(uint32_t, xen_vcpu_id);
122EXPORT_PER_CPU_SYMBOL(xen_vcpu_id);
123
124enum xen_domain_type xen_domain_type = XEN_NATIVE;
125EXPORT_SYMBOL_GPL(xen_domain_type);
126
127unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
128EXPORT_SYMBOL(machine_to_phys_mapping);
129unsigned long machine_to_phys_nr;
130EXPORT_SYMBOL(machine_to_phys_nr);
131
132struct start_info *xen_start_info;
133EXPORT_SYMBOL_GPL(xen_start_info);
134
135struct shared_info xen_dummy_shared_info;
136
137void *xen_initial_gdt;
138
139RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
140__read_mostly int xen_have_vector_callback;
141EXPORT_SYMBOL_GPL(xen_have_vector_callback);
142
143
144
145
146
147struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
148
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160
161
162static int have_vcpu_info_placement = 1;
163
164struct tls_descs {
165 struct desc_struct desc[3];
166};
167
168
169
170
171
172
173
174
175static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
176
177static void clamp_max_cpus(void)
178{
179#ifdef CONFIG_SMP
180 if (setup_max_cpus > MAX_VIRT_CPUS)
181 setup_max_cpus = MAX_VIRT_CPUS;
182#endif
183}
184
185void xen_vcpu_setup(int cpu)
186{
187 struct vcpu_register_vcpu_info info;
188 int err;
189 struct vcpu_info *vcpup;
190
191 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
192
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199
200
201
202
203
204 if (xen_hvm_domain()) {
205 if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu))
206 return;
207 }
208 if (xen_vcpu_nr(cpu) < MAX_VIRT_CPUS)
209 per_cpu(xen_vcpu, cpu) =
210 &HYPERVISOR_shared_info->vcpu_info[xen_vcpu_nr(cpu)];
211
212 if (!have_vcpu_info_placement) {
213 if (cpu >= MAX_VIRT_CPUS)
214 clamp_max_cpus();
215 return;
216 }
217
218 vcpup = &per_cpu(xen_vcpu_info, cpu);
219 info.mfn = arbitrary_virt_to_mfn(vcpup);
220 info.offset = offset_in_page(vcpup);
221
222
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225
226
227
228
229
230 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, xen_vcpu_nr(cpu),
231 &info);
232
233 if (err) {
234 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
235 have_vcpu_info_placement = 0;
236 clamp_max_cpus();
237 } else {
238
239
240 per_cpu(xen_vcpu, cpu) = vcpup;
241 }
242}
243
244
245
246
247
248
249void xen_vcpu_restore(void)
250{
251 int cpu;
252
253 for_each_possible_cpu(cpu) {
254 bool other_cpu = (cpu != smp_processor_id());
255 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, xen_vcpu_nr(cpu),
256 NULL);
257
258 if (other_cpu && is_up &&
259 HYPERVISOR_vcpu_op(VCPUOP_down, xen_vcpu_nr(cpu), NULL))
260 BUG();
261
262 xen_setup_runstate_info(cpu);
263
264 if (have_vcpu_info_placement)
265 xen_vcpu_setup(cpu);
266
267 if (other_cpu && is_up &&
268 HYPERVISOR_vcpu_op(VCPUOP_up, xen_vcpu_nr(cpu), NULL))
269 BUG();
270 }
271}
272
273static void __init xen_banner(void)
274{
275 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
276 struct xen_extraversion extra;
277 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
278
279 pr_info("Booting paravirtualized kernel %son %s\n",
280 xen_feature(XENFEAT_auto_translated_physmap) ?
281 "with PVH extensions " : "", pv_info.name);
282 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
283 version >> 16, version & 0xffff, extra.extraversion,
284 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
285}
286
287bool
288xen_running_on_version_or_later(unsigned int major, unsigned int minor)
289{
290 unsigned int version;
291
292 if (!xen_domain())
293 return false;
294
295 version = HYPERVISOR_xen_version(XENVER_version, NULL);
296 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
297 ((version >> 16) > major))
298 return true;
299 return false;
300}
301
302#define CPUID_THERM_POWER_LEAF 6
303#define APERFMPERF_PRESENT 0
304
305static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
306static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
307
308static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
309static __read_mostly unsigned int cpuid_leaf5_ecx_val;
310static __read_mostly unsigned int cpuid_leaf5_edx_val;
311
312static void xen_cpuid(unsigned int *ax, unsigned int *bx,
313 unsigned int *cx, unsigned int *dx)
314{
315 unsigned maskebx = ~0;
316 unsigned maskecx = ~0;
317 unsigned maskedx = ~0;
318 unsigned setecx = 0;
319
320
321
322
323 switch (*ax) {
324 case 1:
325 maskecx = cpuid_leaf1_ecx_mask;
326 setecx = cpuid_leaf1_ecx_set_mask;
327 maskedx = cpuid_leaf1_edx_mask;
328 break;
329
330 case CPUID_MWAIT_LEAF:
331
332 *ax = 0;
333 *bx = 0;
334 *cx = cpuid_leaf5_ecx_val;
335 *dx = cpuid_leaf5_edx_val;
336 return;
337
338 case CPUID_THERM_POWER_LEAF:
339
340 maskecx = ~(1 << APERFMPERF_PRESENT);
341 break;
342
343 case 0xb:
344
345 maskebx = 0;
346 break;
347 }
348
349 asm(XEN_EMULATE_PREFIX "cpuid"
350 : "=a" (*ax),
351 "=b" (*bx),
352 "=c" (*cx),
353 "=d" (*dx)
354 : "0" (*ax), "2" (*cx));
355
356 *bx &= maskebx;
357 *cx &= maskecx;
358 *cx |= setecx;
359 *dx &= maskedx;
360}
361STACK_FRAME_NON_STANDARD(xen_cpuid);
362
363static bool __init xen_check_mwait(void)
364{
365#ifdef CONFIG_ACPI
366 struct xen_platform_op op = {
367 .cmd = XENPF_set_processor_pminfo,
368 .u.set_pminfo.id = -1,
369 .u.set_pminfo.type = XEN_PM_PDC,
370 };
371 uint32_t buf[3];
372 unsigned int ax, bx, cx, dx;
373 unsigned int mwait_mask;
374
375
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378
379
380
381
382
383 if (!xen_initial_domain())
384 return false;
385
386
387
388
389
390 if (!xen_running_on_version_or_later(4, 2))
391 return false;
392
393 ax = 1;
394 cx = 0;
395
396 native_cpuid(&ax, &bx, &cx, &dx);
397
398 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
399 (1 << (X86_FEATURE_MWAIT % 32));
400
401 if ((cx & mwait_mask) != mwait_mask)
402 return false;
403
404
405
406
407
408 ax = CPUID_MWAIT_LEAF;
409 bx = 0;
410 cx = 0;
411 dx = 0;
412
413 native_cpuid(&ax, &bx, &cx, &dx);
414
415
416
417
418 buf[0] = ACPI_PDC_REVISION_ID;
419 buf[1] = 1;
420 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
421
422 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
423
424 if ((HYPERVISOR_platform_op(&op) == 0) &&
425 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
426 cpuid_leaf5_ecx_val = cx;
427 cpuid_leaf5_edx_val = dx;
428 }
429 return true;
430#else
431 return false;
432#endif
433}
434static void __init xen_init_cpuid_mask(void)
435{
436 unsigned int ax, bx, cx, dx;
437 unsigned int xsave_mask;
438
439 cpuid_leaf1_edx_mask =
440 ~((1 << X86_FEATURE_MTRR) |
441 (1 << X86_FEATURE_ACC));
442
443 if (!xen_initial_domain())
444 cpuid_leaf1_edx_mask &=
445 ~((1 << X86_FEATURE_ACPI));
446
447 cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32));
448
449 ax = 1;
450 cx = 0;
451 cpuid(1, &ax, &bx, &cx, &dx);
452
453 xsave_mask =
454 (1 << (X86_FEATURE_XSAVE % 32)) |
455 (1 << (X86_FEATURE_OSXSAVE % 32));
456
457
458 if ((cx & xsave_mask) != xsave_mask)
459 cpuid_leaf1_ecx_mask &= ~xsave_mask;
460 if (xen_check_mwait())
461 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
462}
463
464static void xen_set_debugreg(int reg, unsigned long val)
465{
466 HYPERVISOR_set_debugreg(reg, val);
467}
468
469static unsigned long xen_get_debugreg(int reg)
470{
471 return HYPERVISOR_get_debugreg(reg);
472}
473
474static void xen_end_context_switch(struct task_struct *next)
475{
476 xen_mc_flush();
477 paravirt_end_context_switch(next);
478}
479
480static unsigned long xen_store_tr(void)
481{
482 return 0;
483}
484
485
486
487
488
489
490
491static void set_aliased_prot(void *v, pgprot_t prot)
492{
493 int level;
494 pte_t *ptep;
495 pte_t pte;
496 unsigned long pfn;
497 struct page *page;
498 unsigned char dummy;
499
500 ptep = lookup_address((unsigned long)v, &level);
501 BUG_ON(ptep == NULL);
502
503 pfn = pte_pfn(*ptep);
504 page = pfn_to_page(pfn);
505
506 pte = pfn_pte(pfn, prot);
507
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527
528 preempt_disable();
529
530 probe_kernel_read(&dummy, v, 1);
531
532 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
533 BUG();
534
535 if (!PageHighMem(page)) {
536 void *av = __va(PFN_PHYS(pfn));
537
538 if (av != v)
539 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
540 BUG();
541 } else
542 kmap_flush_unused();
543
544 preempt_enable();
545}
546
547static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
548{
549 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
550 int i;
551
552
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554
555
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560
561
562
563 for(i = 0; i < entries; i += entries_per_page)
564 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
565}
566
567static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
568{
569 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
570 int i;
571
572 for(i = 0; i < entries; i += entries_per_page)
573 set_aliased_prot(ldt + i, PAGE_KERNEL);
574}
575
576static void xen_set_ldt(const void *addr, unsigned entries)
577{
578 struct mmuext_op *op;
579 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
580
581 trace_xen_cpu_set_ldt(addr, entries);
582
583 op = mcs.args;
584 op->cmd = MMUEXT_SET_LDT;
585 op->arg1.linear_addr = (unsigned long)addr;
586 op->arg2.nr_ents = entries;
587
588 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
589
590 xen_mc_issue(PARAVIRT_LAZY_CPU);
591}
592
593static void xen_load_gdt(const struct desc_ptr *dtr)
594{
595 unsigned long va = dtr->address;
596 unsigned int size = dtr->size + 1;
597 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
598 unsigned long frames[pages];
599 int f;
600
601
602
603
604
605
606 BUG_ON(size > 65536);
607 BUG_ON(va & ~PAGE_MASK);
608
609 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
610 int level;
611 pte_t *ptep;
612 unsigned long pfn, mfn;
613 void *virt;
614
615
616
617
618
619
620
621
622 ptep = lookup_address(va, &level);
623 BUG_ON(ptep == NULL);
624
625 pfn = pte_pfn(*ptep);
626 mfn = pfn_to_mfn(pfn);
627 virt = __va(PFN_PHYS(pfn));
628
629 frames[f] = mfn;
630
631 make_lowmem_page_readonly((void *)va);
632 make_lowmem_page_readonly(virt);
633 }
634
635 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
636 BUG();
637}
638
639
640
641
642static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
643{
644 unsigned long va = dtr->address;
645 unsigned int size = dtr->size + 1;
646 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
647 unsigned long frames[pages];
648 int f;
649
650
651
652
653
654
655 BUG_ON(size > 65536);
656 BUG_ON(va & ~PAGE_MASK);
657
658 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
659 pte_t pte;
660 unsigned long pfn, mfn;
661
662 pfn = virt_to_pfn(va);
663 mfn = pfn_to_mfn(pfn);
664
665 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
666
667 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
668 BUG();
669
670 frames[f] = mfn;
671 }
672
673 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
674 BUG();
675}
676
677static inline bool desc_equal(const struct desc_struct *d1,
678 const struct desc_struct *d2)
679{
680 return d1->a == d2->a && d1->b == d2->b;
681}
682
683static void load_TLS_descriptor(struct thread_struct *t,
684 unsigned int cpu, unsigned int i)
685{
686 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
687 struct desc_struct *gdt;
688 xmaddr_t maddr;
689 struct multicall_space mc;
690
691 if (desc_equal(shadow, &t->tls_array[i]))
692 return;
693
694 *shadow = t->tls_array[i];
695
696 gdt = get_cpu_gdt_table(cpu);
697 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
698 mc = __xen_mc_entry(0);
699
700 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
701}
702
703static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
704{
705
706
707
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709
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711
712
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715
716
717
718
719
720
721
722
723 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
724#ifdef CONFIG_X86_32
725 lazy_load_gs(0);
726#else
727 loadsegment(fs, 0);
728#endif
729 }
730
731 xen_mc_batch();
732
733 load_TLS_descriptor(t, cpu, 0);
734 load_TLS_descriptor(t, cpu, 1);
735 load_TLS_descriptor(t, cpu, 2);
736
737 xen_mc_issue(PARAVIRT_LAZY_CPU);
738}
739
740#ifdef CONFIG_X86_64
741static void xen_load_gs_index(unsigned int idx)
742{
743 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
744 BUG();
745}
746#endif
747
748static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
749 const void *ptr)
750{
751 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
752 u64 entry = *(u64 *)ptr;
753
754 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
755
756 preempt_disable();
757
758 xen_mc_flush();
759 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
760 BUG();
761
762 preempt_enable();
763}
764
765static int cvt_gate_to_trap(int vector, const gate_desc *val,
766 struct trap_info *info)
767{
768 unsigned long addr;
769
770 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
771 return 0;
772
773 info->vector = vector;
774
775 addr = gate_offset(*val);
776#ifdef CONFIG_X86_64
777
778
779
780
781
782
783
784 if (addr == (unsigned long)debug)
785 addr = (unsigned long)xen_debug;
786 else if (addr == (unsigned long)int3)
787 addr = (unsigned long)xen_int3;
788 else if (addr == (unsigned long)stack_segment)
789 addr = (unsigned long)xen_stack_segment;
790 else if (addr == (unsigned long)double_fault) {
791
792 return 0;
793#ifdef CONFIG_X86_MCE
794 } else if (addr == (unsigned long)machine_check) {
795
796
797
798
799 ;
800#endif
801 } else if (addr == (unsigned long)nmi)
802
803
804
805 ;
806 else {
807
808 if (WARN_ON(val->ist != 0))
809 return 0;
810 }
811#endif
812 info->address = addr;
813
814 info->cs = gate_segment(*val);
815 info->flags = val->dpl;
816
817 if (val->type == GATE_INTERRUPT)
818 info->flags |= 1 << 2;
819
820 return 1;
821}
822
823
824static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
825
826
827
828static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
829{
830 unsigned long p = (unsigned long)&dt[entrynum];
831 unsigned long start, end;
832
833 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
834
835 preempt_disable();
836
837 start = __this_cpu_read(idt_desc.address);
838 end = start + __this_cpu_read(idt_desc.size) + 1;
839
840 xen_mc_flush();
841
842 native_write_idt_entry(dt, entrynum, g);
843
844 if (p >= start && (p + 8) <= end) {
845 struct trap_info info[2];
846
847 info[1].address = 0;
848
849 if (cvt_gate_to_trap(entrynum, g, &info[0]))
850 if (HYPERVISOR_set_trap_table(info))
851 BUG();
852 }
853
854 preempt_enable();
855}
856
857static void xen_convert_trap_info(const struct desc_ptr *desc,
858 struct trap_info *traps)
859{
860 unsigned in, out, count;
861
862 count = (desc->size+1) / sizeof(gate_desc);
863 BUG_ON(count > 256);
864
865 for (in = out = 0; in < count; in++) {
866 gate_desc *entry = (gate_desc*)(desc->address) + in;
867
868 if (cvt_gate_to_trap(in, entry, &traps[out]))
869 out++;
870 }
871 traps[out].address = 0;
872}
873
874void xen_copy_trap_info(struct trap_info *traps)
875{
876 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
877
878 xen_convert_trap_info(desc, traps);
879}
880
881
882
883
884static void xen_load_idt(const struct desc_ptr *desc)
885{
886 static DEFINE_SPINLOCK(lock);
887 static struct trap_info traps[257];
888
889 trace_xen_cpu_load_idt(desc);
890
891 spin_lock(&lock);
892
893 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
894
895 xen_convert_trap_info(desc, traps);
896
897 xen_mc_flush();
898 if (HYPERVISOR_set_trap_table(traps))
899 BUG();
900
901 spin_unlock(&lock);
902}
903
904
905
906static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
907 const void *desc, int type)
908{
909 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
910
911 preempt_disable();
912
913 switch (type) {
914 case DESC_LDT:
915 case DESC_TSS:
916
917 break;
918
919 default: {
920 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
921
922 xen_mc_flush();
923 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
924 BUG();
925 }
926
927 }
928
929 preempt_enable();
930}
931
932
933
934
935
936static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
937 const void *desc, int type)
938{
939 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
940
941 switch (type) {
942 case DESC_LDT:
943 case DESC_TSS:
944
945 break;
946
947 default: {
948 xmaddr_t maddr = virt_to_machine(&dt[entry]);
949
950 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
951 dt[entry] = *(struct desc_struct *)desc;
952 }
953
954 }
955}
956
957static void xen_load_sp0(struct tss_struct *tss,
958 struct thread_struct *thread)
959{
960 struct multicall_space mcs;
961
962 mcs = xen_mc_entry(0);
963 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
964 xen_mc_issue(PARAVIRT_LAZY_CPU);
965 tss->x86_tss.sp0 = thread->sp0;
966}
967
968void xen_set_iopl_mask(unsigned mask)
969{
970 struct physdev_set_iopl set_iopl;
971
972
973 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
974 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
975}
976
977static void xen_io_delay(void)
978{
979}
980
981static void xen_clts(void)
982{
983 struct multicall_space mcs;
984
985 mcs = xen_mc_entry(0);
986
987 MULTI_fpu_taskswitch(mcs.mc, 0);
988
989 xen_mc_issue(PARAVIRT_LAZY_CPU);
990}
991
992static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
993
994static unsigned long xen_read_cr0(void)
995{
996 unsigned long cr0 = this_cpu_read(xen_cr0_value);
997
998 if (unlikely(cr0 == 0)) {
999 cr0 = native_read_cr0();
1000 this_cpu_write(xen_cr0_value, cr0);
1001 }
1002
1003 return cr0;
1004}
1005
1006static void xen_write_cr0(unsigned long cr0)
1007{
1008 struct multicall_space mcs;
1009
1010 this_cpu_write(xen_cr0_value, cr0);
1011
1012
1013
1014 mcs = xen_mc_entry(0);
1015
1016 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
1017
1018 xen_mc_issue(PARAVIRT_LAZY_CPU);
1019}
1020
1021static void xen_write_cr4(unsigned long cr4)
1022{
1023 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
1024
1025 native_write_cr4(cr4);
1026}
1027#ifdef CONFIG_X86_64
1028static inline unsigned long xen_read_cr8(void)
1029{
1030 return 0;
1031}
1032static inline void xen_write_cr8(unsigned long val)
1033{
1034 BUG_ON(val);
1035}
1036#endif
1037
1038static u64 xen_read_msr_safe(unsigned int msr, int *err)
1039{
1040 u64 val;
1041
1042 if (pmu_msr_read(msr, &val, err))
1043 return val;
1044
1045 val = native_read_msr_safe(msr, err);
1046 switch (msr) {
1047 case MSR_IA32_APICBASE:
1048#ifdef CONFIG_X86_X2APIC
1049 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
1050#endif
1051 val &= ~X2APIC_ENABLE;
1052 break;
1053 }
1054 return val;
1055}
1056
1057static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1058{
1059 int ret;
1060
1061 ret = 0;
1062
1063 switch (msr) {
1064#ifdef CONFIG_X86_64
1065 unsigned which;
1066 u64 base;
1067
1068 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
1069 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
1070 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
1071
1072 set:
1073 base = ((u64)high << 32) | low;
1074 if (HYPERVISOR_set_segment_base(which, base) != 0)
1075 ret = -EIO;
1076 break;
1077#endif
1078
1079 case MSR_STAR:
1080 case MSR_CSTAR:
1081 case MSR_LSTAR:
1082 case MSR_SYSCALL_MASK:
1083 case MSR_IA32_SYSENTER_CS:
1084 case MSR_IA32_SYSENTER_ESP:
1085 case MSR_IA32_SYSENTER_EIP:
1086
1087
1088
1089 break;
1090
1091 default:
1092 if (!pmu_msr_write(msr, low, high, &ret))
1093 ret = native_write_msr_safe(msr, low, high);
1094 }
1095
1096 return ret;
1097}
1098
1099static u64 xen_read_msr(unsigned int msr)
1100{
1101
1102
1103
1104
1105 int err;
1106
1107 return xen_read_msr_safe(msr, &err);
1108}
1109
1110static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
1111{
1112
1113
1114
1115
1116 xen_write_msr_safe(msr, low, high);
1117}
1118
1119void xen_setup_shared_info(void)
1120{
1121 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1122 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1123 xen_start_info->shared_info);
1124
1125 HYPERVISOR_shared_info =
1126 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
1127 } else
1128 HYPERVISOR_shared_info =
1129 (struct shared_info *)__va(xen_start_info->shared_info);
1130
1131#ifndef CONFIG_SMP
1132
1133 xen_setup_vcpu_info_placement();
1134#endif
1135
1136 xen_setup_mfn_list_list();
1137}
1138
1139
1140void xen_setup_vcpu_info_placement(void)
1141{
1142 int cpu;
1143
1144 for_each_possible_cpu(cpu) {
1145
1146 per_cpu(xen_vcpu_id, cpu) = cpu;
1147 xen_vcpu_setup(cpu);
1148 }
1149
1150
1151
1152
1153 if (have_vcpu_info_placement && !xen_pvh_domain()) {
1154 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1155 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1156 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1157 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1158 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
1159 }
1160}
1161
1162static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1163 unsigned long addr, unsigned len)
1164{
1165 char *start, *end, *reloc;
1166 unsigned ret;
1167
1168 start = end = reloc = NULL;
1169
1170#define SITE(op, x) \
1171 case PARAVIRT_PATCH(op.x): \
1172 if (have_vcpu_info_placement) { \
1173 start = (char *)xen_##x##_direct; \
1174 end = xen_##x##_direct_end; \
1175 reloc = xen_##x##_direct_reloc; \
1176 } \
1177 goto patch_site
1178
1179 switch (type) {
1180 SITE(pv_irq_ops, irq_enable);
1181 SITE(pv_irq_ops, irq_disable);
1182 SITE(pv_irq_ops, save_fl);
1183 SITE(pv_irq_ops, restore_fl);
1184#undef SITE
1185
1186 patch_site:
1187 if (start == NULL || (end-start) > len)
1188 goto default_patch;
1189
1190 ret = paravirt_patch_insns(insnbuf, len, start, end);
1191
1192
1193
1194
1195
1196 if (reloc > start && reloc < end) {
1197 int reloc_off = reloc - start;
1198 long *relocp = (long *)(insnbuf + reloc_off);
1199 long delta = start - (char *)addr;
1200
1201 *relocp += delta;
1202 }
1203 break;
1204
1205 default_patch:
1206 default:
1207 ret = paravirt_patch_default(type, clobbers, insnbuf,
1208 addr, len);
1209 break;
1210 }
1211
1212 return ret;
1213}
1214
1215static const struct pv_info xen_info __initconst = {
1216 .shared_kernel_pmd = 0,
1217
1218#ifdef CONFIG_X86_64
1219 .extra_user_64bit_cs = FLAT_USER_CS64,
1220#endif
1221 .name = "Xen",
1222};
1223
1224static const struct pv_init_ops xen_init_ops __initconst = {
1225 .patch = xen_patch,
1226};
1227
1228static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1229 .cpuid = xen_cpuid,
1230
1231 .set_debugreg = xen_set_debugreg,
1232 .get_debugreg = xen_get_debugreg,
1233
1234 .clts = xen_clts,
1235
1236 .read_cr0 = xen_read_cr0,
1237 .write_cr0 = xen_write_cr0,
1238
1239 .read_cr4 = native_read_cr4,
1240 .read_cr4_safe = native_read_cr4_safe,
1241 .write_cr4 = xen_write_cr4,
1242
1243#ifdef CONFIG_X86_64
1244 .read_cr8 = xen_read_cr8,
1245 .write_cr8 = xen_write_cr8,
1246#endif
1247
1248 .wbinvd = native_wbinvd,
1249
1250 .read_msr = xen_read_msr,
1251 .write_msr = xen_write_msr,
1252
1253 .read_msr_safe = xen_read_msr_safe,
1254 .write_msr_safe = xen_write_msr_safe,
1255
1256 .read_pmc = xen_read_pmc,
1257
1258 .iret = xen_iret,
1259#ifdef CONFIG_X86_64
1260 .usergs_sysret64 = xen_sysret64,
1261#endif
1262
1263 .load_tr_desc = paravirt_nop,
1264 .set_ldt = xen_set_ldt,
1265 .load_gdt = xen_load_gdt,
1266 .load_idt = xen_load_idt,
1267 .load_tls = xen_load_tls,
1268#ifdef CONFIG_X86_64
1269 .load_gs_index = xen_load_gs_index,
1270#endif
1271
1272 .alloc_ldt = xen_alloc_ldt,
1273 .free_ldt = xen_free_ldt,
1274
1275 .store_idt = native_store_idt,
1276 .store_tr = xen_store_tr,
1277
1278 .write_ldt_entry = xen_write_ldt_entry,
1279 .write_gdt_entry = xen_write_gdt_entry,
1280 .write_idt_entry = xen_write_idt_entry,
1281 .load_sp0 = xen_load_sp0,
1282
1283 .set_iopl_mask = xen_set_iopl_mask,
1284 .io_delay = xen_io_delay,
1285
1286
1287 .swapgs = paravirt_nop,
1288
1289 .start_context_switch = paravirt_start_context_switch,
1290 .end_context_switch = xen_end_context_switch,
1291};
1292
1293static void xen_reboot(int reason)
1294{
1295 struct sched_shutdown r = { .reason = reason };
1296 int cpu;
1297
1298 for_each_online_cpu(cpu)
1299 xen_pmu_finish(cpu);
1300
1301 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
1302 BUG();
1303}
1304
1305static void xen_restart(char *msg)
1306{
1307 xen_reboot(SHUTDOWN_reboot);
1308}
1309
1310static void xen_emergency_restart(void)
1311{
1312 xen_reboot(SHUTDOWN_reboot);
1313}
1314
1315static void xen_machine_halt(void)
1316{
1317 xen_reboot(SHUTDOWN_poweroff);
1318}
1319
1320static void xen_machine_power_off(void)
1321{
1322 if (pm_power_off)
1323 pm_power_off();
1324 xen_reboot(SHUTDOWN_poweroff);
1325}
1326
1327static void xen_crash_shutdown(struct pt_regs *regs)
1328{
1329 xen_reboot(SHUTDOWN_crash);
1330}
1331
1332static int
1333xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1334{
1335 if (!kexec_crash_loaded())
1336 xen_reboot(SHUTDOWN_crash);
1337 return NOTIFY_DONE;
1338}
1339
1340static struct notifier_block xen_panic_block = {
1341 .notifier_call= xen_panic_event,
1342 .priority = INT_MIN
1343};
1344
1345int xen_panic_handler_init(void)
1346{
1347 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1348 return 0;
1349}
1350
1351static const struct machine_ops xen_machine_ops __initconst = {
1352 .restart = xen_restart,
1353 .halt = xen_machine_halt,
1354 .power_off = xen_machine_power_off,
1355 .shutdown = xen_machine_halt,
1356 .crash_shutdown = xen_crash_shutdown,
1357 .emergency_restart = xen_emergency_restart,
1358};
1359
1360static unsigned char xen_get_nmi_reason(void)
1361{
1362 unsigned char reason = 0;
1363
1364
1365 if (test_bit(_XEN_NMIREASON_io_error,
1366 &HYPERVISOR_shared_info->arch.nmi_reason))
1367 reason |= NMI_REASON_IOCHK;
1368 if (test_bit(_XEN_NMIREASON_pci_serr,
1369 &HYPERVISOR_shared_info->arch.nmi_reason))
1370 reason |= NMI_REASON_SERR;
1371
1372 return reason;
1373}
1374
1375static void __init xen_boot_params_init_edd(void)
1376{
1377#if IS_ENABLED(CONFIG_EDD)
1378 struct xen_platform_op op;
1379 struct edd_info *edd_info;
1380 u32 *mbr_signature;
1381 unsigned nr;
1382 int ret;
1383
1384 edd_info = boot_params.eddbuf;
1385 mbr_signature = boot_params.edd_mbr_sig_buffer;
1386
1387 op.cmd = XENPF_firmware_info;
1388
1389 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1390 for (nr = 0; nr < EDDMAXNR; nr++) {
1391 struct edd_info *info = edd_info + nr;
1392
1393 op.u.firmware_info.index = nr;
1394 info->params.length = sizeof(info->params);
1395 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1396 &info->params);
1397 ret = HYPERVISOR_platform_op(&op);
1398 if (ret)
1399 break;
1400
1401#define C(x) info->x = op.u.firmware_info.u.disk_info.x
1402 C(device);
1403 C(version);
1404 C(interface_support);
1405 C(legacy_max_cylinder);
1406 C(legacy_max_head);
1407 C(legacy_sectors_per_track);
1408#undef C
1409 }
1410 boot_params.eddbuf_entries = nr;
1411
1412 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1413 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1414 op.u.firmware_info.index = nr;
1415 ret = HYPERVISOR_platform_op(&op);
1416 if (ret)
1417 break;
1418 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1419 }
1420 boot_params.edd_mbr_sig_buf_entries = nr;
1421#endif
1422}
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433static void __ref xen_setup_gdt(int cpu)
1434{
1435 if (xen_feature(XENFEAT_auto_translated_physmap)) {
1436#ifdef CONFIG_X86_64
1437 unsigned long dummy;
1438
1439 load_percpu_segment(cpu);
1440 switch_to_new_gdt(cpu);
1441
1442
1443
1444
1445
1446 asm volatile ("pushq %0\n"
1447 "leaq 1f(%%rip),%0\n"
1448 "pushq %0\n"
1449 "lretq\n"
1450 "1:\n"
1451 : "=&r" (dummy) : "0" (__KERNEL_CS));
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462 loadsegment(es, 0);
1463 loadsegment(ds, 0);
1464 loadsegment(fs, 0);
1465#else
1466
1467 BUG();
1468#endif
1469 return;
1470 }
1471 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1472 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1473
1474 setup_stack_canary_segment(0);
1475 switch_to_new_gdt(0);
1476
1477 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1478 pv_cpu_ops.load_gdt = xen_load_gdt;
1479}
1480
1481#ifdef CONFIG_XEN_PVH
1482
1483
1484
1485
1486static void xen_pvh_set_cr_flags(int cpu)
1487{
1488
1489
1490
1491
1492 write_cr0(read_cr0() | X86_CR0_MP | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM);
1493
1494 if (!cpu)
1495 return;
1496
1497
1498
1499
1500 if (boot_cpu_has(X86_FEATURE_PSE))
1501 cr4_set_bits_and_update_boot(X86_CR4_PSE);
1502
1503 if (boot_cpu_has(X86_FEATURE_PGE))
1504 cr4_set_bits_and_update_boot(X86_CR4_PGE);
1505}
1506
1507
1508
1509
1510
1511
1512void __ref xen_pvh_secondary_vcpu_init(int cpu)
1513{
1514 xen_setup_gdt(cpu);
1515 xen_pvh_set_cr_flags(cpu);
1516}
1517
1518static void __init xen_pvh_early_guest_init(void)
1519{
1520 if (!xen_feature(XENFEAT_auto_translated_physmap))
1521 return;
1522
1523 if (!xen_feature(XENFEAT_hvm_callback_vector))
1524 return;
1525
1526 xen_have_vector_callback = 1;
1527
1528 xen_pvh_early_cpu_init(0, false);
1529 xen_pvh_set_cr_flags(0);
1530
1531#ifdef CONFIG_X86_32
1532 BUG();
1533#endif
1534}
1535#endif
1536
1537static void __init xen_dom0_set_legacy_features(void)
1538{
1539 x86_platform.legacy.rtc = 1;
1540}
1541
1542
1543asmlinkage __visible void __init xen_start_kernel(void)
1544{
1545 struct physdev_set_iopl set_iopl;
1546 unsigned long initrd_start = 0;
1547 int rc;
1548
1549 if (!xen_start_info)
1550 return;
1551
1552 xen_domain_type = XEN_PV_DOMAIN;
1553
1554 xen_setup_features();
1555#ifdef CONFIG_XEN_PVH
1556 xen_pvh_early_guest_init();
1557#endif
1558 xen_setup_machphys_mapping();
1559
1560
1561 pv_info = xen_info;
1562 pv_init_ops = xen_init_ops;
1563 if (!xen_pvh_domain()) {
1564 pv_cpu_ops = xen_cpu_ops;
1565
1566 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1567 }
1568
1569 if (xen_feature(XENFEAT_auto_translated_physmap))
1570 x86_init.resources.memory_setup = xen_auto_xlated_memory_setup;
1571 else
1572 x86_init.resources.memory_setup = xen_memory_setup;
1573 x86_init.oem.arch_setup = xen_arch_setup;
1574 x86_init.oem.banner = xen_banner;
1575
1576 xen_init_time_ops();
1577
1578
1579
1580
1581
1582 xen_init_mmu_ops();
1583
1584
1585 __supported_pte_mask &= ~_PAGE_GLOBAL;
1586
1587
1588
1589
1590
1591 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1592
1593
1594 x86_configure_nx();
1595
1596
1597 xen_build_dynamic_phys_to_machine();
1598
1599
1600
1601
1602
1603 xen_setup_gdt(0);
1604
1605 xen_init_irq_ops();
1606 xen_init_cpuid_mask();
1607
1608#ifdef CONFIG_X86_LOCAL_APIC
1609
1610
1611
1612 xen_init_apic();
1613#endif
1614
1615 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1616 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1617 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1618 }
1619
1620 machine_ops = xen_machine_ops;
1621
1622
1623
1624
1625
1626
1627 xen_initial_gdt = &per_cpu(gdt_page, 0);
1628
1629 xen_smp_init();
1630
1631#ifdef CONFIG_ACPI_NUMA
1632
1633
1634
1635
1636
1637 acpi_numa = -1;
1638#endif
1639
1640
1641 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1642
1643 local_irq_disable();
1644 early_boot_irqs_disabled = true;
1645
1646 xen_raw_console_write("mapping kernel into physical memory\n");
1647 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1648 xen_start_info->nr_pages);
1649 xen_reserve_special_pages();
1650
1651
1652
1653#ifdef CONFIG_X86_32
1654 pv_info.kernel_rpl = 1;
1655 if (xen_feature(XENFEAT_supervisor_mode_kernel))
1656 pv_info.kernel_rpl = 0;
1657#else
1658 pv_info.kernel_rpl = 0;
1659#endif
1660
1661 xen_reserve_top();
1662
1663
1664 if (!xen_pvh_domain()) {
1665
1666
1667
1668
1669
1670 set_iopl.iopl = 1;
1671 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1672 if (rc != 0)
1673 xen_raw_printk("physdev_op failed %d\n", rc);
1674 }
1675
1676#ifdef CONFIG_X86_32
1677
1678 cpu_detect(&new_cpu_data);
1679 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1680 new_cpu_data.wp_works_ok = 1;
1681 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1);
1682#endif
1683
1684 if (xen_start_info->mod_start) {
1685 if (xen_start_info->flags & SIF_MOD_START_PFN)
1686 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1687 else
1688 initrd_start = __pa(xen_start_info->mod_start);
1689 }
1690
1691
1692 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1693 boot_params.hdr.ramdisk_image = initrd_start;
1694 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1695 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1696 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1697
1698 if (!xen_initial_domain()) {
1699 add_preferred_console("xenboot", 0, NULL);
1700 add_preferred_console("tty", 0, NULL);
1701 add_preferred_console("hvc", 0, NULL);
1702 if (pci_xen)
1703 x86_init.pci.arch_init = pci_xen_init;
1704 } else {
1705 const struct dom0_vga_console_info *info =
1706 (void *)((char *)xen_start_info +
1707 xen_start_info->console.dom0.info_off);
1708 struct xen_platform_op op = {
1709 .cmd = XENPF_firmware_info,
1710 .interface_version = XENPF_INTERFACE_VERSION,
1711 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1712 };
1713
1714 x86_platform.set_legacy_features =
1715 xen_dom0_set_legacy_features;
1716 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1717 xen_start_info->console.domU.mfn = 0;
1718 xen_start_info->console.domU.evtchn = 0;
1719
1720 if (HYPERVISOR_platform_op(&op) == 0)
1721 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1722
1723
1724 pci_request_acs();
1725
1726 xen_acpi_sleep_register();
1727
1728
1729 x86_init.mpparse.find_smp_config = x86_init_noop;
1730 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1731
1732 xen_boot_params_init_edd();
1733 }
1734#ifdef CONFIG_PCI
1735
1736 pci_probe &= ~PCI_PROBE_BIOS;
1737#endif
1738 xen_raw_console_write("about to get started...\n");
1739
1740
1741 per_cpu(xen_vcpu_id, 0) = 0;
1742
1743 xen_setup_runstate_info(0);
1744
1745 xen_efi_init();
1746
1747
1748#ifdef CONFIG_X86_32
1749 i386_start_kernel();
1750#else
1751 cr4_init_shadow();
1752 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1753#endif
1754}
1755
1756void __ref xen_hvm_init_shared_info(void)
1757{
1758 int cpu;
1759 struct xen_add_to_physmap xatp;
1760 static struct shared_info *shared_info_page = 0;
1761
1762 if (!shared_info_page)
1763 shared_info_page = (struct shared_info *)
1764 extend_brk(PAGE_SIZE, PAGE_SIZE);
1765 xatp.domid = DOMID_SELF;
1766 xatp.idx = 0;
1767 xatp.space = XENMAPSPACE_shared_info;
1768 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1769 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1770 BUG();
1771
1772 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782 for_each_online_cpu(cpu) {
1783
1784 if (xen_vcpu_nr(cpu) >= MAX_VIRT_CPUS)
1785 continue;
1786 per_cpu(xen_vcpu, cpu) =
1787 &HYPERVISOR_shared_info->vcpu_info[xen_vcpu_nr(cpu)];
1788 }
1789}
1790
1791#ifdef CONFIG_XEN_PVHVM
1792static void __init init_hvm_pv_info(void)
1793{
1794 int major, minor;
1795 uint32_t eax, ebx, ecx, edx, pages, msr, base;
1796 u64 pfn;
1797
1798 base = xen_cpuid_base();
1799 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1800
1801 major = eax >> 16;
1802 minor = eax & 0xffff;
1803 printk(KERN_INFO "Xen version %d.%d.\n", major, minor);
1804
1805 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1806
1807 pfn = __pa(hypercall_page);
1808 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1809
1810 xen_setup_features();
1811
1812 cpuid(base + 4, &eax, &ebx, &ecx, &edx);
1813 if (eax & XEN_HVM_CPUID_VCPU_ID_PRESENT)
1814 this_cpu_write(xen_vcpu_id, ebx);
1815 else
1816 this_cpu_write(xen_vcpu_id, smp_processor_id());
1817
1818 pv_info.name = "Xen HVM";
1819
1820 xen_domain_type = XEN_HVM_DOMAIN;
1821}
1822
1823static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action,
1824 void *hcpu)
1825{
1826 int cpu = (long)hcpu;
1827 switch (action) {
1828 case CPU_UP_PREPARE:
1829 if (cpu_acpi_id(cpu) != U32_MAX)
1830 per_cpu(xen_vcpu_id, cpu) = cpu_acpi_id(cpu);
1831 else
1832 per_cpu(xen_vcpu_id, cpu) = cpu;
1833 xen_vcpu_setup(cpu);
1834 if (xen_have_vector_callback) {
1835 if (xen_feature(XENFEAT_hvm_safe_pvclock))
1836 xen_setup_timer(cpu);
1837 }
1838 break;
1839 default:
1840 break;
1841 }
1842 return NOTIFY_OK;
1843}
1844
1845static struct notifier_block xen_hvm_cpu_notifier = {
1846 .notifier_call = xen_hvm_cpu_notify,
1847};
1848
1849#ifdef CONFIG_KEXEC_CORE
1850static void xen_hvm_shutdown(void)
1851{
1852 native_machine_shutdown();
1853 if (kexec_in_progress)
1854 xen_reboot(SHUTDOWN_soft_reset);
1855}
1856
1857static void xen_hvm_crash_shutdown(struct pt_regs *regs)
1858{
1859 native_machine_crash_shutdown(regs);
1860 xen_reboot(SHUTDOWN_soft_reset);
1861}
1862#endif
1863
1864static void __init xen_hvm_guest_init(void)
1865{
1866 if (xen_pv_domain())
1867 return;
1868
1869 init_hvm_pv_info();
1870
1871 xen_hvm_init_shared_info();
1872
1873 xen_panic_handler_init();
1874
1875 if (xen_feature(XENFEAT_hvm_callback_vector))
1876 xen_have_vector_callback = 1;
1877 xen_hvm_smp_init();
1878 register_cpu_notifier(&xen_hvm_cpu_notifier);
1879 xen_unplug_emulated_devices();
1880 x86_init.irqs.intr_init = xen_init_IRQ;
1881 xen_hvm_init_time_ops();
1882 xen_hvm_init_mmu_ops();
1883#ifdef CONFIG_KEXEC_CORE
1884 machine_ops.shutdown = xen_hvm_shutdown;
1885 machine_ops.crash_shutdown = xen_hvm_crash_shutdown;
1886#endif
1887}
1888#endif
1889
1890static bool xen_nopv = false;
1891static __init int xen_parse_nopv(char *arg)
1892{
1893 xen_nopv = true;
1894 return 0;
1895}
1896early_param("xen_nopv", xen_parse_nopv);
1897
1898static uint32_t __init xen_platform(void)
1899{
1900 if (xen_nopv)
1901 return 0;
1902
1903 return xen_cpuid_base();
1904}
1905
1906bool xen_hvm_need_lapic(void)
1907{
1908 if (xen_nopv)
1909 return false;
1910 if (xen_pv_domain())
1911 return false;
1912 if (!xen_hvm_domain())
1913 return false;
1914 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1915 return false;
1916 return true;
1917}
1918EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1919
1920static void xen_set_cpu_features(struct cpuinfo_x86 *c)
1921{
1922 if (xen_pv_domain()) {
1923 clear_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
1924 set_cpu_cap(c, X86_FEATURE_XENPV);
1925 }
1926}
1927
1928const struct hypervisor_x86 x86_hyper_xen = {
1929 .name = "Xen",
1930 .detect = xen_platform,
1931#ifdef CONFIG_XEN_PVHVM
1932 .init_platform = xen_hvm_guest_init,
1933#endif
1934 .x2apic_available = xen_x2apic_para_available,
1935 .set_cpu_features = xen_set_cpu_features,
1936};
1937EXPORT_SYMBOL(x86_hyper_xen);
1938
1939#ifdef CONFIG_HOTPLUG_CPU
1940void xen_arch_register_cpu(int num)
1941{
1942 arch_register_cpu(num);
1943}
1944EXPORT_SYMBOL(xen_arch_register_cpu);
1945
1946void xen_arch_unregister_cpu(int num)
1947{
1948 arch_unregister_cpu(num);
1949}
1950EXPORT_SYMBOL(xen_arch_unregister_cpu);
1951#endif
1952