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18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/random.h>
21#include <linux/err.h>
22#include <linux/platform_device.h>
23#include <linux/hw_random.h>
24#include <linux/delay.h>
25#include <linux/slab.h>
26#include <linux/pm_runtime.h>
27#include <linux/of.h>
28#include <linux/of_device.h>
29#include <linux/of_address.h>
30#include <linux/interrupt.h>
31
32#include <asm/io.h>
33
34#define RNG_REG_STATUS_RDY (1 << 0)
35
36#define RNG_REG_INTACK_RDY_MASK (1 << 0)
37#define RNG_REG_INTACK_SHUTDOWN_OFLO_MASK (1 << 1)
38#define RNG_SHUTDOWN_OFLO_MASK (1 << 1)
39
40#define RNG_CONTROL_STARTUP_CYCLES_SHIFT 16
41#define RNG_CONTROL_STARTUP_CYCLES_MASK (0xffff << 16)
42#define RNG_CONTROL_ENABLE_TRNG_SHIFT 10
43#define RNG_CONTROL_ENABLE_TRNG_MASK (1 << 10)
44
45#define RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT 16
46#define RNG_CONFIG_MAX_REFIL_CYCLES_MASK (0xffff << 16)
47#define RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT 0
48#define RNG_CONFIG_MIN_REFIL_CYCLES_MASK (0xff << 0)
49
50#define RNG_CONTROL_STARTUP_CYCLES 0xff
51#define RNG_CONFIG_MIN_REFIL_CYCLES 0x21
52#define RNG_CONFIG_MAX_REFIL_CYCLES 0x22
53
54#define RNG_ALARMCNT_ALARM_TH_SHIFT 0x0
55#define RNG_ALARMCNT_ALARM_TH_MASK (0xff << 0)
56#define RNG_ALARMCNT_SHUTDOWN_TH_SHIFT 16
57#define RNG_ALARMCNT_SHUTDOWN_TH_MASK (0x1f << 16)
58#define RNG_ALARM_THRESHOLD 0xff
59#define RNG_SHUTDOWN_THRESHOLD 0x4
60
61#define RNG_REG_FROENABLE_MASK 0xffffff
62#define RNG_REG_FRODETUNE_MASK 0xffffff
63
64#define OMAP2_RNG_OUTPUT_SIZE 0x4
65#define OMAP4_RNG_OUTPUT_SIZE 0x8
66
67enum {
68 RNG_OUTPUT_L_REG = 0,
69 RNG_OUTPUT_H_REG,
70 RNG_STATUS_REG,
71 RNG_INTMASK_REG,
72 RNG_INTACK_REG,
73 RNG_CONTROL_REG,
74 RNG_CONFIG_REG,
75 RNG_ALARMCNT_REG,
76 RNG_FROENABLE_REG,
77 RNG_FRODETUNE_REG,
78 RNG_ALARMMASK_REG,
79 RNG_ALARMSTOP_REG,
80 RNG_REV_REG,
81 RNG_SYSCONFIG_REG,
82};
83
84static const u16 reg_map_omap2[] = {
85 [RNG_OUTPUT_L_REG] = 0x0,
86 [RNG_STATUS_REG] = 0x4,
87 [RNG_CONFIG_REG] = 0x28,
88 [RNG_REV_REG] = 0x3c,
89 [RNG_SYSCONFIG_REG] = 0x40,
90};
91
92static const u16 reg_map_omap4[] = {
93 [RNG_OUTPUT_L_REG] = 0x0,
94 [RNG_OUTPUT_H_REG] = 0x4,
95 [RNG_STATUS_REG] = 0x8,
96 [RNG_INTMASK_REG] = 0xc,
97 [RNG_INTACK_REG] = 0x10,
98 [RNG_CONTROL_REG] = 0x14,
99 [RNG_CONFIG_REG] = 0x18,
100 [RNG_ALARMCNT_REG] = 0x1c,
101 [RNG_FROENABLE_REG] = 0x20,
102 [RNG_FRODETUNE_REG] = 0x24,
103 [RNG_ALARMMASK_REG] = 0x28,
104 [RNG_ALARMSTOP_REG] = 0x2c,
105 [RNG_REV_REG] = 0x1FE0,
106 [RNG_SYSCONFIG_REG] = 0x1FE4,
107};
108
109struct omap_rng_dev;
110
111
112
113
114
115
116
117
118struct omap_rng_pdata {
119 u16 *regs;
120 u32 data_size;
121 u32 (*data_present)(struct omap_rng_dev *priv);
122 int (*init)(struct omap_rng_dev *priv);
123 void (*cleanup)(struct omap_rng_dev *priv);
124};
125
126struct omap_rng_dev {
127 void __iomem *base;
128 struct device *dev;
129 const struct omap_rng_pdata *pdata;
130};
131
132static inline u32 omap_rng_read(struct omap_rng_dev *priv, u16 reg)
133{
134 return __raw_readl(priv->base + priv->pdata->regs[reg]);
135}
136
137static inline void omap_rng_write(struct omap_rng_dev *priv, u16 reg,
138 u32 val)
139{
140 __raw_writel(val, priv->base + priv->pdata->regs[reg]);
141}
142
143static int omap_rng_data_present(struct hwrng *rng, int wait)
144{
145 struct omap_rng_dev *priv;
146 int data, i;
147
148 priv = (struct omap_rng_dev *)rng->priv;
149
150 for (i = 0; i < 20; i++) {
151 data = priv->pdata->data_present(priv);
152 if (data || !wait)
153 break;
154
155
156
157
158
159 udelay(10);
160 }
161 return data;
162}
163
164static int omap_rng_data_read(struct hwrng *rng, u32 *data)
165{
166 struct omap_rng_dev *priv;
167 u32 data_size, i;
168
169 priv = (struct omap_rng_dev *)rng->priv;
170 data_size = priv->pdata->data_size;
171
172 for (i = 0; i < data_size / sizeof(u32); i++)
173 data[i] = omap_rng_read(priv, RNG_OUTPUT_L_REG + i);
174
175 if (priv->pdata->regs[RNG_INTACK_REG])
176 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_RDY_MASK);
177 return data_size;
178}
179
180static int omap_rng_init(struct hwrng *rng)
181{
182 struct omap_rng_dev *priv;
183
184 priv = (struct omap_rng_dev *)rng->priv;
185 return priv->pdata->init(priv);
186}
187
188static void omap_rng_cleanup(struct hwrng *rng)
189{
190 struct omap_rng_dev *priv;
191
192 priv = (struct omap_rng_dev *)rng->priv;
193 priv->pdata->cleanup(priv);
194}
195
196static struct hwrng omap_rng_ops = {
197 .name = "omap",
198 .data_present = omap_rng_data_present,
199 .data_read = omap_rng_data_read,
200 .init = omap_rng_init,
201 .cleanup = omap_rng_cleanup,
202};
203
204static inline u32 omap2_rng_data_present(struct omap_rng_dev *priv)
205{
206 return omap_rng_read(priv, RNG_STATUS_REG) ? 0 : 1;
207}
208
209static int omap2_rng_init(struct omap_rng_dev *priv)
210{
211 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x1);
212 return 0;
213}
214
215static void omap2_rng_cleanup(struct omap_rng_dev *priv)
216{
217 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x0);
218}
219
220static struct omap_rng_pdata omap2_rng_pdata = {
221 .regs = (u16 *)reg_map_omap2,
222 .data_size = OMAP2_RNG_OUTPUT_SIZE,
223 .data_present = omap2_rng_data_present,
224 .init = omap2_rng_init,
225 .cleanup = omap2_rng_cleanup,
226};
227
228#if defined(CONFIG_OF)
229static inline u32 omap4_rng_data_present(struct omap_rng_dev *priv)
230{
231 return omap_rng_read(priv, RNG_STATUS_REG) & RNG_REG_STATUS_RDY;
232}
233
234static int omap4_rng_init(struct omap_rng_dev *priv)
235{
236 u32 val;
237
238
239 if (omap_rng_read(priv, RNG_CONTROL_REG) & RNG_CONTROL_ENABLE_TRNG_MASK)
240 return 0;
241
242 val = RNG_CONFIG_MIN_REFIL_CYCLES << RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT;
243 val |= RNG_CONFIG_MAX_REFIL_CYCLES << RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT;
244 omap_rng_write(priv, RNG_CONFIG_REG, val);
245
246 omap_rng_write(priv, RNG_FRODETUNE_REG, 0x0);
247 omap_rng_write(priv, RNG_FROENABLE_REG, RNG_REG_FROENABLE_MASK);
248 val = RNG_ALARM_THRESHOLD << RNG_ALARMCNT_ALARM_TH_SHIFT;
249 val |= RNG_SHUTDOWN_THRESHOLD << RNG_ALARMCNT_SHUTDOWN_TH_SHIFT;
250 omap_rng_write(priv, RNG_ALARMCNT_REG, val);
251
252 val = RNG_CONTROL_STARTUP_CYCLES << RNG_CONTROL_STARTUP_CYCLES_SHIFT;
253 val |= RNG_CONTROL_ENABLE_TRNG_MASK;
254 omap_rng_write(priv, RNG_CONTROL_REG, val);
255
256 return 0;
257}
258
259static void omap4_rng_cleanup(struct omap_rng_dev *priv)
260{
261 int val;
262
263 val = omap_rng_read(priv, RNG_CONTROL_REG);
264 val &= ~RNG_CONTROL_ENABLE_TRNG_MASK;
265 omap_rng_write(priv, RNG_CONTROL_REG, val);
266}
267
268static irqreturn_t omap4_rng_irq(int irq, void *dev_id)
269{
270 struct omap_rng_dev *priv = dev_id;
271 u32 fro_detune, fro_enable;
272
273
274
275
276
277
278
279 omap_rng_write(priv, RNG_ALARMMASK_REG, 0x0);
280 omap_rng_write(priv, RNG_ALARMSTOP_REG, 0x0);
281
282 fro_enable = omap_rng_read(priv, RNG_FROENABLE_REG);
283 fro_detune = ~fro_enable & RNG_REG_FRODETUNE_MASK;
284 fro_detune = fro_detune | omap_rng_read(priv, RNG_FRODETUNE_REG);
285 fro_enable = RNG_REG_FROENABLE_MASK;
286
287 omap_rng_write(priv, RNG_FRODETUNE_REG, fro_detune);
288 omap_rng_write(priv, RNG_FROENABLE_REG, fro_enable);
289
290 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_SHUTDOWN_OFLO_MASK);
291
292 return IRQ_HANDLED;
293}
294
295static struct omap_rng_pdata omap4_rng_pdata = {
296 .regs = (u16 *)reg_map_omap4,
297 .data_size = OMAP4_RNG_OUTPUT_SIZE,
298 .data_present = omap4_rng_data_present,
299 .init = omap4_rng_init,
300 .cleanup = omap4_rng_cleanup,
301};
302
303static const struct of_device_id omap_rng_of_match[] = {
304 {
305 .compatible = "ti,omap2-rng",
306 .data = &omap2_rng_pdata,
307 },
308 {
309 .compatible = "ti,omap4-rng",
310 .data = &omap4_rng_pdata,
311 },
312 {},
313};
314MODULE_DEVICE_TABLE(of, omap_rng_of_match);
315
316static int of_get_omap_rng_device_details(struct omap_rng_dev *priv,
317 struct platform_device *pdev)
318{
319 const struct of_device_id *match;
320 struct device *dev = &pdev->dev;
321 int irq, err;
322
323 match = of_match_device(of_match_ptr(omap_rng_of_match), dev);
324 if (!match) {
325 dev_err(dev, "no compatible OF match\n");
326 return -EINVAL;
327 }
328 priv->pdata = match->data;
329
330 if (of_device_is_compatible(dev->of_node, "ti,omap4-rng")) {
331 irq = platform_get_irq(pdev, 0);
332 if (irq < 0) {
333 dev_err(dev, "%s: error getting IRQ resource - %d\n",
334 __func__, irq);
335 return irq;
336 }
337
338 err = devm_request_irq(dev, irq, omap4_rng_irq,
339 IRQF_TRIGGER_NONE, dev_name(dev), priv);
340 if (err) {
341 dev_err(dev, "unable to request irq %d, err = %d\n",
342 irq, err);
343 return err;
344 }
345 omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK);
346 }
347 return 0;
348}
349#else
350static int of_get_omap_rng_device_details(struct omap_rng_dev *omap_rng,
351 struct platform_device *pdev)
352{
353 return -EINVAL;
354}
355#endif
356
357static int get_omap_rng_device_details(struct omap_rng_dev *omap_rng)
358{
359
360 omap_rng->pdata = &omap2_rng_pdata;
361 return 0;
362}
363
364static int omap_rng_probe(struct platform_device *pdev)
365{
366 struct omap_rng_dev *priv;
367 struct resource *res;
368 struct device *dev = &pdev->dev;
369 int ret;
370
371 priv = devm_kzalloc(dev, sizeof(struct omap_rng_dev), GFP_KERNEL);
372 if (!priv)
373 return -ENOMEM;
374
375 omap_rng_ops.priv = (unsigned long)priv;
376 platform_set_drvdata(pdev, priv);
377 priv->dev = dev;
378
379 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
380 priv->base = devm_ioremap_resource(dev, res);
381 if (IS_ERR(priv->base)) {
382 ret = PTR_ERR(priv->base);
383 goto err_ioremap;
384 }
385
386 pm_runtime_enable(&pdev->dev);
387 ret = pm_runtime_get_sync(&pdev->dev);
388 if (ret) {
389 dev_err(&pdev->dev, "Failed to runtime_get device: %d\n", ret);
390 pm_runtime_put_noidle(&pdev->dev);
391 goto err_ioremap;
392 }
393
394 ret = (dev->of_node) ? of_get_omap_rng_device_details(priv, pdev) :
395 get_omap_rng_device_details(priv);
396 if (ret)
397 goto err_ioremap;
398
399 ret = hwrng_register(&omap_rng_ops);
400 if (ret)
401 goto err_register;
402
403 dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
404 omap_rng_read(priv, RNG_REV_REG));
405
406 return 0;
407
408err_register:
409 priv->base = NULL;
410 pm_runtime_disable(&pdev->dev);
411err_ioremap:
412 dev_err(dev, "initialization failed.\n");
413 return ret;
414}
415
416static int omap_rng_remove(struct platform_device *pdev)
417{
418 struct omap_rng_dev *priv = platform_get_drvdata(pdev);
419
420 hwrng_unregister(&omap_rng_ops);
421
422 priv->pdata->cleanup(priv);
423
424 pm_runtime_put_sync(&pdev->dev);
425 pm_runtime_disable(&pdev->dev);
426
427 return 0;
428}
429
430static int __maybe_unused omap_rng_suspend(struct device *dev)
431{
432 struct omap_rng_dev *priv = dev_get_drvdata(dev);
433
434 priv->pdata->cleanup(priv);
435 pm_runtime_put_sync(dev);
436
437 return 0;
438}
439
440static int __maybe_unused omap_rng_resume(struct device *dev)
441{
442 struct omap_rng_dev *priv = dev_get_drvdata(dev);
443 int ret;
444
445 ret = pm_runtime_get_sync(dev);
446 if (ret) {
447 dev_err(dev, "Failed to runtime_get device: %d\n", ret);
448 pm_runtime_put_noidle(dev);
449 return ret;
450 }
451
452 priv->pdata->init(priv);
453
454 return 0;
455}
456
457static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume);
458
459static struct platform_driver omap_rng_driver = {
460 .driver = {
461 .name = "omap_rng",
462 .pm = &omap_rng_pm,
463 .of_match_table = of_match_ptr(omap_rng_of_match),
464 },
465 .probe = omap_rng_probe,
466 .remove = omap_rng_remove,
467};
468
469module_platform_driver(omap_rng_driver);
470MODULE_ALIAS("platform:omap_rng");
471MODULE_AUTHOR("Deepak Saxena (and others)");
472MODULE_LICENSE("GPL");
473
