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47#ifndef ADF_ACCEL_DEVICES_H_
48#define ADF_ACCEL_DEVICES_H_
49#include <linux/interrupt.h>
50#include <linux/module.h>
51#include <linux/list.h>
52#include <linux/io.h>
53#include <linux/ratelimit.h>
54#include "adf_cfg_common.h"
55
56#define ADF_DH895XCC_DEVICE_NAME "dh895xcc"
57#define ADF_DH895XCCVF_DEVICE_NAME "dh895xccvf"
58#define ADF_C62X_DEVICE_NAME "c6xx"
59#define ADF_C62XVF_DEVICE_NAME "c6xxvf"
60#define ADF_C3XXX_DEVICE_NAME "c3xxx"
61#define ADF_C3XXXVF_DEVICE_NAME "c3xxxvf"
62#define ADF_DH895XCC_PCI_DEVICE_ID 0x435
63#define ADF_DH895XCCIOV_PCI_DEVICE_ID 0x443
64#define ADF_C62X_PCI_DEVICE_ID 0x37c8
65#define ADF_C62XIOV_PCI_DEVICE_ID 0x37c9
66#define ADF_C3XXX_PCI_DEVICE_ID 0x19e2
67#define ADF_C3XXXIOV_PCI_DEVICE_ID 0x19e3
68#define ADF_ERRSOU3 (0x3A000 + 0x0C)
69#define ADF_ERRSOU5 (0x3A000 + 0xD8)
70#define ADF_DEVICE_FUSECTL_OFFSET 0x40
71#define ADF_DEVICE_LEGFUSE_OFFSET 0x4C
72#define ADF_PCI_MAX_BARS 3
73#define ADF_DEVICE_NAME_LENGTH 32
74#define ADF_ETR_MAX_RINGS_PER_BANK 16
75#define ADF_MAX_MSIX_VECTOR_NAME 16
76#define ADF_DEVICE_NAME_PREFIX "qat_"
77
78enum adf_accel_capabilities {
79 ADF_ACCEL_CAPABILITIES_NULL = 0,
80 ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 1,
81 ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 2,
82 ADF_ACCEL_CAPABILITIES_CIPHER = 4,
83 ADF_ACCEL_CAPABILITIES_AUTHENTICATION = 8,
84 ADF_ACCEL_CAPABILITIES_COMPRESSION = 32,
85 ADF_ACCEL_CAPABILITIES_LZS_COMPRESSION = 64,
86 ADF_ACCEL_CAPABILITIES_RANDOM_NUMBER = 128
87};
88
89struct adf_bar {
90 resource_size_t base_addr;
91 void __iomem *virt_addr;
92 resource_size_t size;
93} __packed;
94
95struct adf_accel_msix {
96 struct msix_entry *entries;
97 char **names;
98 u32 num_entries;
99} __packed;
100
101struct adf_accel_pci {
102 struct pci_dev *pci_dev;
103 struct adf_accel_msix msix_entries;
104 struct adf_bar pci_bars[ADF_PCI_MAX_BARS];
105 uint8_t revid;
106 uint8_t sku;
107} __packed;
108
109enum dev_state {
110 DEV_DOWN = 0,
111 DEV_UP
112};
113
114enum dev_sku_info {
115 DEV_SKU_1 = 0,
116 DEV_SKU_2,
117 DEV_SKU_3,
118 DEV_SKU_4,
119 DEV_SKU_VF,
120 DEV_SKU_UNKNOWN,
121};
122
123static inline const char *get_sku_info(enum dev_sku_info info)
124{
125 switch (info) {
126 case DEV_SKU_1:
127 return "SKU1";
128 case DEV_SKU_2:
129 return "SKU2";
130 case DEV_SKU_3:
131 return "SKU3";
132 case DEV_SKU_4:
133 return "SKU4";
134 case DEV_SKU_VF:
135 return "SKUVF";
136 case DEV_SKU_UNKNOWN:
137 default:
138 break;
139 }
140 return "Unknown SKU";
141}
142
143struct adf_hw_device_class {
144 const char *name;
145 const enum adf_device_type type;
146 uint32_t instances;
147} __packed;
148
149struct adf_cfg_device_data;
150struct adf_accel_dev;
151struct adf_etr_data;
152struct adf_etr_ring_data;
153
154struct adf_hw_device_data {
155 struct adf_hw_device_class *dev_class;
156 uint32_t (*get_accel_mask)(uint32_t fuse);
157 uint32_t (*get_ae_mask)(uint32_t fuse);
158 uint32_t (*get_sram_bar_id)(struct adf_hw_device_data *self);
159 uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
160 uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
161 uint32_t (*get_num_aes)(struct adf_hw_device_data *self);
162 uint32_t (*get_num_accels)(struct adf_hw_device_data *self);
163 uint32_t (*get_pf2vf_offset)(uint32_t i);
164 uint32_t (*get_vintmsk_offset)(uint32_t i);
165 enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self);
166 int (*alloc_irq)(struct adf_accel_dev *accel_dev);
167 void (*free_irq)(struct adf_accel_dev *accel_dev);
168 void (*enable_error_correction)(struct adf_accel_dev *accel_dev);
169 int (*init_admin_comms)(struct adf_accel_dev *accel_dev);
170 void (*exit_admin_comms)(struct adf_accel_dev *accel_dev);
171 int (*send_admin_init)(struct adf_accel_dev *accel_dev);
172 int (*init_arb)(struct adf_accel_dev *accel_dev);
173 void (*exit_arb)(struct adf_accel_dev *accel_dev);
174 void (*get_arb_mapping)(struct adf_accel_dev *accel_dev,
175 const uint32_t **cfg);
176 void (*disable_iov)(struct adf_accel_dev *accel_dev);
177 void (*enable_ints)(struct adf_accel_dev *accel_dev);
178 int (*enable_vf2pf_comms)(struct adf_accel_dev *accel_dev);
179 void (*reset_device)(struct adf_accel_dev *accel_dev);
180 const char *fw_name;
181 const char *fw_mmp_name;
182 uint32_t fuses;
183 uint32_t accel_capabilities_mask;
184 uint32_t instance_id;
185 uint16_t accel_mask;
186 uint16_t ae_mask;
187 uint16_t tx_rings_mask;
188 uint8_t tx_rx_gap;
189 uint8_t num_banks;
190 uint8_t num_accel;
191 uint8_t num_logical_accel;
192 uint8_t num_engines;
193 uint8_t min_iov_compat_ver;
194} __packed;
195
196
197#define ADF_CSR_WR(csr_base, csr_offset, val) \
198 __raw_writel(val, csr_base + csr_offset)
199
200
201#define ADF_CSR_RD(csr_base, csr_offset) __raw_readl(csr_base + csr_offset)
202
203#define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev->dev)
204#define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars)
205#define GET_HW_DATA(accel_dev) (accel_dev->hw_device)
206#define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
207#define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
208#define accel_to_pci_dev(accel_ptr) accel_ptr->accel_pci_dev.pci_dev
209
210struct adf_admin_comms;
211struct icp_qat_fw_loader_handle;
212struct adf_fw_loader_data {
213 struct icp_qat_fw_loader_handle *fw_loader;
214 const struct firmware *uof_fw;
215 const struct firmware *mmp_fw;
216};
217
218struct adf_accel_vf_info {
219 struct adf_accel_dev *accel_dev;
220 struct tasklet_struct vf2pf_bh_tasklet;
221 struct mutex pf2vf_lock;
222 struct ratelimit_state vf2pf_ratelimit;
223 u32 vf_nr;
224 bool init;
225};
226
227struct adf_accel_dev {
228 struct adf_etr_data *transport;
229 struct adf_hw_device_data *hw_device;
230 struct adf_cfg_device_data *cfg;
231 struct adf_fw_loader_data *fw_loader;
232 struct adf_admin_comms *admin;
233 struct list_head crypto_list;
234 unsigned long status;
235 atomic_t ref_count;
236 struct dentry *debugfs_dir;
237 struct list_head list;
238 struct module *owner;
239 struct adf_accel_pci accel_pci_dev;
240 union {
241 struct {
242
243 struct adf_accel_vf_info *vf_info;
244 } pf;
245 struct {
246 char *irq_name;
247 struct tasklet_struct pf2vf_bh_tasklet;
248 struct mutex vf2pf_lock;
249 struct completion iov_msg_completion;
250 uint8_t compatible;
251 uint8_t pf_version;
252 } vf;
253 };
254 bool is_vf;
255 u32 accel_id;
256} __packed;
257#endif
258
