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15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/clk.h>
18#include <linux/pm_runtime.h>
19#include <linux/platform_device.h>
20#include <linux/dmaengine.h>
21#include <linux/dma-mapping.h>
22#include <linux/of.h>
23#include <linux/of_dma.h>
24#include <linux/acpi.h>
25#include <linux/acpi_dma.h>
26
27#include "internal.h"
28
29#define DRV_NAME "dw_dmac"
30
31static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
32 struct of_dma *ofdma)
33{
34 struct dw_dma *dw = ofdma->of_dma_data;
35 struct dw_dma_slave slave = {
36 .dma_dev = dw->dma.dev,
37 };
38 dma_cap_mask_t cap;
39
40 if (dma_spec->args_count != 3)
41 return NULL;
42
43 slave.src_id = dma_spec->args[0];
44 slave.dst_id = dma_spec->args[0];
45 slave.m_master = dma_spec->args[1];
46 slave.p_master = dma_spec->args[2];
47
48 if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
49 slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
50 slave.m_master >= dw->pdata->nr_masters ||
51 slave.p_master >= dw->pdata->nr_masters))
52 return NULL;
53
54 dma_cap_zero(cap);
55 dma_cap_set(DMA_SLAVE, cap);
56
57
58 return dma_request_channel(cap, dw_dma_filter, &slave);
59}
60
61#ifdef CONFIG_ACPI
62static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
63{
64 struct acpi_dma_spec *dma_spec = param;
65 struct dw_dma_slave slave = {
66 .dma_dev = dma_spec->dev,
67 .src_id = dma_spec->slave_id,
68 .dst_id = dma_spec->slave_id,
69 .m_master = 0,
70 .p_master = 1,
71 };
72
73 return dw_dma_filter(chan, &slave);
74}
75
76static void dw_dma_acpi_controller_register(struct dw_dma *dw)
77{
78 struct device *dev = dw->dma.dev;
79 struct acpi_dma_filter_info *info;
80 int ret;
81
82 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
83 if (!info)
84 return;
85
86 dma_cap_zero(info->dma_cap);
87 dma_cap_set(DMA_SLAVE, info->dma_cap);
88 info->filter_fn = dw_dma_acpi_filter;
89
90 ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
91 info);
92 if (ret)
93 dev_err(dev, "could not register acpi_dma_controller\n");
94}
95#else
96static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
97#endif
98
99#ifdef CONFIG_OF
100static struct dw_dma_platform_data *
101dw_dma_parse_dt(struct platform_device *pdev)
102{
103 struct device_node *np = pdev->dev.of_node;
104 struct dw_dma_platform_data *pdata;
105 u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];
106 u32 nr_masters;
107 u32 nr_channels;
108
109 if (!np) {
110 dev_err(&pdev->dev, "Missing DT data\n");
111 return NULL;
112 }
113
114 if (of_property_read_u32(np, "dma-masters", &nr_masters))
115 return NULL;
116 if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
117 return NULL;
118
119 if (of_property_read_u32(np, "dma-channels", &nr_channels))
120 return NULL;
121
122 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
123 if (!pdata)
124 return NULL;
125
126 pdata->nr_masters = nr_masters;
127 pdata->nr_channels = nr_channels;
128
129 if (of_property_read_bool(np, "is_private"))
130 pdata->is_private = true;
131
132 if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
133 pdata->chan_allocation_order = (unsigned char)tmp;
134
135 if (!of_property_read_u32(np, "chan_priority", &tmp))
136 pdata->chan_priority = tmp;
137
138 if (!of_property_read_u32(np, "block_size", &tmp))
139 pdata->block_size = tmp;
140
141 if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
142 for (tmp = 0; tmp < nr_masters; tmp++)
143 pdata->data_width[tmp] = arr[tmp];
144 } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
145 for (tmp = 0; tmp < nr_masters; tmp++)
146 pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
147 }
148
149 return pdata;
150}
151#else
152static inline struct dw_dma_platform_data *
153dw_dma_parse_dt(struct platform_device *pdev)
154{
155 return NULL;
156}
157#endif
158
159static int dw_probe(struct platform_device *pdev)
160{
161 struct dw_dma_chip *chip;
162 struct device *dev = &pdev->dev;
163 struct resource *mem;
164 const struct dw_dma_platform_data *pdata;
165 int err;
166
167 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
168 if (!chip)
169 return -ENOMEM;
170
171 chip->irq = platform_get_irq(pdev, 0);
172 if (chip->irq < 0)
173 return chip->irq;
174
175 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
176 chip->regs = devm_ioremap_resource(dev, mem);
177 if (IS_ERR(chip->regs))
178 return PTR_ERR(chip->regs);
179
180 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
181 if (err)
182 return err;
183
184 pdata = dev_get_platdata(dev);
185 if (!pdata)
186 pdata = dw_dma_parse_dt(pdev);
187
188 chip->dev = dev;
189 chip->pdata = pdata;
190
191 chip->clk = devm_clk_get(chip->dev, "hclk");
192 if (IS_ERR(chip->clk))
193 return PTR_ERR(chip->clk);
194 err = clk_prepare_enable(chip->clk);
195 if (err)
196 return err;
197
198 pm_runtime_enable(&pdev->dev);
199
200 err = dw_dma_probe(chip);
201 if (err)
202 goto err_dw_dma_probe;
203
204 platform_set_drvdata(pdev, chip);
205
206 if (pdev->dev.of_node) {
207 err = of_dma_controller_register(pdev->dev.of_node,
208 dw_dma_of_xlate, chip->dw);
209 if (err)
210 dev_err(&pdev->dev,
211 "could not register of_dma_controller\n");
212 }
213
214 if (ACPI_HANDLE(&pdev->dev))
215 dw_dma_acpi_controller_register(chip->dw);
216
217 return 0;
218
219err_dw_dma_probe:
220 pm_runtime_disable(&pdev->dev);
221 clk_disable_unprepare(chip->clk);
222 return err;
223}
224
225static int dw_remove(struct platform_device *pdev)
226{
227 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
228
229 if (pdev->dev.of_node)
230 of_dma_controller_free(pdev->dev.of_node);
231
232 dw_dma_remove(chip);
233 pm_runtime_disable(&pdev->dev);
234 clk_disable_unprepare(chip->clk);
235
236 return 0;
237}
238
239static void dw_shutdown(struct platform_device *pdev)
240{
241 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
242
243
244
245
246
247
248
249
250
251
252 pm_runtime_get_sync(chip->dev);
253 dw_dma_disable(chip);
254 pm_runtime_put_sync_suspend(chip->dev);
255
256 clk_disable_unprepare(chip->clk);
257}
258
259#ifdef CONFIG_OF
260static const struct of_device_id dw_dma_of_id_table[] = {
261 { .compatible = "snps,dma-spear1340" },
262 {}
263};
264MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
265#endif
266
267#ifdef CONFIG_ACPI
268static const struct acpi_device_id dw_dma_acpi_id_table[] = {
269 { "INTL9C60", 0 },
270 { }
271};
272MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
273#endif
274
275#ifdef CONFIG_PM_SLEEP
276
277static int dw_suspend_late(struct device *dev)
278{
279 struct platform_device *pdev = to_platform_device(dev);
280 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
281
282 dw_dma_disable(chip);
283 clk_disable_unprepare(chip->clk);
284
285 return 0;
286}
287
288static int dw_resume_early(struct device *dev)
289{
290 struct platform_device *pdev = to_platform_device(dev);
291 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
292
293 clk_prepare_enable(chip->clk);
294 return dw_dma_enable(chip);
295}
296
297#endif
298
299static const struct dev_pm_ops dw_dev_pm_ops = {
300 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
301};
302
303static struct platform_driver dw_driver = {
304 .probe = dw_probe,
305 .remove = dw_remove,
306 .shutdown = dw_shutdown,
307 .driver = {
308 .name = DRV_NAME,
309 .pm = &dw_dev_pm_ops,
310 .of_match_table = of_match_ptr(dw_dma_of_id_table),
311 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
312 },
313};
314
315static int __init dw_init(void)
316{
317 return platform_driver_register(&dw_driver);
318}
319subsys_initcall(dw_init);
320
321static void __exit dw_exit(void)
322{
323 platform_driver_unregister(&dw_driver);
324}
325module_exit(dw_exit);
326
327MODULE_LICENSE("GPL v2");
328MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
329MODULE_ALIAS("platform:" DRV_NAME);
330
