LXR linux/drivers/firmware/dcdbas.h

   1/*
   2 *  dcdbas.h: Definitions for Dell Systems Management Base driver
   3 *
   4 *  Copyright (C) 1995-2005 Dell Inc.
   5 *
   6 *  This program is free software; you can redistribute it and/or modify
   7 *  it under the terms of the GNU General Public License v2.0 as published by
   8 *  the Free Software Foundation.
   9 *
  10 *  This program is distributed in the hope that it will be useful,
  11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 *  GNU General Public License for more details.
  14 */
  15
  16#ifndef _DCDBAS_H_
  17#define _DCDBAS_H_
  18
  19#include <linux/device.h>
  20#include <linux/sysfs.h>
  21#include <linux/types.h>
  22
  23#define MAX_SMI_DATA_BUF_SIZE                   (256 * 1024)
  24
  25#define HC_ACTION_NONE                          (0)
  26#define HC_ACTION_HOST_CONTROL_POWEROFF         BIT(1)
  27#define HC_ACTION_HOST_CONTROL_POWERCYCLE       BIT(2)
  28
  29#define HC_SMITYPE_NONE                         (0)
  30#define HC_SMITYPE_TYPE1                        (1)
  31#define HC_SMITYPE_TYPE2                        (2)
  32#define HC_SMITYPE_TYPE3                        (3)
  33
  34#define ESM_APM_CMD                             (0x0A0)
  35#define ESM_APM_POWER_CYCLE                     (0x10)
  36#define ESM_STATUS_CMD_UNSUCCESSFUL             (-1)
  37
  38#define CMOS_BASE_PORT                          (0x070)
  39#define CMOS_PAGE1_INDEX_PORT                   (0)
  40#define CMOS_PAGE1_DATA_PORT                    (1)
  41#define CMOS_PAGE2_INDEX_PORT_PIIX4             (2)
  42#define CMOS_PAGE2_DATA_PORT_PIIX4              (3)
  43#define PE1400_APM_CONTROL_PORT                 (0x0B0)
  44#define PCAT_APM_CONTROL_PORT                   (0x0B2)
  45#define PCAT_APM_STATUS_PORT                    (0x0B3)
  46#define PE1300_CMOS_CMD_STRUCT_PTR              (0x38)
  47#define PE1400_CMOS_CMD_STRUCT_PTR              (0x70)
  48
  49#define MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN        (14)
  50#define MAX_SYSMGMT_LONGCMD_SGENTRY_NUM         (16)
  51
  52#define TIMEOUT_USEC_SHORT_SEMA_BLOCKING        (10000)
  53#define EXPIRED_TIMER                           (0)
  54
  55#define SMI_CMD_MAGIC                           (0x534D4931)
  56
  57#define DCDBAS_DEV_ATTR_RW(_name) \
  58        DEVICE_ATTR(_name,0600,_name##_show,_name##_store);
  59
  60#define DCDBAS_DEV_ATTR_RO(_name) \
  61        DEVICE_ATTR(_name,0400,_name##_show,NULL);
  62
  63#define DCDBAS_DEV_ATTR_WO(_name) \
  64        DEVICE_ATTR(_name,0200,NULL,_name##_store);
  65
  66#define DCDBAS_BIN_ATTR_RW(_name) \
  67struct bin_attribute bin_attr_##_name = { \
  68        .attr =  { .name = __stringify(_name), \
  69                   .mode = 0600 }, \
  70        .read =  _name##_read, \
  71        .write = _name##_write, \
  72}
  73
  74struct smi_cmd {
  75        __u32 magic;
  76        __u32 ebx;
  77        __u32 ecx;
  78        __u16 command_address;
  79        __u8 command_code;
  80        __u8 reserved;
  81        __u8 command_buffer[1];
  82} __attribute__ ((packed));
  83
  84struct apm_cmd {
  85        __u8 command;
  86        __s8 status;
  87        __u16 reserved;
  88        union {
  89                struct {
  90                        __u8 parm[MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN];
  91                } __attribute__ ((packed)) shortreq;
  92
  93                struct {
  94                        __u16 num_sg_entries;
  95                        struct {
  96                                __u32 size;
  97                                __u64 addr;
  98                        } __attribute__ ((packed))
  99                            sglist[MAX_SYSMGMT_LONGCMD_SGENTRY_NUM];
 100                } __attribute__ ((packed)) longreq;
 101        } __attribute__ ((packed)) parameters;
 102} __attribute__ ((packed));
 103
 104int dcdbas_smi_request(struct smi_cmd *smi_cmd);
 105
 106#endif /* _DCDBAS_H_ */
 107
 108