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16#include <linux/module.h>
17#include <linux/clk.h>
18#include <linux/component.h>
19#include <drm/drmP.h>
20#include <drm/drm_atomic.h>
21#include <drm/drm_atomic_helper.h>
22#include <drm/drm_fb_helper.h>
23#include <drm/drm_crtc_helper.h>
24#include <drm/drm_of.h>
25#include <drm/drm_panel.h>
26#include <linux/mfd/syscon.h>
27#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
28#include <linux/of_device.h>
29#include <linux/of_graph.h>
30#include <video/of_display_timing.h>
31#include <video/of_videomode.h>
32#include <linux/regmap.h>
33#include <linux/videodev2.h>
34
35#include "imx-drm.h"
36
37#define DRIVER_NAME "imx-ldb"
38
39#define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
40#define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
41#define LDB_CH0_MODE_EN_MASK (3 << 0)
42#define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
43#define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
44#define LDB_CH1_MODE_EN_MASK (3 << 2)
45#define LDB_SPLIT_MODE_EN (1 << 4)
46#define LDB_DATA_WIDTH_CH0_24 (1 << 5)
47#define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
48#define LDB_DATA_WIDTH_CH1_24 (1 << 7)
49#define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
50#define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
51#define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
52#define LDB_BGREF_RMODE_INT (1 << 15)
53
54struct imx_ldb;
55
56struct imx_ldb_channel {
57 struct imx_ldb *ldb;
58 struct drm_connector connector;
59 struct drm_encoder encoder;
60 struct drm_panel *panel;
61 struct device_node *child;
62 struct i2c_adapter *ddc;
63 int chno;
64 void *edid;
65 int edid_len;
66 struct drm_display_mode mode;
67 int mode_valid;
68 u32 bus_format;
69};
70
71static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
72{
73 return container_of(c, struct imx_ldb_channel, connector);
74}
75
76static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
77{
78 return container_of(e, struct imx_ldb_channel, encoder);
79}
80
81struct bus_mux {
82 int reg;
83 int shift;
84 int mask;
85};
86
87struct imx_ldb {
88 struct regmap *regmap;
89 struct device *dev;
90 struct imx_ldb_channel channel[2];
91 struct clk *clk[2];
92 struct clk *clk_sel[4];
93 struct clk *clk_parent[4];
94 struct clk *clk_pll[2];
95 u32 ldb_ctrl;
96 const struct bus_mux *lvds_mux;
97};
98
99static enum drm_connector_status imx_ldb_connector_detect(
100 struct drm_connector *connector, bool force)
101{
102 return connector_status_connected;
103}
104
105static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
106 u32 bus_format)
107{
108 struct imx_ldb *ldb = imx_ldb_ch->ldb;
109 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
110
111 switch (bus_format) {
112 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
113 break;
114 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
115 if (imx_ldb_ch->chno == 0 || dual)
116 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
117 if (imx_ldb_ch->chno == 1 || dual)
118 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
119 break;
120 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
121 if (imx_ldb_ch->chno == 0 || dual)
122 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
123 LDB_BIT_MAP_CH0_JEIDA;
124 if (imx_ldb_ch->chno == 1 || dual)
125 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
126 LDB_BIT_MAP_CH1_JEIDA;
127 break;
128 }
129}
130
131static int imx_ldb_connector_get_modes(struct drm_connector *connector)
132{
133 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
134 int num_modes = 0;
135
136 if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
137 imx_ldb_ch->panel->funcs->get_modes) {
138 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
139 if (num_modes > 0)
140 return num_modes;
141 }
142
143 if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
144 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
145
146 if (imx_ldb_ch->edid) {
147 drm_mode_connector_update_edid_property(connector,
148 imx_ldb_ch->edid);
149 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
150 }
151
152 if (imx_ldb_ch->mode_valid) {
153 struct drm_display_mode *mode;
154
155 mode = drm_mode_create(connector->dev);
156 if (!mode)
157 return -EINVAL;
158 drm_mode_copy(mode, &imx_ldb_ch->mode);
159 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
160 drm_mode_probed_add(connector, mode);
161 num_modes++;
162 }
163
164 return num_modes;
165}
166
167static struct drm_encoder *imx_ldb_connector_best_encoder(
168 struct drm_connector *connector)
169{
170 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
171
172 return &imx_ldb_ch->encoder;
173}
174
175static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
176 unsigned long serial_clk, unsigned long di_clk)
177{
178 int ret;
179
180 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
181 clk_get_rate(ldb->clk_pll[chno]), serial_clk);
182 clk_set_rate(ldb->clk_pll[chno], serial_clk);
183
184 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
185 clk_get_rate(ldb->clk_pll[chno]));
186
187 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
188 clk_get_rate(ldb->clk[chno]),
189 (long int)di_clk);
190 clk_set_rate(ldb->clk[chno], di_clk);
191
192 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
193 clk_get_rate(ldb->clk[chno]));
194
195
196 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
197 if (ret)
198 dev_err(ldb->dev,
199 "unable to set di%d parent clock to ldb_di%d\n", mux,
200 chno);
201}
202
203static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
204{
205 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
206 struct imx_ldb *ldb = imx_ldb_ch->ldb;
207 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
208 int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
209
210 drm_panel_prepare(imx_ldb_ch->panel);
211
212 if (dual) {
213 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
214 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
215
216 clk_prepare_enable(ldb->clk[0]);
217 clk_prepare_enable(ldb->clk[1]);
218 } else {
219 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
220 }
221
222 if (imx_ldb_ch == &ldb->channel[0] || dual) {
223 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
224 if (mux == 0 || ldb->lvds_mux)
225 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
226 else if (mux == 1)
227 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
228 }
229 if (imx_ldb_ch == &ldb->channel[1] || dual) {
230 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
231 if (mux == 1 || ldb->lvds_mux)
232 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
233 else if (mux == 0)
234 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
235 }
236
237 if (ldb->lvds_mux) {
238 const struct bus_mux *lvds_mux = NULL;
239
240 if (imx_ldb_ch == &ldb->channel[0])
241 lvds_mux = &ldb->lvds_mux[0];
242 else if (imx_ldb_ch == &ldb->channel[1])
243 lvds_mux = &ldb->lvds_mux[1];
244
245 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
246 mux << lvds_mux->shift);
247 }
248
249 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
250
251 drm_panel_enable(imx_ldb_ch->panel);
252}
253
254static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
255 struct drm_display_mode *orig_mode,
256 struct drm_display_mode *mode)
257{
258 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
259 struct imx_ldb *ldb = imx_ldb_ch->ldb;
260 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
261 unsigned long serial_clk;
262 unsigned long di_clk = mode->clock * 1000;
263 int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
264 u32 bus_format = imx_ldb_ch->bus_format;
265
266 if (mode->clock > 170000) {
267 dev_warn(ldb->dev,
268 "%s: mode exceeds 170 MHz pixel clock\n", __func__);
269 }
270 if (mode->clock > 85000 && !dual) {
271 dev_warn(ldb->dev,
272 "%s: mode exceeds 85 MHz pixel clock\n", __func__);
273 }
274
275 if (dual) {
276 serial_clk = 3500UL * mode->clock;
277 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
278 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
279 } else {
280 serial_clk = 7000UL * mode->clock;
281 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
282 di_clk);
283 }
284
285
286 if (imx_ldb_ch == &ldb->channel[0] || dual) {
287 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
288 ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
289 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
290 ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
291 }
292 if (imx_ldb_ch == &ldb->channel[1] || dual) {
293 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
294 ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
295 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
296 ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
297 }
298
299 if (!bus_format) {
300 struct drm_connector *connector;
301
302 drm_for_each_connector(connector, encoder->dev) {
303 struct drm_display_info *di = &connector->display_info;
304
305 if (connector->encoder == encoder &&
306 di->num_bus_formats) {
307 bus_format = di->bus_formats[0];
308 break;
309 }
310 }
311 }
312 imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
313}
314
315static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
316{
317 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
318 struct imx_ldb *ldb = imx_ldb_ch->ldb;
319 int mux, ret;
320
321
322
323
324
325
326 if (imx_ldb_ch == &ldb->channel[0] &&
327 (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
328 return;
329 else if (imx_ldb_ch == &ldb->channel[1] &&
330 (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
331 return;
332
333 drm_panel_disable(imx_ldb_ch->panel);
334
335 if (imx_ldb_ch == &ldb->channel[0])
336 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
337 else if (imx_ldb_ch == &ldb->channel[1])
338 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
339
340 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
341
342 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
343 clk_disable_unprepare(ldb->clk[0]);
344 clk_disable_unprepare(ldb->clk[1]);
345 }
346
347 if (ldb->lvds_mux) {
348 const struct bus_mux *lvds_mux = NULL;
349
350 if (imx_ldb_ch == &ldb->channel[0])
351 lvds_mux = &ldb->lvds_mux[0];
352 else if (imx_ldb_ch == &ldb->channel[1])
353 lvds_mux = &ldb->lvds_mux[1];
354
355 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
356 mux &= lvds_mux->mask;
357 mux >>= lvds_mux->shift;
358 } else {
359 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
360 }
361
362
363 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
364 if (ret)
365 dev_err(ldb->dev,
366 "unable to set di%d parent clock to original parent\n",
367 mux);
368
369 drm_panel_unprepare(imx_ldb_ch->panel);
370}
371
372static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
373 struct drm_crtc_state *crtc_state,
374 struct drm_connector_state *conn_state)
375{
376 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
377 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
378 struct drm_display_info *di = &conn_state->connector->display_info;
379 u32 bus_format = imx_ldb_ch->bus_format;
380
381
382 if (!bus_format && di->num_bus_formats)
383 bus_format = di->bus_formats[0];
384 switch (bus_format) {
385 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
386 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
387 break;
388 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
389 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
390 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
391 break;
392 default:
393 return -EINVAL;
394 }
395
396 imx_crtc_state->di_hsync_pin = 2;
397 imx_crtc_state->di_vsync_pin = 3;
398
399 return 0;
400}
401
402
403static const struct drm_connector_funcs imx_ldb_connector_funcs = {
404 .dpms = drm_atomic_helper_connector_dpms,
405 .fill_modes = drm_helper_probe_single_connector_modes,
406 .detect = imx_ldb_connector_detect,
407 .destroy = imx_drm_connector_destroy,
408 .reset = drm_atomic_helper_connector_reset,
409 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
410 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
411};
412
413static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
414 .get_modes = imx_ldb_connector_get_modes,
415 .best_encoder = imx_ldb_connector_best_encoder,
416};
417
418static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
419 .destroy = imx_drm_encoder_destroy,
420};
421
422static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
423 .mode_set = imx_ldb_encoder_mode_set,
424 .enable = imx_ldb_encoder_enable,
425 .disable = imx_ldb_encoder_disable,
426 .atomic_check = imx_ldb_encoder_atomic_check,
427};
428
429static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
430{
431 char clkname[16];
432
433 snprintf(clkname, sizeof(clkname), "di%d", chno);
434 ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
435 if (IS_ERR(ldb->clk[chno]))
436 return PTR_ERR(ldb->clk[chno]);
437
438 snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
439 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
440
441 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
442}
443
444static int imx_ldb_register(struct drm_device *drm,
445 struct imx_ldb_channel *imx_ldb_ch)
446{
447 struct imx_ldb *ldb = imx_ldb_ch->ldb;
448 struct drm_encoder *encoder = &imx_ldb_ch->encoder;
449 int ret;
450
451 ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
452 if (ret)
453 return ret;
454
455 ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
456 if (ret)
457 return ret;
458
459 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
460 ret = imx_ldb_get_clk(ldb, 1);
461 if (ret)
462 return ret;
463 }
464
465 drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
466 drm_encoder_init(drm, encoder, &imx_ldb_encoder_funcs,
467 DRM_MODE_ENCODER_LVDS, NULL);
468
469 drm_connector_helper_add(&imx_ldb_ch->connector,
470 &imx_ldb_connector_helper_funcs);
471 drm_connector_init(drm, &imx_ldb_ch->connector,
472 &imx_ldb_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
473
474 if (imx_ldb_ch->panel) {
475 ret = drm_panel_attach(imx_ldb_ch->panel,
476 &imx_ldb_ch->connector);
477 if (ret)
478 return ret;
479 }
480
481 drm_mode_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
482
483 return 0;
484}
485
486enum {
487 LVDS_BIT_MAP_SPWG,
488 LVDS_BIT_MAP_JEIDA
489};
490
491struct imx_ldb_bit_mapping {
492 u32 bus_format;
493 u32 datawidth;
494 const char * const mapping;
495};
496
497static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
498 { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, 18, "spwg" },
499 { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, 24, "spwg" },
500 { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
501};
502
503static u32 of_get_bus_format(struct device *dev, struct device_node *np)
504{
505 const char *bm;
506 u32 datawidth = 0;
507 int ret, i;
508
509 ret = of_property_read_string(np, "fsl,data-mapping", &bm);
510 if (ret < 0)
511 return ret;
512
513 of_property_read_u32(np, "fsl,data-width", &datawidth);
514
515 for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
516 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
517 datawidth == imx_ldb_bit_mappings[i].datawidth)
518 return imx_ldb_bit_mappings[i].bus_format;
519 }
520
521 dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
522
523 return -ENOENT;
524}
525
526static struct bus_mux imx6q_lvds_mux[2] = {
527 {
528 .reg = IOMUXC_GPR3,
529 .shift = 6,
530 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
531 }, {
532 .reg = IOMUXC_GPR3,
533 .shift = 8,
534 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
535 }
536};
537
538
539
540
541
542
543
544static const struct of_device_id imx_ldb_dt_ids[] = {
545 { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
546 { .compatible = "fsl,imx53-ldb", .data = NULL, },
547 { }
548};
549MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
550
551static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
552{
553 struct drm_device *drm = data;
554 struct device_node *np = dev->of_node;
555 const struct of_device_id *of_id =
556 of_match_device(imx_ldb_dt_ids, dev);
557 struct device_node *child;
558 const u8 *edidp;
559 struct imx_ldb *imx_ldb;
560 int dual;
561 int ret;
562 int i;
563
564 imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
565 if (!imx_ldb)
566 return -ENOMEM;
567
568 imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
569 if (IS_ERR(imx_ldb->regmap)) {
570 dev_err(dev, "failed to get parent regmap\n");
571 return PTR_ERR(imx_ldb->regmap);
572 }
573
574 imx_ldb->dev = dev;
575
576 if (of_id)
577 imx_ldb->lvds_mux = of_id->data;
578
579 dual = of_property_read_bool(np, "fsl,dual-channel");
580 if (dual)
581 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
582
583
584
585
586
587
588
589
590 for (i = 0; i < 4; i++) {
591 char clkname[16];
592
593 sprintf(clkname, "di%d_sel", i);
594 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
595 if (IS_ERR(imx_ldb->clk_sel[i])) {
596 ret = PTR_ERR(imx_ldb->clk_sel[i]);
597 imx_ldb->clk_sel[i] = NULL;
598 break;
599 }
600
601 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
602 }
603 if (i == 0)
604 return ret;
605
606 for_each_child_of_node(np, child) {
607 struct imx_ldb_channel *channel;
608 struct device_node *ddc_node;
609 struct device_node *ep;
610 int bus_format;
611
612 ret = of_property_read_u32(child, "reg", &i);
613 if (ret || i < 0 || i > 1)
614 return -EINVAL;
615
616 if (dual && i > 0) {
617 dev_warn(dev, "dual-channel mode, ignoring second output\n");
618 continue;
619 }
620
621 if (!of_device_is_available(child))
622 continue;
623
624 channel = &imx_ldb->channel[i];
625 channel->ldb = imx_ldb;
626 channel->chno = i;
627 channel->child = child;
628
629
630
631
632
633 ep = of_graph_get_endpoint_by_regs(child,
634 imx_ldb->lvds_mux ? 4 : 2,
635 -1);
636 if (ep) {
637 struct device_node *remote;
638
639 remote = of_graph_get_remote_port_parent(ep);
640 of_node_put(ep);
641 if (remote)
642 channel->panel = of_drm_find_panel(remote);
643 else
644 return -EPROBE_DEFER;
645 of_node_put(remote);
646 if (!channel->panel) {
647 dev_err(dev, "panel not found: %s\n",
648 remote->full_name);
649 return -EPROBE_DEFER;
650 }
651 }
652
653 ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
654 if (ddc_node) {
655 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
656 of_node_put(ddc_node);
657 if (!channel->ddc) {
658 dev_warn(dev, "failed to get ddc i2c adapter\n");
659 return -EPROBE_DEFER;
660 }
661 }
662
663 if (!channel->ddc) {
664
665 dev_dbg(dev, "no ddc available\n");
666
667 edidp = of_get_property(child, "edid",
668 &channel->edid_len);
669 if (edidp) {
670 channel->edid = kmemdup(edidp,
671 channel->edid_len,
672 GFP_KERNEL);
673 } else if (!channel->panel) {
674
675 ret = of_get_drm_display_mode(child,
676 &channel->mode,
677 OF_USE_NATIVE_MODE);
678 if (!ret)
679 channel->mode_valid = 1;
680 }
681 }
682
683 bus_format = of_get_bus_format(dev, child);
684 if (bus_format == -EINVAL) {
685
686
687
688
689 if (channel->panel && channel->panel->funcs &&
690 channel->panel->funcs->get_modes)
691 bus_format = 0;
692 }
693 if (bus_format < 0) {
694 dev_err(dev, "could not determine data mapping: %d\n",
695 bus_format);
696 return bus_format;
697 }
698 channel->bus_format = bus_format;
699
700 ret = imx_ldb_register(drm, channel);
701 if (ret)
702 return ret;
703 }
704
705 dev_set_drvdata(dev, imx_ldb);
706
707 return 0;
708}
709
710static void imx_ldb_unbind(struct device *dev, struct device *master,
711 void *data)
712{
713 struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
714 int i;
715
716 for (i = 0; i < 2; i++) {
717 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
718
719 if (!channel->connector.funcs)
720 continue;
721
722 channel->connector.funcs->destroy(&channel->connector);
723 channel->encoder.funcs->destroy(&channel->encoder);
724
725 kfree(channel->edid);
726 i2c_put_adapter(channel->ddc);
727 }
728}
729
730static const struct component_ops imx_ldb_ops = {
731 .bind = imx_ldb_bind,
732 .unbind = imx_ldb_unbind,
733};
734
735static int imx_ldb_probe(struct platform_device *pdev)
736{
737 return component_add(&pdev->dev, &imx_ldb_ops);
738}
739
740static int imx_ldb_remove(struct platform_device *pdev)
741{
742 component_del(&pdev->dev, &imx_ldb_ops);
743 return 0;
744}
745
746static struct platform_driver imx_ldb_driver = {
747 .probe = imx_ldb_probe,
748 .remove = imx_ldb_remove,
749 .driver = {
750 .of_match_table = imx_ldb_dt_ids,
751 .name = DRIVER_NAME,
752 },
753};
754
755module_platform_driver(imx_ldb_driver);
756
757MODULE_DESCRIPTION("i.MX LVDS driver");
758MODULE_AUTHOR("Sascha Hauer, Pengutronix");
759MODULE_LICENSE("GPL");
760MODULE_ALIAS("platform:" DRIVER_NAME);
761
