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14#include <linux/module.h>
15#include <linux/i2c.h>
16#include <linux/acpi.h>
17#include <linux/interrupt.h>
18#include <linux/pm.h>
19#include <linux/pm_runtime.h>
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
22#include <linux/iio/events.h>
23#include <linux/iio/trigger.h>
24#include <linux/iio/buffer.h>
25#include <linux/iio/triggered_buffer.h>
26#include <linux/iio/trigger_consumer.h>
27
28#define KMX61_DRV_NAME "kmx61"
29#define KMX61_IRQ_NAME "kmx61_event"
30
31#define KMX61_REG_WHO_AM_I 0x00
32#define KMX61_REG_INS1 0x01
33#define KMX61_REG_INS2 0x02
34
35
36
37
38
39
40
41#define KMX61_ACC_XOUT_L 0x0A
42#define KMX61_ACC_XOUT_H 0x0B
43#define KMX61_ACC_YOUT_L 0x0C
44#define KMX61_ACC_YOUT_H 0x0D
45#define KMX61_ACC_ZOUT_L 0x0E
46#define KMX61_ACC_ZOUT_H 0x0F
47
48
49
50
51#define KMX61_TEMP_L 0x10
52#define KMX61_TEMP_H 0x11
53
54
55
56
57#define KMX61_MAG_XOUT_L 0x12
58#define KMX61_MAG_XOUT_H 0x13
59#define KMX61_MAG_YOUT_L 0x14
60#define KMX61_MAG_YOUT_H 0x15
61#define KMX61_MAG_ZOUT_L 0x16
62#define KMX61_MAG_ZOUT_H 0x17
63
64#define KMX61_REG_INL 0x28
65#define KMX61_REG_STBY 0x29
66#define KMX61_REG_CTRL1 0x2A
67#define KMX61_REG_CTRL2 0x2B
68#define KMX61_REG_ODCNTL 0x2C
69#define KMX61_REG_INC1 0x2D
70
71#define KMX61_REG_WUF_THRESH 0x3D
72#define KMX61_REG_WUF_TIMER 0x3E
73
74#define KMX61_ACC_STBY_BIT BIT(0)
75#define KMX61_MAG_STBY_BIT BIT(1)
76#define KMX61_ACT_STBY_BIT BIT(7)
77
78#define KMX61_ALL_STBY (KMX61_ACC_STBY_BIT | KMX61_MAG_STBY_BIT)
79
80#define KMX61_REG_INS1_BIT_WUFS BIT(1)
81
82#define KMX61_REG_INS2_BIT_ZP BIT(0)
83#define KMX61_REG_INS2_BIT_ZN BIT(1)
84#define KMX61_REG_INS2_BIT_YP BIT(2)
85#define KMX61_REG_INS2_BIT_YN BIT(3)
86#define KMX61_REG_INS2_BIT_XP BIT(4)
87#define KMX61_REG_INS2_BIT_XN BIT(5)
88
89#define KMX61_REG_CTRL1_GSEL_MASK 0x03
90
91#define KMX61_REG_CTRL1_BIT_RES BIT(4)
92#define KMX61_REG_CTRL1_BIT_DRDYE BIT(5)
93#define KMX61_REG_CTRL1_BIT_WUFE BIT(6)
94#define KMX61_REG_CTRL1_BIT_BTSE BIT(7)
95
96#define KMX61_REG_INC1_BIT_WUFS BIT(0)
97#define KMX61_REG_INC1_BIT_DRDYM BIT(1)
98#define KMX61_REG_INC1_BIT_DRDYA BIT(2)
99#define KMX61_REG_INC1_BIT_IEN BIT(5)
100
101#define KMX61_ACC_ODR_SHIFT 0
102#define KMX61_MAG_ODR_SHIFT 4
103#define KMX61_ACC_ODR_MASK 0x0F
104#define KMX61_MAG_ODR_MASK 0xF0
105
106#define KMX61_OWUF_MASK 0x7
107
108#define KMX61_DEFAULT_WAKE_THRESH 1
109#define KMX61_DEFAULT_WAKE_DURATION 1
110
111#define KMX61_SLEEP_DELAY_MS 2000
112
113#define KMX61_CHIP_ID 0x12
114
115
116#define KMX61_ACC 0x01
117#define KMX61_MAG 0x02
118
119struct kmx61_data {
120 struct i2c_client *client;
121
122
123 struct mutex lock;
124
125
126 bool acc_stby;
127 bool mag_stby;
128
129
130 bool acc_ps;
131 bool mag_ps;
132
133
134 u8 range;
135 u8 odr_bits;
136 u8 wake_thresh;
137 u8 wake_duration;
138
139
140 struct iio_dev *acc_indio_dev;
141 struct iio_trigger *acc_dready_trig;
142 struct iio_trigger *motion_trig;
143 bool acc_dready_trig_on;
144 bool motion_trig_on;
145 bool ev_enable_state;
146
147
148 struct iio_dev *mag_indio_dev;
149 struct iio_trigger *mag_dready_trig;
150 bool mag_dready_trig_on;
151};
152
153enum kmx61_range {
154 KMX61_RANGE_2G,
155 KMX61_RANGE_4G,
156 KMX61_RANGE_8G,
157};
158
159enum kmx61_axis {
160 KMX61_AXIS_X,
161 KMX61_AXIS_Y,
162 KMX61_AXIS_Z,
163};
164
165static const u16 kmx61_uscale_table[] = {9582, 19163, 38326};
166
167static const struct {
168 int val;
169 int val2;
170} kmx61_samp_freq_table[] = { {12, 500000},
171 {25, 0},
172 {50, 0},
173 {100, 0},
174 {200, 0},
175 {400, 0},
176 {800, 0},
177 {1600, 0},
178 {0, 781000},
179 {1, 563000},
180 {3, 125000},
181 {6, 250000} };
182
183static const struct {
184 int val;
185 int val2;
186 int odr_bits;
187} kmx61_wake_up_odr_table[] = { {0, 781000, 0x00},
188 {1, 563000, 0x01},
189 {3, 125000, 0x02},
190 {6, 250000, 0x03},
191 {12, 500000, 0x04},
192 {25, 0, 0x05},
193 {50, 0, 0x06},
194 {100, 0, 0x06},
195 {200, 0, 0x06},
196 {400, 0, 0x06},
197 {800, 0, 0x06},
198 {1600, 0, 0x06} };
199
200static IIO_CONST_ATTR(accel_scale_available, "0.009582 0.019163 0.038326");
201static IIO_CONST_ATTR(magn_scale_available, "0.001465");
202static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
203 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800");
204
205static struct attribute *kmx61_acc_attributes[] = {
206 &iio_const_attr_accel_scale_available.dev_attr.attr,
207 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
208 NULL,
209};
210
211static struct attribute *kmx61_mag_attributes[] = {
212 &iio_const_attr_magn_scale_available.dev_attr.attr,
213 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
214 NULL,
215};
216
217static const struct attribute_group kmx61_acc_attribute_group = {
218 .attrs = kmx61_acc_attributes,
219};
220
221static const struct attribute_group kmx61_mag_attribute_group = {
222 .attrs = kmx61_mag_attributes,
223};
224
225static const struct iio_event_spec kmx61_event = {
226 .type = IIO_EV_TYPE_THRESH,
227 .dir = IIO_EV_DIR_EITHER,
228 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
229 BIT(IIO_EV_INFO_ENABLE) |
230 BIT(IIO_EV_INFO_PERIOD),
231};
232
233#define KMX61_ACC_CHAN(_axis) { \
234 .type = IIO_ACCEL, \
235 .modified = 1, \
236 .channel2 = IIO_MOD_ ## _axis, \
237 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
238 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
239 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
240 .address = KMX61_ACC, \
241 .scan_index = KMX61_AXIS_ ## _axis, \
242 .scan_type = { \
243 .sign = 's', \
244 .realbits = 12, \
245 .storagebits = 16, \
246 .shift = 4, \
247 .endianness = IIO_LE, \
248 }, \
249 .event_spec = &kmx61_event, \
250 .num_event_specs = 1 \
251}
252
253#define KMX61_MAG_CHAN(_axis) { \
254 .type = IIO_MAGN, \
255 .modified = 1, \
256 .channel2 = IIO_MOD_ ## _axis, \
257 .address = KMX61_MAG, \
258 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
259 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
260 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
261 .scan_index = KMX61_AXIS_ ## _axis, \
262 .scan_type = { \
263 .sign = 's', \
264 .realbits = 14, \
265 .storagebits = 16, \
266 .shift = 2, \
267 .endianness = IIO_LE, \
268 }, \
269}
270
271static const struct iio_chan_spec kmx61_acc_channels[] = {
272 KMX61_ACC_CHAN(X),
273 KMX61_ACC_CHAN(Y),
274 KMX61_ACC_CHAN(Z),
275};
276
277static const struct iio_chan_spec kmx61_mag_channels[] = {
278 KMX61_MAG_CHAN(X),
279 KMX61_MAG_CHAN(Y),
280 KMX61_MAG_CHAN(Z),
281};
282
283static void kmx61_set_data(struct iio_dev *indio_dev, struct kmx61_data *data)
284{
285 struct kmx61_data **priv = iio_priv(indio_dev);
286
287 *priv = data;
288}
289
290static struct kmx61_data *kmx61_get_data(struct iio_dev *indio_dev)
291{
292 return *(struct kmx61_data **)iio_priv(indio_dev);
293}
294
295static int kmx61_convert_freq_to_bit(int val, int val2)
296{
297 int i;
298
299 for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
300 if (val == kmx61_samp_freq_table[i].val &&
301 val2 == kmx61_samp_freq_table[i].val2)
302 return i;
303 return -EINVAL;
304}
305
306static int kmx61_convert_wake_up_odr_to_bit(int val, int val2)
307{
308 int i;
309
310 for (i = 0; i < ARRAY_SIZE(kmx61_wake_up_odr_table); ++i)
311 if (kmx61_wake_up_odr_table[i].val == val &&
312 kmx61_wake_up_odr_table[i].val2 == val2)
313 return kmx61_wake_up_odr_table[i].odr_bits;
314 return -EINVAL;
315}
316
317
318
319
320
321
322
323
324
325
326
327
328
329static int kmx61_set_mode(struct kmx61_data *data, u8 mode, u8 device,
330 bool update)
331{
332 int ret;
333 int acc_stby = -1, mag_stby = -1;
334
335 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
336 if (ret < 0) {
337 dev_err(&data->client->dev, "Error reading reg_stby\n");
338 return ret;
339 }
340 if (device & KMX61_ACC) {
341 if (mode & KMX61_ACC_STBY_BIT) {
342 ret |= KMX61_ACC_STBY_BIT;
343 acc_stby = 1;
344 } else {
345 ret &= ~KMX61_ACC_STBY_BIT;
346 acc_stby = 0;
347 }
348 }
349
350 if (device & KMX61_MAG) {
351 if (mode & KMX61_MAG_STBY_BIT) {
352 ret |= KMX61_MAG_STBY_BIT;
353 mag_stby = 1;
354 } else {
355 ret &= ~KMX61_MAG_STBY_BIT;
356 mag_stby = 0;
357 }
358 }
359
360 if (mode & KMX61_ACT_STBY_BIT)
361 ret |= KMX61_ACT_STBY_BIT;
362
363 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_STBY, ret);
364 if (ret < 0) {
365 dev_err(&data->client->dev, "Error writing reg_stby\n");
366 return ret;
367 }
368
369 if (acc_stby != -1 && update)
370 data->acc_stby = acc_stby;
371 if (mag_stby != -1 && update)
372 data->mag_stby = mag_stby;
373
374 return 0;
375}
376
377static int kmx61_get_mode(struct kmx61_data *data, u8 *mode, u8 device)
378{
379 int ret;
380
381 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
382 if (ret < 0) {
383 dev_err(&data->client->dev, "Error reading reg_stby\n");
384 return ret;
385 }
386 *mode = 0;
387
388 if (device & KMX61_ACC) {
389 if (ret & KMX61_ACC_STBY_BIT)
390 *mode |= KMX61_ACC_STBY_BIT;
391 else
392 *mode &= ~KMX61_ACC_STBY_BIT;
393 }
394
395 if (device & KMX61_MAG) {
396 if (ret & KMX61_MAG_STBY_BIT)
397 *mode |= KMX61_MAG_STBY_BIT;
398 else
399 *mode &= ~KMX61_MAG_STBY_BIT;
400 }
401
402 return 0;
403}
404
405static int kmx61_set_wake_up_odr(struct kmx61_data *data, int val, int val2)
406{
407 int ret, odr_bits;
408
409 odr_bits = kmx61_convert_wake_up_odr_to_bit(val, val2);
410 if (odr_bits < 0)
411 return odr_bits;
412
413 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL2,
414 odr_bits);
415 if (ret < 0)
416 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
417 return ret;
418}
419
420static int kmx61_set_odr(struct kmx61_data *data, int val, int val2, u8 device)
421{
422 int ret;
423 u8 mode;
424 int lodr_bits, odr_bits;
425
426 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
427 if (ret < 0)
428 return ret;
429
430 lodr_bits = kmx61_convert_freq_to_bit(val, val2);
431 if (lodr_bits < 0)
432 return lodr_bits;
433
434
435 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
436 true);
437 if (ret < 0)
438 return ret;
439
440 odr_bits = 0;
441 if (device & KMX61_ACC)
442 odr_bits |= lodr_bits << KMX61_ACC_ODR_SHIFT;
443 if (device & KMX61_MAG)
444 odr_bits |= lodr_bits << KMX61_MAG_ODR_SHIFT;
445
446 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_ODCNTL,
447 odr_bits);
448 if (ret < 0)
449 return ret;
450
451 data->odr_bits = odr_bits;
452
453 if (device & KMX61_ACC) {
454 ret = kmx61_set_wake_up_odr(data, val, val2);
455 if (ret)
456 return ret;
457 }
458
459 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
460}
461
462static int kmx61_get_odr(struct kmx61_data *data, int *val, int *val2,
463 u8 device)
464{
465 u8 lodr_bits;
466
467 if (device & KMX61_ACC)
468 lodr_bits = (data->odr_bits >> KMX61_ACC_ODR_SHIFT) &
469 KMX61_ACC_ODR_MASK;
470 else if (device & KMX61_MAG)
471 lodr_bits = (data->odr_bits >> KMX61_MAG_ODR_SHIFT) &
472 KMX61_MAG_ODR_MASK;
473 else
474 return -EINVAL;
475
476 if (lodr_bits >= ARRAY_SIZE(kmx61_samp_freq_table))
477 return -EINVAL;
478
479 *val = kmx61_samp_freq_table[lodr_bits].val;
480 *val2 = kmx61_samp_freq_table[lodr_bits].val2;
481
482 return 0;
483}
484
485static int kmx61_set_range(struct kmx61_data *data, u8 range)
486{
487 int ret;
488
489 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
490 if (ret < 0) {
491 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
492 return ret;
493 }
494
495 ret &= ~KMX61_REG_CTRL1_GSEL_MASK;
496 ret |= range & KMX61_REG_CTRL1_GSEL_MASK;
497
498 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
499 if (ret < 0) {
500 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
501 return ret;
502 }
503
504 data->range = range;
505
506 return 0;
507}
508
509static int kmx61_set_scale(struct kmx61_data *data, u16 uscale)
510{
511 int ret, i;
512 u8 mode;
513
514 for (i = 0; i < ARRAY_SIZE(kmx61_uscale_table); i++) {
515 if (kmx61_uscale_table[i] == uscale) {
516 ret = kmx61_get_mode(data, &mode,
517 KMX61_ACC | KMX61_MAG);
518 if (ret < 0)
519 return ret;
520
521 ret = kmx61_set_mode(data, KMX61_ALL_STBY,
522 KMX61_ACC | KMX61_MAG, true);
523 if (ret < 0)
524 return ret;
525
526 ret = kmx61_set_range(data, i);
527 if (ret < 0)
528 return ret;
529
530 return kmx61_set_mode(data, mode,
531 KMX61_ACC | KMX61_MAG, true);
532 }
533 }
534 return -EINVAL;
535}
536
537static int kmx61_chip_init(struct kmx61_data *data)
538{
539 int ret, val, val2;
540
541 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_WHO_AM_I);
542 if (ret < 0) {
543 dev_err(&data->client->dev, "Error reading who_am_i\n");
544 return ret;
545 }
546
547 if (ret != KMX61_CHIP_ID) {
548 dev_err(&data->client->dev,
549 "Wrong chip id, got %x expected %x\n",
550 ret, KMX61_CHIP_ID);
551 return -EINVAL;
552 }
553
554
555 ret = kmx61_set_range(data, KMX61_RANGE_4G);
556 if (ret < 0)
557 return ret;
558
559 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_ODCNTL);
560 if (ret < 0) {
561 dev_err(&data->client->dev, "Error reading reg_odcntl\n");
562 return ret;
563 }
564 data->odr_bits = ret;
565
566
567
568
569
570 ret = kmx61_get_odr(data, &val, &val2, KMX61_ACC);
571 if (ret < 0)
572 return ret;
573
574 ret = kmx61_set_wake_up_odr(data, val, val2);
575 if (ret < 0)
576 return ret;
577
578
579 ret = kmx61_set_mode(data, 0, KMX61_ACC | KMX61_MAG, true);
580 if (ret < 0)
581 return ret;
582
583 data->wake_thresh = KMX61_DEFAULT_WAKE_THRESH;
584 data->wake_duration = KMX61_DEFAULT_WAKE_DURATION;
585
586 return 0;
587}
588
589static int kmx61_setup_new_data_interrupt(struct kmx61_data *data,
590 bool status, u8 device)
591{
592 u8 mode;
593 int ret;
594
595 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
596 if (ret < 0)
597 return ret;
598
599 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
600 if (ret < 0)
601 return ret;
602
603 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
604 if (ret < 0) {
605 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
606 return ret;
607 }
608
609 if (status) {
610 ret |= KMX61_REG_INC1_BIT_IEN;
611 if (device & KMX61_ACC)
612 ret |= KMX61_REG_INC1_BIT_DRDYA;
613 if (device & KMX61_MAG)
614 ret |= KMX61_REG_INC1_BIT_DRDYM;
615 } else {
616 ret &= ~KMX61_REG_INC1_BIT_IEN;
617 if (device & KMX61_ACC)
618 ret &= ~KMX61_REG_INC1_BIT_DRDYA;
619 if (device & KMX61_MAG)
620 ret &= ~KMX61_REG_INC1_BIT_DRDYM;
621 }
622 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
623 if (ret < 0) {
624 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
625 return ret;
626 }
627
628 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
629 if (ret < 0) {
630 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
631 return ret;
632 }
633
634 if (status)
635 ret |= KMX61_REG_CTRL1_BIT_DRDYE;
636 else
637 ret &= ~KMX61_REG_CTRL1_BIT_DRDYE;
638
639 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
640 if (ret < 0) {
641 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
642 return ret;
643 }
644
645 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
646}
647
648static int kmx61_chip_update_thresholds(struct kmx61_data *data)
649{
650 int ret;
651
652 ret = i2c_smbus_write_byte_data(data->client,
653 KMX61_REG_WUF_TIMER,
654 data->wake_duration);
655 if (ret < 0) {
656 dev_err(&data->client->dev, "Errow writing reg_wuf_timer\n");
657 return ret;
658 }
659
660 ret = i2c_smbus_write_byte_data(data->client,
661 KMX61_REG_WUF_THRESH,
662 data->wake_thresh);
663 if (ret < 0)
664 dev_err(&data->client->dev, "Error writing reg_wuf_thresh\n");
665
666 return ret;
667}
668
669static int kmx61_setup_any_motion_interrupt(struct kmx61_data *data,
670 bool status)
671{
672 u8 mode;
673 int ret;
674
675 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
676 if (ret < 0)
677 return ret;
678
679 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
680 if (ret < 0)
681 return ret;
682
683 ret = kmx61_chip_update_thresholds(data);
684 if (ret < 0)
685 return ret;
686
687 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
688 if (ret < 0) {
689 dev_err(&data->client->dev, "Error reading reg_inc1\n");
690 return ret;
691 }
692 if (status)
693 ret |= (KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
694 else
695 ret &= ~(KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
696
697 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
698 if (ret < 0) {
699 dev_err(&data->client->dev, "Error writing reg_inc1\n");
700 return ret;
701 }
702
703 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
704 if (ret < 0) {
705 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
706 return ret;
707 }
708
709 if (status)
710 ret |= KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE;
711 else
712 ret &= ~(KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE);
713
714 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
715 if (ret < 0) {
716 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
717 return ret;
718 }
719 mode |= KMX61_ACT_STBY_BIT;
720 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
721}
722
723
724
725
726
727
728
729
730
731
732
733
734static int kmx61_set_power_state(struct kmx61_data *data, bool on, u8 device)
735{
736#ifdef CONFIG_PM
737 int ret;
738
739 if (device & KMX61_ACC) {
740 if (on && !data->acc_ps && !data->mag_stby) {
741 ret = kmx61_set_mode(data, 0, KMX61_ACC, true);
742 if (ret < 0)
743 return ret;
744 }
745 data->acc_ps = on;
746 }
747 if (device & KMX61_MAG) {
748 if (on && !data->mag_ps && !data->acc_stby) {
749 ret = kmx61_set_mode(data, 0, KMX61_MAG, true);
750 if (ret < 0)
751 return ret;
752 }
753 data->mag_ps = on;
754 }
755
756 if (on) {
757 ret = pm_runtime_get_sync(&data->client->dev);
758 } else {
759 pm_runtime_mark_last_busy(&data->client->dev);
760 ret = pm_runtime_put_autosuspend(&data->client->dev);
761 }
762 if (ret < 0) {
763 dev_err(&data->client->dev,
764 "Failed: kmx61_set_power_state for %d, ret %d\n",
765 on, ret);
766 if (on)
767 pm_runtime_put_noidle(&data->client->dev);
768
769 return ret;
770 }
771#endif
772 return 0;
773}
774
775static int kmx61_read_measurement(struct kmx61_data *data, u8 base, u8 offset)
776{
777 int ret;
778 u8 reg = base + offset * 2;
779
780 ret = i2c_smbus_read_word_data(data->client, reg);
781 if (ret < 0)
782 dev_err(&data->client->dev, "failed to read reg at %x\n", reg);
783
784 return ret;
785}
786
787static int kmx61_read_raw(struct iio_dev *indio_dev,
788 struct iio_chan_spec const *chan, int *val,
789 int *val2, long mask)
790{
791 int ret;
792 u8 base_reg;
793 struct kmx61_data *data = kmx61_get_data(indio_dev);
794
795 switch (mask) {
796 case IIO_CHAN_INFO_RAW:
797 switch (chan->type) {
798 case IIO_ACCEL:
799 base_reg = KMX61_ACC_XOUT_L;
800 break;
801 case IIO_MAGN:
802 base_reg = KMX61_MAG_XOUT_L;
803 break;
804 default:
805 return -EINVAL;
806 }
807 mutex_lock(&data->lock);
808
809 ret = kmx61_set_power_state(data, true, chan->address);
810 if (ret) {
811 mutex_unlock(&data->lock);
812 return ret;
813 }
814
815 ret = kmx61_read_measurement(data, base_reg, chan->scan_index);
816 if (ret < 0) {
817 kmx61_set_power_state(data, false, chan->address);
818 mutex_unlock(&data->lock);
819 return ret;
820 }
821 *val = sign_extend32(ret >> chan->scan_type.shift,
822 chan->scan_type.realbits - 1);
823 ret = kmx61_set_power_state(data, false, chan->address);
824
825 mutex_unlock(&data->lock);
826 if (ret)
827 return ret;
828 return IIO_VAL_INT;
829 case IIO_CHAN_INFO_SCALE:
830 switch (chan->type) {
831 case IIO_ACCEL:
832 *val = 0;
833 *val2 = kmx61_uscale_table[data->range];
834 return IIO_VAL_INT_PLUS_MICRO;
835 case IIO_MAGN:
836
837 *val = 0;
838 *val2 = 1465;
839 return IIO_VAL_INT_PLUS_MICRO;
840 default:
841 return -EINVAL;
842 }
843 case IIO_CHAN_INFO_SAMP_FREQ:
844 if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
845 return -EINVAL;
846
847 mutex_lock(&data->lock);
848 ret = kmx61_get_odr(data, val, val2, chan->address);
849 mutex_unlock(&data->lock);
850 if (ret)
851 return -EINVAL;
852 return IIO_VAL_INT_PLUS_MICRO;
853 }
854 return -EINVAL;
855}
856
857static int kmx61_write_raw(struct iio_dev *indio_dev,
858 struct iio_chan_spec const *chan, int val,
859 int val2, long mask)
860{
861 int ret;
862 struct kmx61_data *data = kmx61_get_data(indio_dev);
863
864 switch (mask) {
865 case IIO_CHAN_INFO_SAMP_FREQ:
866 if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
867 return -EINVAL;
868
869 mutex_lock(&data->lock);
870 ret = kmx61_set_odr(data, val, val2, chan->address);
871 mutex_unlock(&data->lock);
872 return ret;
873 case IIO_CHAN_INFO_SCALE:
874 switch (chan->type) {
875 case IIO_ACCEL:
876 if (val != 0)
877 return -EINVAL;
878 mutex_lock(&data->lock);
879 ret = kmx61_set_scale(data, val2);
880 mutex_unlock(&data->lock);
881 return ret;
882 default:
883 return -EINVAL;
884 }
885 default:
886 return -EINVAL;
887 }
888}
889
890static int kmx61_read_event(struct iio_dev *indio_dev,
891 const struct iio_chan_spec *chan,
892 enum iio_event_type type,
893 enum iio_event_direction dir,
894 enum iio_event_info info,
895 int *val, int *val2)
896{
897 struct kmx61_data *data = kmx61_get_data(indio_dev);
898
899 *val2 = 0;
900 switch (info) {
901 case IIO_EV_INFO_VALUE:
902 *val = data->wake_thresh;
903 return IIO_VAL_INT;
904 case IIO_EV_INFO_PERIOD:
905 *val = data->wake_duration;
906 return IIO_VAL_INT;
907 default:
908 return -EINVAL;
909 }
910}
911
912static int kmx61_write_event(struct iio_dev *indio_dev,
913 const struct iio_chan_spec *chan,
914 enum iio_event_type type,
915 enum iio_event_direction dir,
916 enum iio_event_info info,
917 int val, int val2)
918{
919 struct kmx61_data *data = kmx61_get_data(indio_dev);
920
921 if (data->ev_enable_state)
922 return -EBUSY;
923
924 switch (info) {
925 case IIO_EV_INFO_VALUE:
926 data->wake_thresh = val;
927 return IIO_VAL_INT;
928 case IIO_EV_INFO_PERIOD:
929 data->wake_duration = val;
930 return IIO_VAL_INT;
931 default:
932 return -EINVAL;
933 }
934}
935
936static int kmx61_read_event_config(struct iio_dev *indio_dev,
937 const struct iio_chan_spec *chan,
938 enum iio_event_type type,
939 enum iio_event_direction dir)
940{
941 struct kmx61_data *data = kmx61_get_data(indio_dev);
942
943 return data->ev_enable_state;
944}
945
946static int kmx61_write_event_config(struct iio_dev *indio_dev,
947 const struct iio_chan_spec *chan,
948 enum iio_event_type type,
949 enum iio_event_direction dir,
950 int state)
951{
952 struct kmx61_data *data = kmx61_get_data(indio_dev);
953 int ret = 0;
954
955 if (state && data->ev_enable_state)
956 return 0;
957
958 mutex_lock(&data->lock);
959
960 if (!state && data->motion_trig_on) {
961 data->ev_enable_state = false;
962 goto err_unlock;
963 }
964
965 ret = kmx61_set_power_state(data, state, KMX61_ACC);
966 if (ret < 0)
967 goto err_unlock;
968
969 ret = kmx61_setup_any_motion_interrupt(data, state);
970 if (ret < 0) {
971 kmx61_set_power_state(data, false, KMX61_ACC);
972 goto err_unlock;
973 }
974
975 data->ev_enable_state = state;
976
977err_unlock:
978 mutex_unlock(&data->lock);
979
980 return ret;
981}
982
983static int kmx61_acc_validate_trigger(struct iio_dev *indio_dev,
984 struct iio_trigger *trig)
985{
986 struct kmx61_data *data = kmx61_get_data(indio_dev);
987
988 if (data->acc_dready_trig != trig && data->motion_trig != trig)
989 return -EINVAL;
990
991 return 0;
992}
993
994static int kmx61_mag_validate_trigger(struct iio_dev *indio_dev,
995 struct iio_trigger *trig)
996{
997 struct kmx61_data *data = kmx61_get_data(indio_dev);
998
999 if (data->mag_dready_trig != trig)
1000 return -EINVAL;
1001
1002 return 0;
1003}
1004
1005static const struct iio_info kmx61_acc_info = {
1006 .driver_module = THIS_MODULE,
1007 .read_raw = kmx61_read_raw,
1008 .write_raw = kmx61_write_raw,
1009 .attrs = &kmx61_acc_attribute_group,
1010 .read_event_value = kmx61_read_event,
1011 .write_event_value = kmx61_write_event,
1012 .read_event_config = kmx61_read_event_config,
1013 .write_event_config = kmx61_write_event_config,
1014 .validate_trigger = kmx61_acc_validate_trigger,
1015};
1016
1017static const struct iio_info kmx61_mag_info = {
1018 .driver_module = THIS_MODULE,
1019 .read_raw = kmx61_read_raw,
1020 .write_raw = kmx61_write_raw,
1021 .attrs = &kmx61_mag_attribute_group,
1022 .validate_trigger = kmx61_mag_validate_trigger,
1023};
1024
1025
1026static int kmx61_data_rdy_trigger_set_state(struct iio_trigger *trig,
1027 bool state)
1028{
1029 int ret = 0;
1030 u8 device;
1031
1032 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1033 struct kmx61_data *data = kmx61_get_data(indio_dev);
1034
1035 mutex_lock(&data->lock);
1036
1037 if (!state && data->ev_enable_state && data->motion_trig_on) {
1038 data->motion_trig_on = false;
1039 goto err_unlock;
1040 }
1041
1042 if (data->acc_dready_trig == trig || data->motion_trig == trig)
1043 device = KMX61_ACC;
1044 else
1045 device = KMX61_MAG;
1046
1047 ret = kmx61_set_power_state(data, state, device);
1048 if (ret < 0)
1049 goto err_unlock;
1050
1051 if (data->acc_dready_trig == trig || data->mag_dready_trig == trig)
1052 ret = kmx61_setup_new_data_interrupt(data, state, device);
1053 else
1054 ret = kmx61_setup_any_motion_interrupt(data, state);
1055 if (ret < 0) {
1056 kmx61_set_power_state(data, false, device);
1057 goto err_unlock;
1058 }
1059
1060 if (data->acc_dready_trig == trig)
1061 data->acc_dready_trig_on = state;
1062 else if (data->mag_dready_trig == trig)
1063 data->mag_dready_trig_on = state;
1064 else
1065 data->motion_trig_on = state;
1066err_unlock:
1067 mutex_unlock(&data->lock);
1068
1069 return ret;
1070}
1071
1072static int kmx61_trig_try_reenable(struct iio_trigger *trig)
1073{
1074 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1075 struct kmx61_data *data = kmx61_get_data(indio_dev);
1076 int ret;
1077
1078 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
1079 if (ret < 0) {
1080 dev_err(&data->client->dev, "Error reading reg_inl\n");
1081 return ret;
1082 }
1083
1084 return 0;
1085}
1086
1087static const struct iio_trigger_ops kmx61_trigger_ops = {
1088 .set_trigger_state = kmx61_data_rdy_trigger_set_state,
1089 .try_reenable = kmx61_trig_try_reenable,
1090 .owner = THIS_MODULE,
1091};
1092
1093static irqreturn_t kmx61_event_handler(int irq, void *private)
1094{
1095 struct kmx61_data *data = private;
1096 struct iio_dev *indio_dev = data->acc_indio_dev;
1097 int ret;
1098
1099 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS1);
1100 if (ret < 0) {
1101 dev_err(&data->client->dev, "Error reading reg_ins1\n");
1102 goto ack_intr;
1103 }
1104
1105 if (ret & KMX61_REG_INS1_BIT_WUFS) {
1106 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS2);
1107 if (ret < 0) {
1108 dev_err(&data->client->dev, "Error reading reg_ins2\n");
1109 goto ack_intr;
1110 }
1111
1112 if (ret & KMX61_REG_INS2_BIT_XN)
1113 iio_push_event(indio_dev,
1114 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1115 0,
1116 IIO_MOD_X,
1117 IIO_EV_TYPE_THRESH,
1118 IIO_EV_DIR_FALLING),
1119 0);
1120
1121 if (ret & KMX61_REG_INS2_BIT_XP)
1122 iio_push_event(indio_dev,
1123 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1124 0,
1125 IIO_MOD_X,
1126 IIO_EV_TYPE_THRESH,
1127 IIO_EV_DIR_RISING),
1128 0);
1129
1130 if (ret & KMX61_REG_INS2_BIT_YN)
1131 iio_push_event(indio_dev,
1132 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1133 0,
1134 IIO_MOD_Y,
1135 IIO_EV_TYPE_THRESH,
1136 IIO_EV_DIR_FALLING),
1137 0);
1138
1139 if (ret & KMX61_REG_INS2_BIT_YP)
1140 iio_push_event(indio_dev,
1141 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1142 0,
1143 IIO_MOD_Y,
1144 IIO_EV_TYPE_THRESH,
1145 IIO_EV_DIR_RISING),
1146 0);
1147
1148 if (ret & KMX61_REG_INS2_BIT_ZN)
1149 iio_push_event(indio_dev,
1150 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1151 0,
1152 IIO_MOD_Z,
1153 IIO_EV_TYPE_THRESH,
1154 IIO_EV_DIR_FALLING),
1155 0);
1156
1157 if (ret & KMX61_REG_INS2_BIT_ZP)
1158 iio_push_event(indio_dev,
1159 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1160 0,
1161 IIO_MOD_Z,
1162 IIO_EV_TYPE_THRESH,
1163 IIO_EV_DIR_RISING),
1164 0);
1165 }
1166
1167ack_intr:
1168 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
1169 if (ret < 0)
1170 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
1171
1172 ret |= KMX61_REG_CTRL1_BIT_RES;
1173 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
1174 if (ret < 0)
1175 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
1176
1177 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
1178 if (ret < 0)
1179 dev_err(&data->client->dev, "Error reading reg_inl\n");
1180
1181 return IRQ_HANDLED;
1182}
1183
1184static irqreturn_t kmx61_data_rdy_trig_poll(int irq, void *private)
1185{
1186 struct kmx61_data *data = private;
1187
1188 if (data->acc_dready_trig_on)
1189 iio_trigger_poll(data->acc_dready_trig);
1190 if (data->mag_dready_trig_on)
1191 iio_trigger_poll(data->mag_dready_trig);
1192
1193 if (data->motion_trig_on)
1194 iio_trigger_poll(data->motion_trig);
1195
1196 if (data->ev_enable_state)
1197 return IRQ_WAKE_THREAD;
1198 return IRQ_HANDLED;
1199}
1200
1201static irqreturn_t kmx61_trigger_handler(int irq, void *p)
1202{
1203 struct iio_poll_func *pf = p;
1204 struct iio_dev *indio_dev = pf->indio_dev;
1205 struct kmx61_data *data = kmx61_get_data(indio_dev);
1206 int bit, ret, i = 0;
1207 u8 base;
1208 s16 buffer[8];
1209
1210 if (indio_dev == data->acc_indio_dev)
1211 base = KMX61_ACC_XOUT_L;
1212 else
1213 base = KMX61_MAG_XOUT_L;
1214
1215 mutex_lock(&data->lock);
1216 for_each_set_bit(bit, indio_dev->active_scan_mask,
1217 indio_dev->masklength) {
1218 ret = kmx61_read_measurement(data, base, bit);
1219 if (ret < 0) {
1220 mutex_unlock(&data->lock);
1221 goto err;
1222 }
1223 buffer[i++] = ret;
1224 }
1225 mutex_unlock(&data->lock);
1226
1227 iio_push_to_buffers(indio_dev, buffer);
1228err:
1229 iio_trigger_notify_done(indio_dev->trig);
1230
1231 return IRQ_HANDLED;
1232}
1233
1234static const char *kmx61_match_acpi_device(struct device *dev)
1235{
1236 const struct acpi_device_id *id;
1237
1238 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1239 if (!id)
1240 return NULL;
1241 return dev_name(dev);
1242}
1243
1244static struct iio_dev *kmx61_indiodev_setup(struct kmx61_data *data,
1245 const struct iio_info *info,
1246 const struct iio_chan_spec *chan,
1247 int num_channels,
1248 const char *name)
1249{
1250 struct iio_dev *indio_dev;
1251
1252 indio_dev = devm_iio_device_alloc(&data->client->dev, sizeof(data));
1253 if (!indio_dev)
1254 return ERR_PTR(-ENOMEM);
1255
1256 kmx61_set_data(indio_dev, data);
1257
1258 indio_dev->dev.parent = &data->client->dev;
1259 indio_dev->channels = chan;
1260 indio_dev->num_channels = num_channels;
1261 indio_dev->name = name;
1262 indio_dev->modes = INDIO_DIRECT_MODE;
1263 indio_dev->info = info;
1264
1265 return indio_dev;
1266}
1267
1268static struct iio_trigger *kmx61_trigger_setup(struct kmx61_data *data,
1269 struct iio_dev *indio_dev,
1270 const char *tag)
1271{
1272 struct iio_trigger *trig;
1273 int ret;
1274
1275 trig = devm_iio_trigger_alloc(&data->client->dev,
1276 "%s-%s-dev%d",
1277 indio_dev->name,
1278 tag,
1279 indio_dev->id);
1280 if (!trig)
1281 return ERR_PTR(-ENOMEM);
1282
1283 trig->dev.parent = &data->client->dev;
1284 trig->ops = &kmx61_trigger_ops;
1285 iio_trigger_set_drvdata(trig, indio_dev);
1286
1287 ret = iio_trigger_register(trig);
1288 if (ret)
1289 return ERR_PTR(ret);
1290
1291 return trig;
1292}
1293
1294static int kmx61_probe(struct i2c_client *client,
1295 const struct i2c_device_id *id)
1296{
1297 int ret;
1298 struct kmx61_data *data;
1299 const char *name = NULL;
1300
1301 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
1302 if (!data)
1303 return -ENOMEM;
1304
1305 i2c_set_clientdata(client, data);
1306 data->client = client;
1307
1308 mutex_init(&data->lock);
1309
1310 if (id)
1311 name = id->name;
1312 else if (ACPI_HANDLE(&client->dev))
1313 name = kmx61_match_acpi_device(&client->dev);
1314 else
1315 return -ENODEV;
1316
1317 data->acc_indio_dev =
1318 kmx61_indiodev_setup(data, &kmx61_acc_info,
1319 kmx61_acc_channels,
1320 ARRAY_SIZE(kmx61_acc_channels),
1321 name);
1322 if (IS_ERR(data->acc_indio_dev))
1323 return PTR_ERR(data->acc_indio_dev);
1324
1325 data->mag_indio_dev =
1326 kmx61_indiodev_setup(data, &kmx61_mag_info,
1327 kmx61_mag_channels,
1328 ARRAY_SIZE(kmx61_mag_channels),
1329 name);
1330 if (IS_ERR(data->mag_indio_dev))
1331 return PTR_ERR(data->mag_indio_dev);
1332
1333 ret = kmx61_chip_init(data);
1334 if (ret < 0)
1335 return ret;
1336
1337 if (client->irq > 0) {
1338 ret = devm_request_threaded_irq(&client->dev, client->irq,
1339 kmx61_data_rdy_trig_poll,
1340 kmx61_event_handler,
1341 IRQF_TRIGGER_RISING,
1342 KMX61_IRQ_NAME,
1343 data);
1344 if (ret)
1345 goto err_chip_uninit;
1346
1347 data->acc_dready_trig =
1348 kmx61_trigger_setup(data, data->acc_indio_dev,
1349 "dready");
1350 if (IS_ERR(data->acc_dready_trig)) {
1351 ret = PTR_ERR(data->acc_dready_trig);
1352 goto err_chip_uninit;
1353 }
1354
1355 data->mag_dready_trig =
1356 kmx61_trigger_setup(data, data->mag_indio_dev,
1357 "dready");
1358 if (IS_ERR(data->mag_dready_trig)) {
1359 ret = PTR_ERR(data->mag_dready_trig);
1360 goto err_trigger_unregister_acc_dready;
1361 }
1362
1363 data->motion_trig =
1364 kmx61_trigger_setup(data, data->acc_indio_dev,
1365 "any-motion");
1366 if (IS_ERR(data->motion_trig)) {
1367 ret = PTR_ERR(data->motion_trig);
1368 goto err_trigger_unregister_mag_dready;
1369 }
1370
1371 ret = iio_triggered_buffer_setup(data->acc_indio_dev,
1372 &iio_pollfunc_store_time,
1373 kmx61_trigger_handler,
1374 NULL);
1375 if (ret < 0) {
1376 dev_err(&data->client->dev,
1377 "Failed to setup acc triggered buffer\n");
1378 goto err_trigger_unregister_motion;
1379 }
1380
1381 ret = iio_triggered_buffer_setup(data->mag_indio_dev,
1382 &iio_pollfunc_store_time,
1383 kmx61_trigger_handler,
1384 NULL);
1385 if (ret < 0) {
1386 dev_err(&data->client->dev,
1387 "Failed to setup mag triggered buffer\n");
1388 goto err_buffer_cleanup_acc;
1389 }
1390 }
1391
1392 ret = pm_runtime_set_active(&client->dev);
1393 if (ret < 0)
1394 goto err_buffer_cleanup_mag;
1395
1396 pm_runtime_enable(&client->dev);
1397 pm_runtime_set_autosuspend_delay(&client->dev, KMX61_SLEEP_DELAY_MS);
1398 pm_runtime_use_autosuspend(&client->dev);
1399
1400 ret = iio_device_register(data->acc_indio_dev);
1401 if (ret < 0) {
1402 dev_err(&client->dev, "Failed to register acc iio device\n");
1403 goto err_buffer_cleanup_mag;
1404 }
1405
1406 ret = iio_device_register(data->mag_indio_dev);
1407 if (ret < 0) {
1408 dev_err(&client->dev, "Failed to register mag iio device\n");
1409 goto err_iio_unregister_acc;
1410 }
1411
1412 return 0;
1413
1414err_iio_unregister_acc:
1415 iio_device_unregister(data->acc_indio_dev);
1416err_buffer_cleanup_mag:
1417 if (client->irq > 0)
1418 iio_triggered_buffer_cleanup(data->mag_indio_dev);
1419err_buffer_cleanup_acc:
1420 if (client->irq > 0)
1421 iio_triggered_buffer_cleanup(data->acc_indio_dev);
1422err_trigger_unregister_motion:
1423 iio_trigger_unregister(data->motion_trig);
1424err_trigger_unregister_mag_dready:
1425 iio_trigger_unregister(data->mag_dready_trig);
1426err_trigger_unregister_acc_dready:
1427 iio_trigger_unregister(data->acc_dready_trig);
1428err_chip_uninit:
1429 kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1430 return ret;
1431}
1432
1433static int kmx61_remove(struct i2c_client *client)
1434{
1435 struct kmx61_data *data = i2c_get_clientdata(client);
1436
1437 iio_device_unregister(data->acc_indio_dev);
1438 iio_device_unregister(data->mag_indio_dev);
1439
1440 pm_runtime_disable(&client->dev);
1441 pm_runtime_set_suspended(&client->dev);
1442 pm_runtime_put_noidle(&client->dev);
1443
1444 if (client->irq > 0) {
1445 iio_triggered_buffer_cleanup(data->acc_indio_dev);
1446 iio_triggered_buffer_cleanup(data->mag_indio_dev);
1447 iio_trigger_unregister(data->acc_dready_trig);
1448 iio_trigger_unregister(data->mag_dready_trig);
1449 iio_trigger_unregister(data->motion_trig);
1450 }
1451
1452 mutex_lock(&data->lock);
1453 kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1454 mutex_unlock(&data->lock);
1455
1456 return 0;
1457}
1458
1459#ifdef CONFIG_PM_SLEEP
1460static int kmx61_suspend(struct device *dev)
1461{
1462 int ret;
1463 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1464
1465 mutex_lock(&data->lock);
1466 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
1467 false);
1468 mutex_unlock(&data->lock);
1469
1470 return ret;
1471}
1472
1473static int kmx61_resume(struct device *dev)
1474{
1475 u8 stby = 0;
1476 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1477
1478 if (data->acc_stby)
1479 stby |= KMX61_ACC_STBY_BIT;
1480 if (data->mag_stby)
1481 stby |= KMX61_MAG_STBY_BIT;
1482
1483 return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
1484}
1485#endif
1486
1487#ifdef CONFIG_PM
1488static int kmx61_runtime_suspend(struct device *dev)
1489{
1490 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1491 int ret;
1492
1493 mutex_lock(&data->lock);
1494 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1495 mutex_unlock(&data->lock);
1496
1497 return ret;
1498}
1499
1500static int kmx61_runtime_resume(struct device *dev)
1501{
1502 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1503 u8 stby = 0;
1504
1505 if (!data->acc_ps)
1506 stby |= KMX61_ACC_STBY_BIT;
1507 if (!data->mag_ps)
1508 stby |= KMX61_MAG_STBY_BIT;
1509
1510 return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
1511}
1512#endif
1513
1514static const struct dev_pm_ops kmx61_pm_ops = {
1515 SET_SYSTEM_SLEEP_PM_OPS(kmx61_suspend, kmx61_resume)
1516 SET_RUNTIME_PM_OPS(kmx61_runtime_suspend, kmx61_runtime_resume, NULL)
1517};
1518
1519static const struct acpi_device_id kmx61_acpi_match[] = {
1520 {"KMX61021", 0},
1521 {}
1522};
1523
1524MODULE_DEVICE_TABLE(acpi, kmx61_acpi_match);
1525
1526static const struct i2c_device_id kmx61_id[] = {
1527 {"kmx611021", 0},
1528 {}
1529};
1530
1531MODULE_DEVICE_TABLE(i2c, kmx61_id);
1532
1533static struct i2c_driver kmx61_driver = {
1534 .driver = {
1535 .name = KMX61_DRV_NAME,
1536 .acpi_match_table = ACPI_PTR(kmx61_acpi_match),
1537 .pm = &kmx61_pm_ops,
1538 },
1539 .probe = kmx61_probe,
1540 .remove = kmx61_remove,
1541 .id_table = kmx61_id,
1542};
1543
1544module_i2c_driver(kmx61_driver);
1545
1546MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1547MODULE_DESCRIPTION("KMX61 accelerometer/magnetometer driver");
1548MODULE_LICENSE("GPL v2");
1549
