linux/drivers/infiniband/hw/i40iw/i40iw_verbs.c
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   1/*******************************************************************************
   2*
   3* Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4*
   5* This software is available to you under a choice of one of two
   6* licenses.  You may choose to be licensed under the terms of the GNU
   7* General Public License (GPL) Version 2, available from the file
   8* COPYING in the main directory of this source tree, or the
   9* OpenFabrics.org BSD license below:
  10*
  11*   Redistribution and use in source and binary forms, with or
  12*   without modification, are permitted provided that the following
  13*   conditions are met:
  14*
  15*    - Redistributions of source code must retain the above
  16*       copyright notice, this list of conditions and the following
  17*       disclaimer.
  18*
  19*    - Redistributions in binary form must reproduce the above
  20*       copyright notice, this list of conditions and the following
  21*       disclaimer in the documentation and/or other materials
  22*       provided with the distribution.
  23*
  24* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31* SOFTWARE.
  32*
  33*******************************************************************************/
  34
  35#include <linux/module.h>
  36#include <linux/moduleparam.h>
  37#include <linux/random.h>
  38#include <linux/highmem.h>
  39#include <linux/time.h>
  40#include <asm/byteorder.h>
  41#include <net/ip.h>
  42#include <rdma/ib_verbs.h>
  43#include <rdma/iw_cm.h>
  44#include <rdma/ib_user_verbs.h>
  45#include <rdma/ib_umem.h>
  46#include "i40iw.h"
  47
  48/**
  49 * i40iw_query_device - get device attributes
  50 * @ibdev: device pointer from stack
  51 * @props: returning device attributes
  52 * @udata: user data
  53 */
  54static int i40iw_query_device(struct ib_device *ibdev,
  55                              struct ib_device_attr *props,
  56                              struct ib_udata *udata)
  57{
  58        struct i40iw_device *iwdev = to_iwdev(ibdev);
  59
  60        if (udata->inlen || udata->outlen)
  61                return -EINVAL;
  62        memset(props, 0, sizeof(*props));
  63        ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  64        props->fw_ver = I40IW_FW_VERSION;
  65        props->device_cap_flags = iwdev->device_cap_flags;
  66        props->vendor_id = iwdev->ldev->pcidev->vendor;
  67        props->vendor_part_id = iwdev->ldev->pcidev->device;
  68        props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  69        props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  70        props->max_qp = iwdev->max_qp;
  71        props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
  72        props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  73        props->max_cq = iwdev->max_cq;
  74        props->max_cqe = iwdev->max_cqe;
  75        props->max_mr = iwdev->max_mr;
  76        props->max_pd = iwdev->max_pd;
  77        props->max_sge_rd = I40IW_MAX_SGE_RD;
  78        props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  79        props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  80        props->atomic_cap = IB_ATOMIC_NONE;
  81        props->max_map_per_fmr = 1;
  82        props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  83        return 0;
  84}
  85
  86/**
  87 * i40iw_query_port - get port attrubutes
  88 * @ibdev: device pointer from stack
  89 * @port: port number for query
  90 * @props: returning device attributes
  91 */
  92static int i40iw_query_port(struct ib_device *ibdev,
  93                            u8 port,
  94                            struct ib_port_attr *props)
  95{
  96        struct i40iw_device *iwdev = to_iwdev(ibdev);
  97        struct net_device *netdev = iwdev->netdev;
  98
  99        memset(props, 0, sizeof(*props));
 100
 101        props->max_mtu = IB_MTU_4096;
 102        if (netdev->mtu >= 4096)
 103                props->active_mtu = IB_MTU_4096;
 104        else if (netdev->mtu >= 2048)
 105                props->active_mtu = IB_MTU_2048;
 106        else if (netdev->mtu >= 1024)
 107                props->active_mtu = IB_MTU_1024;
 108        else if (netdev->mtu >= 512)
 109                props->active_mtu = IB_MTU_512;
 110        else
 111                props->active_mtu = IB_MTU_256;
 112
 113        props->lid = 1;
 114        if (netif_carrier_ok(iwdev->netdev))
 115                props->state = IB_PORT_ACTIVE;
 116        else
 117                props->state = IB_PORT_DOWN;
 118        props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 119                IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 120        props->gid_tbl_len = 1;
 121        props->pkey_tbl_len = 1;
 122        props->active_width = IB_WIDTH_4X;
 123        props->active_speed = 1;
 124        props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 125        return 0;
 126}
 127
 128/**
 129 * i40iw_alloc_ucontext - Allocate the user context data structure
 130 * @ibdev: device pointer from stack
 131 * @udata: user data
 132 *
 133 * This keeps track of all objects associated with a particular
 134 * user-mode client.
 135 */
 136static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
 137                                                struct ib_udata *udata)
 138{
 139        struct i40iw_device *iwdev = to_iwdev(ibdev);
 140        struct i40iw_alloc_ucontext_req req;
 141        struct i40iw_alloc_ucontext_resp uresp;
 142        struct i40iw_ucontext *ucontext;
 143
 144        if (ib_copy_from_udata(&req, udata, sizeof(req)))
 145                return ERR_PTR(-EINVAL);
 146
 147        if (req.userspace_ver != I40IW_ABI_USERSPACE_VER) {
 148                i40iw_pr_err("Invalid userspace driver version detected. Detected version %d, should be %d\n",
 149                             req.userspace_ver, I40IW_ABI_USERSPACE_VER);
 150                return ERR_PTR(-EINVAL);
 151        }
 152
 153        memset(&uresp, 0, sizeof(uresp));
 154        uresp.max_qps = iwdev->max_qp;
 155        uresp.max_pds = iwdev->max_pd;
 156        uresp.wq_size = iwdev->max_qp_wr * 2;
 157        uresp.kernel_ver = I40IW_ABI_KERNEL_VER;
 158
 159        ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
 160        if (!ucontext)
 161                return ERR_PTR(-ENOMEM);
 162
 163        ucontext->iwdev = iwdev;
 164
 165        if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 166                kfree(ucontext);
 167                return ERR_PTR(-EFAULT);
 168        }
 169
 170        INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 171        spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 172        INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 173        spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 174
 175        return &ucontext->ibucontext;
 176}
 177
 178/**
 179 * i40iw_dealloc_ucontext - deallocate the user context data structure
 180 * @context: user context created during alloc
 181 */
 182static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
 183{
 184        struct i40iw_ucontext *ucontext = to_ucontext(context);
 185        unsigned long flags;
 186
 187        spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
 188        if (!list_empty(&ucontext->cq_reg_mem_list)) {
 189                spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 190                return -EBUSY;
 191        }
 192        spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 193        spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
 194        if (!list_empty(&ucontext->qp_reg_mem_list)) {
 195                spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 196                return -EBUSY;
 197        }
 198        spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 199
 200        kfree(ucontext);
 201        return 0;
 202}
 203
 204/**
 205 * i40iw_mmap - user memory map
 206 * @context: context created during alloc
 207 * @vma: kernel info for user memory map
 208 */
 209static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 210{
 211        struct i40iw_ucontext *ucontext;
 212        u64 db_addr_offset;
 213        u64 push_offset;
 214
 215        ucontext = to_ucontext(context);
 216        if (ucontext->iwdev->sc_dev.is_pf) {
 217                db_addr_offset = I40IW_DB_ADDR_OFFSET;
 218                push_offset = I40IW_PUSH_OFFSET;
 219                if (vma->vm_pgoff)
 220                        vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
 221        } else {
 222                db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
 223                push_offset = I40IW_VF_PUSH_OFFSET;
 224                if (vma->vm_pgoff)
 225                        vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
 226        }
 227
 228        vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
 229
 230        if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
 231                vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 232                vma->vm_private_data = ucontext;
 233        } else {
 234                if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
 235                        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 236                else
 237                        vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 238        }
 239
 240        if (io_remap_pfn_range(vma, vma->vm_start,
 241                               vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
 242                               PAGE_SIZE, vma->vm_page_prot))
 243                return -EAGAIN;
 244
 245        return 0;
 246}
 247
 248/**
 249 * i40iw_alloc_push_page - allocate a push page for qp
 250 * @iwdev: iwarp device
 251 * @qp: hardware control qp
 252 */
 253static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 254{
 255        struct i40iw_cqp_request *cqp_request;
 256        struct cqp_commands_info *cqp_info;
 257        struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 258        enum i40iw_status_code status;
 259
 260        if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 261                return;
 262
 263        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 264        if (!cqp_request)
 265                return;
 266
 267        atomic_inc(&cqp_request->refcount);
 268
 269        cqp_info = &cqp_request->info;
 270        cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 271        cqp_info->post_sq = 1;
 272
 273        cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
 274        cqp_info->in.u.manage_push_page.info.free_page = 0;
 275        cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 276        cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 277
 278        status = i40iw_handle_cqp_op(iwdev, cqp_request);
 279        if (!status)
 280                qp->push_idx = cqp_request->compl_info.op_ret_val;
 281        else
 282                i40iw_pr_err("CQP-OP Push page fail");
 283        i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 284}
 285
 286/**
 287 * i40iw_dealloc_push_page - free a push page for qp
 288 * @iwdev: iwarp device
 289 * @qp: hardware control qp
 290 */
 291static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 292{
 293        struct i40iw_cqp_request *cqp_request;
 294        struct cqp_commands_info *cqp_info;
 295        struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 296        enum i40iw_status_code status;
 297
 298        if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 299                return;
 300
 301        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 302        if (!cqp_request)
 303                return;
 304
 305        cqp_info = &cqp_request->info;
 306        cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 307        cqp_info->post_sq = 1;
 308
 309        cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 310        cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
 311        cqp_info->in.u.manage_push_page.info.free_page = 1;
 312        cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 313        cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 314
 315        status = i40iw_handle_cqp_op(iwdev, cqp_request);
 316        if (!status)
 317                qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 318        else
 319                i40iw_pr_err("CQP-OP Push page fail");
 320}
 321
 322/**
 323 * i40iw_alloc_pd - allocate protection domain
 324 * @ibdev: device pointer from stack
 325 * @context: user context created during alloc
 326 * @udata: user data
 327 */
 328static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
 329                                    struct ib_ucontext *context,
 330                                    struct ib_udata *udata)
 331{
 332        struct i40iw_pd *iwpd;
 333        struct i40iw_device *iwdev = to_iwdev(ibdev);
 334        struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 335        struct i40iw_alloc_pd_resp uresp;
 336        struct i40iw_sc_pd *sc_pd;
 337        u32 pd_id = 0;
 338        int err;
 339
 340        err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 341                                   iwdev->max_pd, &pd_id, &iwdev->next_pd);
 342        if (err) {
 343                i40iw_pr_err("alloc resource failed\n");
 344                return ERR_PTR(err);
 345        }
 346
 347        iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
 348        if (!iwpd) {
 349                err = -ENOMEM;
 350                goto free_res;
 351        }
 352
 353        sc_pd = &iwpd->sc_pd;
 354        dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id);
 355
 356        if (context) {
 357                memset(&uresp, 0, sizeof(uresp));
 358                uresp.pd_id = pd_id;
 359                if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 360                        err = -EFAULT;
 361                        goto error;
 362                }
 363        }
 364
 365        i40iw_add_pdusecount(iwpd);
 366        return &iwpd->ibpd;
 367error:
 368        kfree(iwpd);
 369free_res:
 370        i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 371        return ERR_PTR(err);
 372}
 373
 374/**
 375 * i40iw_dealloc_pd - deallocate pd
 376 * @ibpd: ptr of pd to be deallocated
 377 */
 378static int i40iw_dealloc_pd(struct ib_pd *ibpd)
 379{
 380        struct i40iw_pd *iwpd = to_iwpd(ibpd);
 381        struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 382
 383        i40iw_rem_pdusecount(iwpd, iwdev);
 384        return 0;
 385}
 386
 387/**
 388 * i40iw_qp_roundup - return round up qp ring size
 389 * @wr_ring_size: ring size to round up
 390 */
 391static int i40iw_qp_roundup(u32 wr_ring_size)
 392{
 393        int scount = 1;
 394
 395        if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
 396                wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
 397
 398        for (wr_ring_size--; scount <= 16; scount *= 2)
 399                wr_ring_size |= wr_ring_size >> scount;
 400        return ++wr_ring_size;
 401}
 402
 403/**
 404 * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 405 * address
 406 * @va: user virtual address
 407 * @pbl_list: pbl list to search in (QP's or CQ's)
 408 */
 409static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 410                                       struct list_head *pbl_list)
 411{
 412        struct i40iw_pbl *iwpbl;
 413
 414        list_for_each_entry(iwpbl, pbl_list, list) {
 415                if (iwpbl->user_base == va) {
 416                        list_del(&iwpbl->list);
 417                        return iwpbl;
 418                }
 419        }
 420        return NULL;
 421}
 422
 423/**
 424 * i40iw_free_qp_resources - free up memory resources for qp
 425 * @iwdev: iwarp device
 426 * @iwqp: qp ptr (user or kernel)
 427 * @qp_num: qp number assigned
 428 */
 429void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 430                             struct i40iw_qp *iwqp,
 431                             u32 qp_num)
 432{
 433        i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 434        if (qp_num)
 435                i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 436        i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 437        i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 438        kfree(iwqp->kqp.wrid_mem);
 439        iwqp->kqp.wrid_mem = NULL;
 440        kfree(iwqp->allocated_buffer);
 441}
 442
 443/**
 444 * i40iw_clean_cqes - clean cq entries for qp
 445 * @iwqp: qp ptr (user or kernel)
 446 * @iwcq: cq ptr
 447 */
 448static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 449{
 450        struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 451
 452        ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 453}
 454
 455/**
 456 * i40iw_destroy_qp - destroy qp
 457 * @ibqp: qp's ib pointer also to get to device's qp address
 458 */
 459static int i40iw_destroy_qp(struct ib_qp *ibqp)
 460{
 461        struct i40iw_qp *iwqp = to_iwqp(ibqp);
 462
 463        iwqp->destroyed = 1;
 464
 465        if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 466                i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 467
 468        if (!iwqp->user_mode) {
 469                if (iwqp->iwscq) {
 470                        i40iw_clean_cqes(iwqp, iwqp->iwscq);
 471                        if (iwqp->iwrcq != iwqp->iwscq)
 472                                i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 473                }
 474        }
 475
 476        i40iw_rem_ref(&iwqp->ibqp);
 477        return 0;
 478}
 479
 480/**
 481 * i40iw_setup_virt_qp - setup for allocation of virtual qp
 482 * @dev: iwarp device
 483 * @qp: qp ptr
 484 * @init_info: initialize info to return
 485 */
 486static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 487                               struct i40iw_qp *iwqp,
 488                               struct i40iw_qp_init_info *init_info)
 489{
 490        struct i40iw_pbl *iwpbl = iwqp->iwpbl;
 491        struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 492
 493        iwqp->page = qpmr->sq_page;
 494        init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 495        if (iwpbl->pbl_allocated) {
 496                init_info->virtual_map = true;
 497                init_info->sq_pa = qpmr->sq_pbl.idx;
 498                init_info->rq_pa = qpmr->rq_pbl.idx;
 499        } else {
 500                init_info->sq_pa = qpmr->sq_pbl.addr;
 501                init_info->rq_pa = qpmr->rq_pbl.addr;
 502        }
 503        return 0;
 504}
 505
 506/**
 507 * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 508 * @iwdev: iwarp device
 509 * @iwqp: qp ptr (user or kernel)
 510 * @info: initialize info to return
 511 */
 512static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 513                                struct i40iw_qp *iwqp,
 514                                struct i40iw_qp_init_info *info)
 515{
 516        struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 517        u32 sqdepth, rqdepth;
 518        u32 sq_size, rq_size;
 519        u8 sqshift, rqshift;
 520        u32 size;
 521        enum i40iw_status_code status;
 522        struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 523
 524        sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
 525        rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
 526
 527        status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 528        if (!status)
 529                status = i40iw_get_wqe_shift(rq_size, ukinfo->max_rq_frag_cnt, 0, &rqshift);
 530
 531        if (status)
 532                return -ENOMEM;
 533
 534        sqdepth = sq_size << sqshift;
 535        rqdepth = rq_size << rqshift;
 536
 537        size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 538        iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 539
 540        ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 541        if (!ukinfo->sq_wrtrk_array)
 542                return -ENOMEM;
 543
 544        ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 545
 546        size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 547        size += (I40IW_SHADOW_AREA_SIZE << 3);
 548
 549        status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 550        if (status) {
 551                kfree(ukinfo->sq_wrtrk_array);
 552                ukinfo->sq_wrtrk_array = NULL;
 553                return -ENOMEM;
 554        }
 555
 556        ukinfo->sq = mem->va;
 557        info->sq_pa = mem->pa;
 558
 559        ukinfo->rq = &ukinfo->sq[sqdepth];
 560        info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 561
 562        ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 563        info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 564
 565        ukinfo->sq_size = sq_size;
 566        ukinfo->rq_size = rq_size;
 567        ukinfo->qp_id = iwqp->ibqp.qp_num;
 568        return 0;
 569}
 570
 571/**
 572 * i40iw_create_qp - create qp
 573 * @ibpd: ptr of pd
 574 * @init_attr: attributes for qp
 575 * @udata: user data for create qp
 576 */
 577static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 578                                     struct ib_qp_init_attr *init_attr,
 579                                     struct ib_udata *udata)
 580{
 581        struct i40iw_pd *iwpd = to_iwpd(ibpd);
 582        struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 583        struct i40iw_cqp *iwcqp = &iwdev->cqp;
 584        struct i40iw_qp *iwqp;
 585        struct i40iw_ucontext *ucontext;
 586        struct i40iw_create_qp_req req;
 587        struct i40iw_create_qp_resp uresp;
 588        u32 qp_num = 0;
 589        void *mem;
 590        enum i40iw_status_code ret;
 591        int err_code;
 592        int sq_size;
 593        int rq_size;
 594        struct i40iw_sc_qp *qp;
 595        struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 596        struct i40iw_qp_init_info init_info;
 597        struct i40iw_create_qp_info *qp_info;
 598        struct i40iw_cqp_request *cqp_request;
 599        struct cqp_commands_info *cqp_info;
 600
 601        struct i40iw_qp_host_ctx_info *ctx_info;
 602        struct i40iwarp_offload_info *iwarp_info;
 603        unsigned long flags;
 604
 605        if (init_attr->create_flags)
 606                return ERR_PTR(-EINVAL);
 607        if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 608                init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 609
 610        if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 611                init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 612
 613        memset(&init_info, 0, sizeof(init_info));
 614
 615        sq_size = init_attr->cap.max_send_wr;
 616        rq_size = init_attr->cap.max_recv_wr;
 617
 618        init_info.qp_uk_init_info.sq_size = sq_size;
 619        init_info.qp_uk_init_info.rq_size = rq_size;
 620        init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 621        init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 622        init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 623
 624        mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 625        if (!mem)
 626                return ERR_PTR(-ENOMEM);
 627
 628        iwqp = (struct i40iw_qp *)mem;
 629        qp = &iwqp->sc_qp;
 630        qp->back_qp = (void *)iwqp;
 631        qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 632
 633        iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 634
 635        if (i40iw_allocate_dma_mem(dev->hw,
 636                                   &iwqp->q2_ctx_mem,
 637                                   I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 638                                   256)) {
 639                i40iw_pr_err("dma_mem failed\n");
 640                err_code = -ENOMEM;
 641                goto error;
 642        }
 643
 644        init_info.q2 = iwqp->q2_ctx_mem.va;
 645        init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 646
 647        init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 648        init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 649
 650        err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 651                                        &qp_num, &iwdev->next_qp);
 652        if (err_code) {
 653                i40iw_pr_err("qp resource\n");
 654                goto error;
 655        }
 656
 657        iwqp->allocated_buffer = mem;
 658        iwqp->iwdev = iwdev;
 659        iwqp->iwpd = iwpd;
 660        iwqp->ibqp.qp_num = qp_num;
 661        qp = &iwqp->sc_qp;
 662        iwqp->iwscq = to_iwcq(init_attr->send_cq);
 663        iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 664
 665        iwqp->host_ctx.va = init_info.host_ctx;
 666        iwqp->host_ctx.pa = init_info.host_ctx_pa;
 667        iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 668
 669        init_info.pd = &iwpd->sc_pd;
 670        init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 671        iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 672
 673        if (init_attr->qp_type != IB_QPT_RC) {
 674                err_code = -EINVAL;
 675                goto error;
 676        }
 677        if (iwdev->push_mode)
 678                i40iw_alloc_push_page(iwdev, qp);
 679        if (udata) {
 680                err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 681                if (err_code) {
 682                        i40iw_pr_err("ib_copy_from_data\n");
 683                        goto error;
 684                }
 685                iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 686                if (ibpd->uobject && ibpd->uobject->context) {
 687                        iwqp->user_mode = 1;
 688                        ucontext = to_ucontext(ibpd->uobject->context);
 689
 690                        if (req.user_wqe_buffers) {
 691                                spin_lock_irqsave(
 692                                    &ucontext->qp_reg_mem_list_lock, flags);
 693                                iwqp->iwpbl = i40iw_get_pbl(
 694                                    (unsigned long)req.user_wqe_buffers,
 695                                    &ucontext->qp_reg_mem_list);
 696                                spin_unlock_irqrestore(
 697                                    &ucontext->qp_reg_mem_list_lock, flags);
 698
 699                                if (!iwqp->iwpbl) {
 700                                        err_code = -ENODATA;
 701                                        i40iw_pr_err("no pbl info\n");
 702                                        goto error;
 703                                }
 704                        }
 705                }
 706                err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 707        } else {
 708                err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 709        }
 710
 711        if (err_code) {
 712                i40iw_pr_err("setup qp failed\n");
 713                goto error;
 714        }
 715
 716        init_info.type = I40IW_QP_TYPE_IWARP;
 717        ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 718        if (ret) {
 719                err_code = -EPROTO;
 720                i40iw_pr_err("qp_init fail\n");
 721                goto error;
 722        }
 723        ctx_info = &iwqp->ctx_info;
 724        iwarp_info = &iwqp->iwarp_info;
 725        iwarp_info->rd_enable = true;
 726        iwarp_info->wr_rdresp_en = true;
 727        if (!iwqp->user_mode) {
 728                iwarp_info->fast_reg_en = true;
 729                iwarp_info->priv_mode_en = true;
 730        }
 731        iwarp_info->ddp_ver = 1;
 732        iwarp_info->rdmap_ver = 1;
 733
 734        ctx_info->iwarp_info_valid = true;
 735        ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 736        ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 737        if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 738                ctx_info->push_mode_en = false;
 739        } else {
 740                ctx_info->push_mode_en = true;
 741                ctx_info->push_idx = qp->push_idx;
 742        }
 743
 744        ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 745                                             (u64 *)iwqp->host_ctx.va,
 746                                             ctx_info);
 747        ctx_info->iwarp_info_valid = false;
 748        cqp_request = i40iw_get_cqp_request(iwcqp, true);
 749        if (!cqp_request) {
 750                err_code = -ENOMEM;
 751                goto error;
 752        }
 753        cqp_info = &cqp_request->info;
 754        qp_info = &cqp_request->info.in.u.qp_create.info;
 755
 756        memset(qp_info, 0, sizeof(*qp_info));
 757
 758        qp_info->cq_num_valid = true;
 759        qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 760
 761        cqp_info->cqp_cmd = OP_QP_CREATE;
 762        cqp_info->post_sq = 1;
 763        cqp_info->in.u.qp_create.qp = qp;
 764        cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 765        ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 766        if (ret) {
 767                i40iw_pr_err("CQP-OP QP create fail");
 768                err_code = -EACCES;
 769                goto error;
 770        }
 771
 772        i40iw_add_ref(&iwqp->ibqp);
 773        spin_lock_init(&iwqp->lock);
 774        iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 775        iwdev->qp_table[qp_num] = iwqp;
 776        i40iw_add_pdusecount(iwqp->iwpd);
 777        if (ibpd->uobject && udata) {
 778                memset(&uresp, 0, sizeof(uresp));
 779                uresp.actual_sq_size = sq_size;
 780                uresp.actual_rq_size = rq_size;
 781                uresp.qp_id = qp_num;
 782                uresp.push_idx = qp->push_idx;
 783                err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 784                if (err_code) {
 785                        i40iw_pr_err("copy_to_udata failed\n");
 786                        i40iw_destroy_qp(&iwqp->ibqp);
 787                           /* let the completion of the qp destroy free the qp */
 788                        return ERR_PTR(err_code);
 789                }
 790        }
 791        init_completion(&iwqp->sq_drained);
 792        init_completion(&iwqp->rq_drained);
 793
 794        return &iwqp->ibqp;
 795error:
 796        i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 797        return ERR_PTR(err_code);
 798}
 799
 800/**
 801 * i40iw_query - query qp attributes
 802 * @ibqp: qp pointer
 803 * @attr: attributes pointer
 804 * @attr_mask: Not used
 805 * @init_attr: qp attributes to return
 806 */
 807static int i40iw_query_qp(struct ib_qp *ibqp,
 808                          struct ib_qp_attr *attr,
 809                          int attr_mask,
 810                          struct ib_qp_init_attr *init_attr)
 811{
 812        struct i40iw_qp *iwqp = to_iwqp(ibqp);
 813        struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 814
 815        attr->qp_access_flags = 0;
 816        attr->cap.max_send_wr = qp->qp_uk.sq_size;
 817        attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 818        attr->cap.max_recv_sge = 1;
 819        attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 820        init_attr->event_handler = iwqp->ibqp.event_handler;
 821        init_attr->qp_context = iwqp->ibqp.qp_context;
 822        init_attr->send_cq = iwqp->ibqp.send_cq;
 823        init_attr->recv_cq = iwqp->ibqp.recv_cq;
 824        init_attr->srq = iwqp->ibqp.srq;
 825        init_attr->cap = attr->cap;
 826        return 0;
 827}
 828
 829/**
 830 * i40iw_hw_modify_qp - setup cqp for modify qp
 831 * @iwdev: iwarp device
 832 * @iwqp: qp ptr (user or kernel)
 833 * @info: info for modify qp
 834 * @wait: flag to wait or not for modify qp completion
 835 */
 836void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 837                        struct i40iw_modify_qp_info *info, bool wait)
 838{
 839        enum i40iw_status_code status;
 840        struct i40iw_cqp_request *cqp_request;
 841        struct cqp_commands_info *cqp_info;
 842        struct i40iw_modify_qp_info *m_info;
 843
 844        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 845        if (!cqp_request)
 846                return;
 847
 848        cqp_info = &cqp_request->info;
 849        m_info = &cqp_info->in.u.qp_modify.info;
 850        memcpy(m_info, info, sizeof(*m_info));
 851        cqp_info->cqp_cmd = OP_QP_MODIFY;
 852        cqp_info->post_sq = 1;
 853        cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 854        cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 855        status = i40iw_handle_cqp_op(iwdev, cqp_request);
 856        if (status)
 857                i40iw_pr_err("CQP-OP Modify QP fail");
 858}
 859
 860/**
 861 * i40iw_modify_qp - modify qp request
 862 * @ibqp: qp's pointer for modify
 863 * @attr: access attributes
 864 * @attr_mask: state mask
 865 * @udata: user data
 866 */
 867int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 868                    int attr_mask, struct ib_udata *udata)
 869{
 870        struct i40iw_qp *iwqp = to_iwqp(ibqp);
 871        struct i40iw_device *iwdev = iwqp->iwdev;
 872        struct i40iw_qp_host_ctx_info *ctx_info;
 873        struct i40iwarp_offload_info *iwarp_info;
 874        struct i40iw_modify_qp_info info;
 875        u8 issue_modify_qp = 0;
 876        u8 dont_wait = 0;
 877        u32 err;
 878        unsigned long flags;
 879
 880        memset(&info, 0, sizeof(info));
 881        ctx_info = &iwqp->ctx_info;
 882        iwarp_info = &iwqp->iwarp_info;
 883
 884        spin_lock_irqsave(&iwqp->lock, flags);
 885
 886        if (attr_mask & IB_QP_STATE) {
 887                switch (attr->qp_state) {
 888                case IB_QPS_INIT:
 889                case IB_QPS_RTR:
 890                        if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 891                                err = -EINVAL;
 892                                goto exit;
 893                        }
 894                        if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 895                                info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 896                                issue_modify_qp = 1;
 897                        }
 898                        break;
 899                case IB_QPS_RTS:
 900                        if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 901                            (!iwqp->cm_id)) {
 902                                err = -EINVAL;
 903                                goto exit;
 904                        }
 905
 906                        issue_modify_qp = 1;
 907                        iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 908                        iwqp->hte_added = 1;
 909                        info.next_iwarp_state = I40IW_QP_STATE_RTS;
 910                        info.tcp_ctx_valid = true;
 911                        info.ord_valid = true;
 912                        info.arp_cache_idx_valid = true;
 913                        info.cq_num_valid = true;
 914                        break;
 915                case IB_QPS_SQD:
 916                        if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 917                                err = 0;
 918                                goto exit;
 919                        }
 920                        if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 921                            (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 922                                err = 0;
 923                                goto exit;
 924                        }
 925                        if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 926                                err = -EINVAL;
 927                                goto exit;
 928                        }
 929                        info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 930                        issue_modify_qp = 1;
 931                        break;
 932                case IB_QPS_SQE:
 933                        if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 934                                err = -EINVAL;
 935                                goto exit;
 936                        }
 937                        info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 938                        issue_modify_qp = 1;
 939                        break;
 940                case IB_QPS_ERR:
 941                case IB_QPS_RESET:
 942                        if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 943                                err = -EINVAL;
 944                                goto exit;
 945                        }
 946                        if (iwqp->sc_qp.term_flags)
 947                                del_timer(&iwqp->terminate_timer);
 948                        info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 949                        if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 950                            iwdev->iw_status &&
 951                            (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 952                                info.reset_tcp_conn = true;
 953                        else
 954                                dont_wait = 1;
 955                        issue_modify_qp = 1;
 956                        info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 957                        break;
 958                default:
 959                        err = -EINVAL;
 960                        goto exit;
 961                }
 962
 963                iwqp->ibqp_state = attr->qp_state;
 964
 965                if (issue_modify_qp)
 966                        iwqp->iwarp_state = info.next_iwarp_state;
 967                else
 968                        info.next_iwarp_state = iwqp->iwarp_state;
 969        }
 970        if (attr_mask & IB_QP_ACCESS_FLAGS) {
 971                ctx_info->iwarp_info_valid = true;
 972                if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 973                        iwarp_info->wr_rdresp_en = true;
 974                if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 975                        iwarp_info->wr_rdresp_en = true;
 976                if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 977                        iwarp_info->rd_enable = true;
 978                if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 979                        iwarp_info->bind_en = true;
 980
 981                if (iwqp->user_mode) {
 982                        iwarp_info->rd_enable = true;
 983                        iwarp_info->wr_rdresp_en = true;
 984                        iwarp_info->priv_mode_en = false;
 985                }
 986        }
 987
 988        if (ctx_info->iwarp_info_valid) {
 989                struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 990                int ret;
 991
 992                ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 993                ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 994                ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 995                                                     (u64 *)iwqp->host_ctx.va,
 996                                                     ctx_info);
 997                if (ret) {
 998                        i40iw_pr_err("setting QP context\n");
 999                        err = -EINVAL;
1000                        goto exit;
1001                }
1002        }
1003
1004        spin_unlock_irqrestore(&iwqp->lock, flags);
1005
1006        if (issue_modify_qp)
1007                i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1008
1009        if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1010                if (dont_wait) {
1011                        if (iwqp->cm_id && iwqp->hw_tcp_state) {
1012                                spin_lock_irqsave(&iwqp->lock, flags);
1013                                iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1014                                iwqp->last_aeq = I40IW_AE_RESET_SENT;
1015                                spin_unlock_irqrestore(&iwqp->lock, flags);
1016                        }
1017                }
1018        }
1019        return 0;
1020exit:
1021        spin_unlock_irqrestore(&iwqp->lock, flags);
1022        return err;
1023}
1024
1025/**
1026 * cq_free_resources - free up recources for cq
1027 * @iwdev: iwarp device
1028 * @iwcq: cq ptr
1029 */
1030static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1031{
1032        struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1033
1034        if (!iwcq->user_mode)
1035                i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1036        i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1037}
1038
1039/**
1040 * cq_wq_destroy - send cq destroy cqp
1041 * @iwdev: iwarp device
1042 * @cq: hardware control cq
1043 */
1044static void cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1045{
1046        enum i40iw_status_code status;
1047        struct i40iw_cqp_request *cqp_request;
1048        struct cqp_commands_info *cqp_info;
1049
1050        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1051        if (!cqp_request)
1052                return;
1053
1054        cqp_info = &cqp_request->info;
1055
1056        cqp_info->cqp_cmd = OP_CQ_DESTROY;
1057        cqp_info->post_sq = 1;
1058        cqp_info->in.u.cq_destroy.cq = cq;
1059        cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1060        status = i40iw_handle_cqp_op(iwdev, cqp_request);
1061        if (status)
1062                i40iw_pr_err("CQP-OP Destroy QP fail");
1063}
1064
1065/**
1066 * i40iw_destroy_cq - destroy cq
1067 * @ib_cq: cq pointer
1068 */
1069static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1070{
1071        struct i40iw_cq *iwcq;
1072        struct i40iw_device *iwdev;
1073        struct i40iw_sc_cq *cq;
1074
1075        if (!ib_cq) {
1076                i40iw_pr_err("ib_cq == NULL\n");
1077                return 0;
1078        }
1079
1080        iwcq = to_iwcq(ib_cq);
1081        iwdev = to_iwdev(ib_cq->device);
1082        cq = &iwcq->sc_cq;
1083        cq_wq_destroy(iwdev, cq);
1084        cq_free_resources(iwdev, iwcq);
1085        kfree(iwcq);
1086        return 0;
1087}
1088
1089/**
1090 * i40iw_create_cq - create cq
1091 * @ibdev: device pointer from stack
1092 * @attr: attributes for cq
1093 * @context: user context created during alloc
1094 * @udata: user data
1095 */
1096static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1097                                     const struct ib_cq_init_attr *attr,
1098                                     struct ib_ucontext *context,
1099                                     struct ib_udata *udata)
1100{
1101        struct i40iw_device *iwdev = to_iwdev(ibdev);
1102        struct i40iw_cq *iwcq;
1103        struct i40iw_pbl *iwpbl;
1104        u32 cq_num = 0;
1105        struct i40iw_sc_cq *cq;
1106        struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1107        struct i40iw_cq_init_info info;
1108        enum i40iw_status_code status;
1109        struct i40iw_cqp_request *cqp_request;
1110        struct cqp_commands_info *cqp_info;
1111        struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1112        unsigned long flags;
1113        int err_code;
1114        int entries = attr->cqe;
1115
1116        if (entries > iwdev->max_cqe)
1117                return ERR_PTR(-EINVAL);
1118
1119        iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1120        if (!iwcq)
1121                return ERR_PTR(-ENOMEM);
1122
1123        memset(&info, 0, sizeof(info));
1124
1125        err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1126                                        iwdev->max_cq, &cq_num,
1127                                        &iwdev->next_cq);
1128        if (err_code)
1129                goto error;
1130
1131        cq = &iwcq->sc_cq;
1132        cq->back_cq = (void *)iwcq;
1133        spin_lock_init(&iwcq->lock);
1134
1135        info.dev = dev;
1136        ukinfo->cq_size = max(entries, 4);
1137        ukinfo->cq_id = cq_num;
1138        iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1139        info.ceqe_mask = 0;
1140        info.ceq_id = 0;
1141        info.ceq_id_valid = true;
1142        info.ceqe_mask = 1;
1143        info.type = I40IW_CQ_TYPE_IWARP;
1144        if (context) {
1145                struct i40iw_ucontext *ucontext;
1146                struct i40iw_create_cq_req req;
1147                struct i40iw_cq_mr *cqmr;
1148
1149                memset(&req, 0, sizeof(req));
1150                iwcq->user_mode = true;
1151                ucontext = to_ucontext(context);
1152                if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req)))
1153                        goto cq_free_resources;
1154
1155                spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1156                iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1157                                      &ucontext->cq_reg_mem_list);
1158                spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1159                if (!iwpbl) {
1160                        err_code = -EPROTO;
1161                        goto cq_free_resources;
1162                }
1163
1164                iwcq->iwpbl = iwpbl;
1165                iwcq->cq_mem_size = 0;
1166                cqmr = &iwpbl->cq_mr;
1167                info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1168                if (iwpbl->pbl_allocated) {
1169                        info.virtual_map = true;
1170                        info.pbl_chunk_size = 1;
1171                        info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1172                } else {
1173                        info.cq_base_pa = cqmr->cq_pbl.addr;
1174                }
1175        } else {
1176                /* Kmode allocations */
1177                int rsize;
1178                int shadow;
1179
1180                rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1181                rsize = round_up(rsize, 256);
1182                shadow = I40IW_SHADOW_AREA_SIZE << 3;
1183                status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1184                                                rsize + shadow, 256);
1185                if (status) {
1186                        err_code = -ENOMEM;
1187                        goto cq_free_resources;
1188                }
1189                ukinfo->cq_base = iwcq->kmem.va;
1190                info.cq_base_pa = iwcq->kmem.pa;
1191                info.shadow_area_pa = info.cq_base_pa + rsize;
1192                ukinfo->shadow_area = iwcq->kmem.va + rsize;
1193        }
1194
1195        if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1196                i40iw_pr_err("init cq fail\n");
1197                err_code = -EPROTO;
1198                goto cq_free_resources;
1199        }
1200
1201        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1202        if (!cqp_request) {
1203                err_code = -ENOMEM;
1204                goto cq_free_resources;
1205        }
1206
1207        cqp_info = &cqp_request->info;
1208        cqp_info->cqp_cmd = OP_CQ_CREATE;
1209        cqp_info->post_sq = 1;
1210        cqp_info->in.u.cq_create.cq = cq;
1211        cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1212        status = i40iw_handle_cqp_op(iwdev, cqp_request);
1213        if (status) {
1214                i40iw_pr_err("CQP-OP Create QP fail");
1215                err_code = -EPROTO;
1216                goto cq_free_resources;
1217        }
1218
1219        if (context) {
1220                struct i40iw_create_cq_resp resp;
1221
1222                memset(&resp, 0, sizeof(resp));
1223                resp.cq_id = info.cq_uk_init_info.cq_id;
1224                resp.cq_size = info.cq_uk_init_info.cq_size;
1225                if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1226                        i40iw_pr_err("copy to user data\n");
1227                        err_code = -EPROTO;
1228                        goto cq_destroy;
1229                }
1230        }
1231
1232        return (struct ib_cq *)iwcq;
1233
1234cq_destroy:
1235        cq_wq_destroy(iwdev, cq);
1236cq_free_resources:
1237        cq_free_resources(iwdev, iwcq);
1238error:
1239        kfree(iwcq);
1240        return ERR_PTR(err_code);
1241}
1242
1243/**
1244 * i40iw_get_user_access - get hw access from IB access
1245 * @acc: IB access to return hw access
1246 */
1247static inline u16 i40iw_get_user_access(int acc)
1248{
1249        u16 access = 0;
1250
1251        access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1252        access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1253        access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1254        access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1255        return access;
1256}
1257
1258/**
1259 * i40iw_free_stag - free stag resource
1260 * @iwdev: iwarp device
1261 * @stag: stag to free
1262 */
1263static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1264{
1265        u32 stag_idx;
1266
1267        stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1268        i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1269}
1270
1271/**
1272 * i40iw_create_stag - create random stag
1273 * @iwdev: iwarp device
1274 */
1275static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1276{
1277        u32 stag = 0;
1278        u32 stag_index = 0;
1279        u32 next_stag_index;
1280        u32 driver_key;
1281        u32 random;
1282        u8 consumer_key;
1283        int ret;
1284
1285        get_random_bytes(&random, sizeof(random));
1286        consumer_key = (u8)random;
1287
1288        driver_key = random & ~iwdev->mr_stagmask;
1289        next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1290        next_stag_index %= iwdev->max_mr;
1291
1292        ret = i40iw_alloc_resource(iwdev,
1293                                   iwdev->allocated_mrs, iwdev->max_mr,
1294                                   &stag_index, &next_stag_index);
1295        if (!ret) {
1296                stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1297                stag |= driver_key;
1298                stag += (u32)consumer_key;
1299        }
1300        return stag;
1301}
1302
1303/**
1304 * i40iw_next_pbl_addr - Get next pbl address
1305 * @palloc: Poiner to allocated pbles
1306 * @pbl: pointer to a pble
1307 * @pinfo: info pointer
1308 * @idx: index
1309 */
1310static inline u64 *i40iw_next_pbl_addr(struct i40iw_pble_alloc *palloc,
1311                                       u64 *pbl,
1312                                       struct i40iw_pble_info **pinfo,
1313                                       u32 *idx)
1314{
1315        *idx += 1;
1316        if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1317                return ++pbl;
1318        *idx = 0;
1319        (*pinfo)++;
1320        return (u64 *)(*pinfo)->addr;
1321}
1322
1323/**
1324 * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1325 * @iwmr: iwmr for IB's user page addresses
1326 * @pbl: ple pointer to save 1 level or 0 level pble
1327 * @level: indicated level 0, 1 or 2
1328 */
1329static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1330                                    u64 *pbl,
1331                                    enum i40iw_pble_level level)
1332{
1333        struct ib_umem *region = iwmr->region;
1334        struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1335        int chunk_pages, entry, pg_shift, i;
1336        struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1337        struct i40iw_pble_info *pinfo;
1338        struct scatterlist *sg;
1339        u32 idx = 0;
1340
1341        pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1342        pg_shift = ffs(region->page_size) - 1;
1343        for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1344                chunk_pages = sg_dma_len(sg) >> pg_shift;
1345                if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1346                    !iwpbl->qp_mr.sq_page)
1347                        iwpbl->qp_mr.sq_page = sg_page(sg);
1348                for (i = 0; i < chunk_pages; i++) {
1349                        *pbl = cpu_to_le64(sg_dma_address(sg) + region->page_size * i);
1350                        pbl = i40iw_next_pbl_addr(palloc, pbl, &pinfo, &idx);
1351                }
1352        }
1353}
1354
1355/**
1356 * i40iw_setup_pbles - copy user pg address to pble's
1357 * @iwdev: iwarp device
1358 * @iwmr: mr pointer for this memory registration
1359 * @use_pbles: flag if to use pble's or memory (level 0)
1360 */
1361static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1362                             struct i40iw_mr *iwmr,
1363                             bool use_pbles)
1364{
1365        struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1366        struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1367        struct i40iw_pble_info *pinfo;
1368        u64 *pbl;
1369        enum i40iw_status_code status;
1370        enum i40iw_pble_level level = I40IW_LEVEL_1;
1371
1372        if (!use_pbles && (iwmr->page_cnt > MAX_SAVE_PAGE_ADDRS))
1373                return -ENOMEM;
1374
1375        if (use_pbles) {
1376                mutex_lock(&iwdev->pbl_mutex);
1377                status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1378                mutex_unlock(&iwdev->pbl_mutex);
1379                if (status)
1380                        return -ENOMEM;
1381
1382                iwpbl->pbl_allocated = true;
1383                level = palloc->level;
1384                pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1385                pbl = (u64 *)pinfo->addr;
1386        } else {
1387                pbl = iwmr->pgaddrmem;
1388        }
1389
1390        i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1391        return 0;
1392}
1393
1394/**
1395 * i40iw_handle_q_mem - handle memory for qp and cq
1396 * @iwdev: iwarp device
1397 * @req: information for q memory management
1398 * @iwpbl: pble struct
1399 * @use_pbles: flag to use pble
1400 */
1401static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1402                              struct i40iw_mem_reg_req *req,
1403                              struct i40iw_pbl *iwpbl,
1404                              bool use_pbles)
1405{
1406        struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1407        struct i40iw_mr *iwmr = iwpbl->iwmr;
1408        struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1409        struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1410        struct i40iw_hmc_pble *hmc_p;
1411        u64 *arr = iwmr->pgaddrmem;
1412        int err;
1413        int total;
1414
1415        total = req->sq_pages + req->rq_pages + req->cq_pages;
1416
1417        err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1418        if (err)
1419                return err;
1420        if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1421                i40iw_free_pble(iwdev->pble_rsrc, palloc);
1422                iwpbl->pbl_allocated = false;
1423                return -ENOMEM;
1424        }
1425
1426        if (use_pbles)
1427                arr = (u64 *)palloc->level1.addr;
1428        if (req->reg_type == IW_MEMREG_TYPE_QP) {
1429                hmc_p = &qpmr->sq_pbl;
1430                qpmr->shadow = (dma_addr_t)arr[total];
1431                if (use_pbles) {
1432                        hmc_p->idx = palloc->level1.idx;
1433                        hmc_p = &qpmr->rq_pbl;
1434                        hmc_p->idx = palloc->level1.idx + req->sq_pages;
1435                } else {
1436                        hmc_p->addr = arr[0];
1437                        hmc_p = &qpmr->rq_pbl;
1438                        hmc_p->addr = arr[1];
1439                }
1440        } else {                /* CQ */
1441                hmc_p = &cqmr->cq_pbl;
1442                cqmr->shadow = (dma_addr_t)arr[total];
1443                if (use_pbles)
1444                        hmc_p->idx = palloc->level1.idx;
1445                else
1446                        hmc_p->addr = arr[0];
1447        }
1448        return err;
1449}
1450
1451/**
1452 * i40iw_hw_alloc_stag - cqp command to allocate stag
1453 * @iwdev: iwarp device
1454 * @iwmr: iwarp mr pointer
1455 */
1456static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1457{
1458        struct i40iw_allocate_stag_info *info;
1459        struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1460        enum i40iw_status_code status;
1461        int err = 0;
1462        struct i40iw_cqp_request *cqp_request;
1463        struct cqp_commands_info *cqp_info;
1464
1465        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1466        if (!cqp_request)
1467                return -ENOMEM;
1468
1469        cqp_info = &cqp_request->info;
1470        info = &cqp_info->in.u.alloc_stag.info;
1471        memset(info, 0, sizeof(*info));
1472        info->page_size = PAGE_SIZE;
1473        info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1474        info->pd_id = iwpd->sc_pd.pd_id;
1475        info->total_len = iwmr->length;
1476        info->remote_access = true;
1477        cqp_info->cqp_cmd = OP_ALLOC_STAG;
1478        cqp_info->post_sq = 1;
1479        cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1480        cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1481
1482        status = i40iw_handle_cqp_op(iwdev, cqp_request);
1483        if (status) {
1484                err = -ENOMEM;
1485                i40iw_pr_err("CQP-OP MR Reg fail");
1486        }
1487        return err;
1488}
1489
1490/**
1491 * i40iw_alloc_mr - register stag for fast memory registration
1492 * @pd: ibpd pointer
1493 * @mr_type: memory for stag registrion
1494 * @max_num_sg: man number of pages
1495 */
1496static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1497                                    enum ib_mr_type mr_type,
1498                                    u32 max_num_sg)
1499{
1500        struct i40iw_pd *iwpd = to_iwpd(pd);
1501        struct i40iw_device *iwdev = to_iwdev(pd->device);
1502        struct i40iw_pble_alloc *palloc;
1503        struct i40iw_pbl *iwpbl;
1504        struct i40iw_mr *iwmr;
1505        enum i40iw_status_code status;
1506        u32 stag;
1507        int err_code = -ENOMEM;
1508
1509        iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1510        if (!iwmr)
1511                return ERR_PTR(-ENOMEM);
1512
1513        stag = i40iw_create_stag(iwdev);
1514        if (!stag) {
1515                err_code = -EOVERFLOW;
1516                goto err;
1517        }
1518        iwmr->stag = stag;
1519        iwmr->ibmr.rkey = stag;
1520        iwmr->ibmr.lkey = stag;
1521        iwmr->ibmr.pd = pd;
1522        iwmr->ibmr.device = pd->device;
1523        iwpbl = &iwmr->iwpbl;
1524        iwpbl->iwmr = iwmr;
1525        iwmr->type = IW_MEMREG_TYPE_MEM;
1526        palloc = &iwpbl->pble_alloc;
1527        iwmr->page_cnt = max_num_sg;
1528        mutex_lock(&iwdev->pbl_mutex);
1529        status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1530        mutex_unlock(&iwdev->pbl_mutex);
1531        if (status)
1532                goto err1;
1533
1534        if (palloc->level != I40IW_LEVEL_1)
1535                goto err2;
1536        err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1537        if (err_code)
1538                goto err2;
1539        iwpbl->pbl_allocated = true;
1540        i40iw_add_pdusecount(iwpd);
1541        return &iwmr->ibmr;
1542err2:
1543        i40iw_free_pble(iwdev->pble_rsrc, palloc);
1544err1:
1545        i40iw_free_stag(iwdev, stag);
1546err:
1547        kfree(iwmr);
1548        return ERR_PTR(err_code);
1549}
1550
1551/**
1552 * i40iw_set_page - populate pbl list for fmr
1553 * @ibmr: ib mem to access iwarp mr pointer
1554 * @addr: page dma address fro pbl list
1555 */
1556static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1557{
1558        struct i40iw_mr *iwmr = to_iwmr(ibmr);
1559        struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1560        struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1561        u64 *pbl;
1562
1563        if (unlikely(iwmr->npages == iwmr->page_cnt))
1564                return -ENOMEM;
1565
1566        pbl = (u64 *)palloc->level1.addr;
1567        pbl[iwmr->npages++] = cpu_to_le64(addr);
1568        return 0;
1569}
1570
1571/**
1572 * i40iw_map_mr_sg - map of sg list for fmr
1573 * @ibmr: ib mem to access iwarp mr pointer
1574 * @sg: scatter gather list for fmr
1575 * @sg_nents: number of sg pages
1576 */
1577static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1578                           int sg_nents, unsigned int *sg_offset)
1579{
1580        struct i40iw_mr *iwmr = to_iwmr(ibmr);
1581
1582        iwmr->npages = 0;
1583        return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1584}
1585
1586/**
1587 * i40iw_drain_sq - drain the send queue
1588 * @ibqp: ib qp pointer
1589 */
1590static void i40iw_drain_sq(struct ib_qp *ibqp)
1591{
1592        struct i40iw_qp *iwqp = to_iwqp(ibqp);
1593        struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1594
1595        if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1596                wait_for_completion(&iwqp->sq_drained);
1597}
1598
1599/**
1600 * i40iw_drain_rq - drain the receive queue
1601 * @ibqp: ib qp pointer
1602 */
1603static void i40iw_drain_rq(struct ib_qp *ibqp)
1604{
1605        struct i40iw_qp *iwqp = to_iwqp(ibqp);
1606        struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1607
1608        if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1609                wait_for_completion(&iwqp->rq_drained);
1610}
1611
1612/**
1613 * i40iw_hwreg_mr - send cqp command for memory registration
1614 * @iwdev: iwarp device
1615 * @iwmr: iwarp mr pointer
1616 * @access: access for MR
1617 */
1618static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1619                          struct i40iw_mr *iwmr,
1620                          u16 access)
1621{
1622        struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1623        struct i40iw_reg_ns_stag_info *stag_info;
1624        struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1625        struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1626        enum i40iw_status_code status;
1627        int err = 0;
1628        struct i40iw_cqp_request *cqp_request;
1629        struct cqp_commands_info *cqp_info;
1630
1631        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1632        if (!cqp_request)
1633                return -ENOMEM;
1634
1635        cqp_info = &cqp_request->info;
1636        stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1637        memset(stag_info, 0, sizeof(*stag_info));
1638        stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1639        stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1640        stag_info->stag_key = (u8)iwmr->stag;
1641        stag_info->total_len = iwmr->length;
1642        stag_info->access_rights = access;
1643        stag_info->pd_id = iwpd->sc_pd.pd_id;
1644        stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1645
1646        if (iwmr->page_cnt > 1) {
1647                if (palloc->level == I40IW_LEVEL_1) {
1648                        stag_info->first_pm_pbl_index = palloc->level1.idx;
1649                        stag_info->chunk_size = 1;
1650                } else {
1651                        stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1652                        stag_info->chunk_size = 3;
1653                }
1654        } else {
1655                stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1656        }
1657
1658        cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1659        cqp_info->post_sq = 1;
1660        cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1661        cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1662
1663        status = i40iw_handle_cqp_op(iwdev, cqp_request);
1664        if (status) {
1665                err = -ENOMEM;
1666                i40iw_pr_err("CQP-OP MR Reg fail");
1667        }
1668        return err;
1669}
1670
1671/**
1672 * i40iw_reg_user_mr - Register a user memory region
1673 * @pd: ptr of pd
1674 * @start: virtual start address
1675 * @length: length of mr
1676 * @virt: virtual address
1677 * @acc: access of mr
1678 * @udata: user data
1679 */
1680static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1681                                       u64 start,
1682                                       u64 length,
1683                                       u64 virt,
1684                                       int acc,
1685                                       struct ib_udata *udata)
1686{
1687        struct i40iw_pd *iwpd = to_iwpd(pd);
1688        struct i40iw_device *iwdev = to_iwdev(pd->device);
1689        struct i40iw_ucontext *ucontext;
1690        struct i40iw_pble_alloc *palloc;
1691        struct i40iw_pbl *iwpbl;
1692        struct i40iw_mr *iwmr;
1693        struct ib_umem *region;
1694        struct i40iw_mem_reg_req req;
1695        u64 pbl_depth = 0;
1696        u32 stag = 0;
1697        u16 access;
1698        u64 region_length;
1699        bool use_pbles = false;
1700        unsigned long flags;
1701        int err = -ENOSYS;
1702
1703        if (length > I40IW_MAX_MR_SIZE)
1704                return ERR_PTR(-EINVAL);
1705        region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1706        if (IS_ERR(region))
1707                return (struct ib_mr *)region;
1708
1709        if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1710                ib_umem_release(region);
1711                return ERR_PTR(-EFAULT);
1712        }
1713
1714        iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1715        if (!iwmr) {
1716                ib_umem_release(region);
1717                return ERR_PTR(-ENOMEM);
1718        }
1719
1720        iwpbl = &iwmr->iwpbl;
1721        iwpbl->iwmr = iwmr;
1722        iwmr->region = region;
1723        iwmr->ibmr.pd = pd;
1724        iwmr->ibmr.device = pd->device;
1725        ucontext = to_ucontext(pd->uobject->context);
1726        region_length = region->length + (start & 0xfff);
1727        pbl_depth = region_length >> 12;
1728        pbl_depth += (region_length & (4096 - 1)) ? 1 : 0;
1729        iwmr->length = region->length;
1730
1731        iwpbl->user_base = virt;
1732        palloc = &iwpbl->pble_alloc;
1733
1734        iwmr->type = req.reg_type;
1735        iwmr->page_cnt = (u32)pbl_depth;
1736
1737        switch (req.reg_type) {
1738        case IW_MEMREG_TYPE_QP:
1739                use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1740                err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1741                if (err)
1742                        goto error;
1743                spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1744                list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1745                spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1746                break;
1747        case IW_MEMREG_TYPE_CQ:
1748                use_pbles = (req.cq_pages > 1);
1749                err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1750                if (err)
1751                        goto error;
1752
1753                spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1754                list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1755                spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1756                break;
1757        case IW_MEMREG_TYPE_MEM:
1758                access = I40IW_ACCESS_FLAGS_LOCALREAD;
1759
1760                use_pbles = (iwmr->page_cnt != 1);
1761                err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1762                if (err)
1763                        goto error;
1764
1765                access |= i40iw_get_user_access(acc);
1766                stag = i40iw_create_stag(iwdev);
1767                if (!stag) {
1768                        err = -ENOMEM;
1769                        goto error;
1770                }
1771
1772                iwmr->stag = stag;
1773                iwmr->ibmr.rkey = stag;
1774                iwmr->ibmr.lkey = stag;
1775
1776                err = i40iw_hwreg_mr(iwdev, iwmr, access);
1777                if (err) {
1778                        i40iw_free_stag(iwdev, stag);
1779                        goto error;
1780                }
1781                break;
1782        default:
1783                goto error;
1784        }
1785
1786        iwmr->type = req.reg_type;
1787        if (req.reg_type == IW_MEMREG_TYPE_MEM)
1788                i40iw_add_pdusecount(iwpd);
1789        return &iwmr->ibmr;
1790
1791error:
1792        if (palloc->level != I40IW_LEVEL_0)
1793                i40iw_free_pble(iwdev->pble_rsrc, palloc);
1794        ib_umem_release(region);
1795        kfree(iwmr);
1796        return ERR_PTR(err);
1797}
1798
1799/**
1800 * i40iw_reg_phys_mr - register kernel physical memory
1801 * @pd: ibpd pointer
1802 * @addr: physical address of memory to register
1803 * @size: size of memory to register
1804 * @acc: Access rights
1805 * @iova_start: start of virtual address for physical buffers
1806 */
1807struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1808                                u64 addr,
1809                                u64 size,
1810                                int acc,
1811                                u64 *iova_start)
1812{
1813        struct i40iw_pd *iwpd = to_iwpd(pd);
1814        struct i40iw_device *iwdev = to_iwdev(pd->device);
1815        struct i40iw_pbl *iwpbl;
1816        struct i40iw_mr *iwmr;
1817        enum i40iw_status_code status;
1818        u32 stag;
1819        u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1820        int ret;
1821
1822        iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1823        if (!iwmr)
1824                return ERR_PTR(-ENOMEM);
1825        iwmr->ibmr.pd = pd;
1826        iwmr->ibmr.device = pd->device;
1827        iwpbl = &iwmr->iwpbl;
1828        iwpbl->iwmr = iwmr;
1829        iwmr->type = IW_MEMREG_TYPE_MEM;
1830        iwpbl->user_base = *iova_start;
1831        stag = i40iw_create_stag(iwdev);
1832        if (!stag) {
1833                ret = -EOVERFLOW;
1834                goto err;
1835        }
1836        access |= i40iw_get_user_access(acc);
1837        iwmr->stag = stag;
1838        iwmr->ibmr.rkey = stag;
1839        iwmr->ibmr.lkey = stag;
1840        iwmr->page_cnt = 1;
1841        iwmr->pgaddrmem[0]  = addr;
1842        iwmr->length = size;
1843        status = i40iw_hwreg_mr(iwdev, iwmr, access);
1844        if (status) {
1845                i40iw_free_stag(iwdev, stag);
1846                ret = -ENOMEM;
1847                goto err;
1848        }
1849
1850        i40iw_add_pdusecount(iwpd);
1851        return &iwmr->ibmr;
1852 err:
1853        kfree(iwmr);
1854        return ERR_PTR(ret);
1855}
1856
1857/**
1858 * i40iw_get_dma_mr - register physical mem
1859 * @pd: ptr of pd
1860 * @acc: access for memory
1861 */
1862static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
1863{
1864        u64 kva = 0;
1865
1866        return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
1867}
1868
1869/**
1870 * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
1871 * @iwmr: iwmr for IB's user page addresses
1872 * @ucontext: ptr to user context
1873 */
1874static void i40iw_del_memlist(struct i40iw_mr *iwmr,
1875                              struct i40iw_ucontext *ucontext)
1876{
1877        struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1878        unsigned long flags;
1879
1880        switch (iwmr->type) {
1881        case IW_MEMREG_TYPE_CQ:
1882                spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1883                if (!list_empty(&ucontext->cq_reg_mem_list))
1884                        list_del(&iwpbl->list);
1885                spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1886                break;
1887        case IW_MEMREG_TYPE_QP:
1888                spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1889                if (!list_empty(&ucontext->qp_reg_mem_list))
1890                        list_del(&iwpbl->list);
1891                spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1892                break;
1893        default:
1894                break;
1895        }
1896}
1897
1898/**
1899 * i40iw_dereg_mr - deregister mr
1900 * @ib_mr: mr ptr for dereg
1901 */
1902static int i40iw_dereg_mr(struct ib_mr *ib_mr)
1903{
1904        struct ib_pd *ibpd = ib_mr->pd;
1905        struct i40iw_pd *iwpd = to_iwpd(ibpd);
1906        struct i40iw_mr *iwmr = to_iwmr(ib_mr);
1907        struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
1908        enum i40iw_status_code status;
1909        struct i40iw_dealloc_stag_info *info;
1910        struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1911        struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1912        struct i40iw_cqp_request *cqp_request;
1913        struct cqp_commands_info *cqp_info;
1914        u32 stag_idx;
1915
1916        if (iwmr->region)
1917                ib_umem_release(iwmr->region);
1918
1919        if (iwmr->type != IW_MEMREG_TYPE_MEM) {
1920                if (ibpd->uobject) {
1921                        struct i40iw_ucontext *ucontext;
1922
1923                        ucontext = to_ucontext(ibpd->uobject->context);
1924                        i40iw_del_memlist(iwmr, ucontext);
1925                }
1926                if (iwpbl->pbl_allocated)
1927                        i40iw_free_pble(iwdev->pble_rsrc, palloc);
1928                kfree(iwmr);
1929                return 0;
1930        }
1931
1932        cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1933        if (!cqp_request)
1934                return -ENOMEM;
1935
1936        cqp_info = &cqp_request->info;
1937        info = &cqp_info->in.u.dealloc_stag.info;
1938        memset(info, 0, sizeof(*info));
1939
1940        info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
1941        info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
1942        stag_idx = info->stag_idx;
1943        info->mr = true;
1944        if (iwpbl->pbl_allocated)
1945                info->dealloc_pbl = true;
1946
1947        cqp_info->cqp_cmd = OP_DEALLOC_STAG;
1948        cqp_info->post_sq = 1;
1949        cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
1950        cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
1951        status = i40iw_handle_cqp_op(iwdev, cqp_request);
1952        if (status)
1953                i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
1954        i40iw_rem_pdusecount(iwpd, iwdev);
1955        i40iw_free_stag(iwdev, iwmr->stag);
1956        if (iwpbl->pbl_allocated)
1957                i40iw_free_pble(iwdev->pble_rsrc, palloc);
1958        kfree(iwmr);
1959        return 0;
1960}
1961
1962/**
1963 * i40iw_show_rev
1964 */
1965static ssize_t i40iw_show_rev(struct device *dev,
1966                              struct device_attribute *attr, char *buf)
1967{
1968        struct i40iw_ib_device *iwibdev = container_of(dev,
1969                                                       struct i40iw_ib_device,
1970                                                       ibdev.dev);
1971        u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
1972
1973        return sprintf(buf, "%x\n", hw_rev);
1974}
1975
1976/**
1977 * i40iw_show_hca
1978 */
1979static ssize_t i40iw_show_hca(struct device *dev,
1980                              struct device_attribute *attr, char *buf)
1981{
1982        return sprintf(buf, "I40IW\n");
1983}
1984
1985/**
1986 * i40iw_show_board
1987 */
1988static ssize_t i40iw_show_board(struct device *dev,
1989                                struct device_attribute *attr,
1990                                char *buf)
1991{
1992        return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
1993}
1994
1995static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
1996static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
1997static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
1998
1999static struct device_attribute *i40iw_dev_attributes[] = {
2000        &dev_attr_hw_rev,
2001        &dev_attr_hca_type,
2002        &dev_attr_board_id
2003};
2004
2005/**
2006 * i40iw_copy_sg_list - copy sg list for qp
2007 * @sg_list: copied into sg_list
2008 * @sgl: copy from sgl
2009 * @num_sges: count of sg entries
2010 */
2011static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2012{
2013        unsigned int i;
2014
2015        for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2016                sg_list[i].tag_off = sgl[i].addr;
2017                sg_list[i].len = sgl[i].length;
2018                sg_list[i].stag = sgl[i].lkey;
2019        }
2020}
2021
2022/**
2023 * i40iw_post_send -  kernel application wr
2024 * @ibqp: qp ptr for wr
2025 * @ib_wr: work request ptr
2026 * @bad_wr: return of bad wr if err
2027 */
2028static int i40iw_post_send(struct ib_qp *ibqp,
2029                           struct ib_send_wr *ib_wr,
2030                           struct ib_send_wr **bad_wr)
2031{
2032        struct i40iw_qp *iwqp;
2033        struct i40iw_qp_uk *ukqp;
2034        struct i40iw_post_sq_info info;
2035        enum i40iw_status_code ret;
2036        int err = 0;
2037        unsigned long flags;
2038        bool inv_stag;
2039
2040        iwqp = (struct i40iw_qp *)ibqp;
2041        ukqp = &iwqp->sc_qp.qp_uk;
2042
2043        spin_lock_irqsave(&iwqp->lock, flags);
2044        while (ib_wr) {
2045                inv_stag = false;
2046                memset(&info, 0, sizeof(info));
2047                info.wr_id = (u64)(ib_wr->wr_id);
2048                if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2049                        info.signaled = true;
2050                if (ib_wr->send_flags & IB_SEND_FENCE)
2051                        info.read_fence = true;
2052
2053                switch (ib_wr->opcode) {
2054                case IB_WR_SEND:
2055                        /* fall-through */
2056                case IB_WR_SEND_WITH_INV:
2057                        if (ib_wr->opcode == IB_WR_SEND) {
2058                                if (ib_wr->send_flags & IB_SEND_SOLICITED)
2059                                        info.op_type = I40IW_OP_TYPE_SEND_SOL;
2060                                else
2061                                        info.op_type = I40IW_OP_TYPE_SEND;
2062                        } else {
2063                                if (ib_wr->send_flags & IB_SEND_SOLICITED)
2064                                        info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2065                                else
2066                                        info.op_type = I40IW_OP_TYPE_SEND_INV;
2067                        }
2068
2069                        if (ib_wr->send_flags & IB_SEND_INLINE) {
2070                                info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2071                                info.op.inline_send.len = ib_wr->sg_list[0].length;
2072                                ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2073                        } else {
2074                                info.op.send.num_sges = ib_wr->num_sge;
2075                                info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2076                                ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2077                        }
2078
2079                        if (ret) {
2080                                if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2081                                        err = -ENOMEM;
2082                                else
2083                                        err = -EINVAL;
2084                        }
2085                        break;
2086                case IB_WR_RDMA_WRITE:
2087                        info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2088
2089                        if (ib_wr->send_flags & IB_SEND_INLINE) {
2090                                info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2091                                info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2092                                info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2093                                info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2094                                info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2095                                ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2096                        } else {
2097                                info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2098                                info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2099                                info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2100                                info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2101                                info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2102                                ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2103                        }
2104
2105                        if (ret) {
2106                                if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2107                                        err = -ENOMEM;
2108                                else
2109                                        err = -EINVAL;
2110                        }
2111                        break;
2112                case IB_WR_RDMA_READ_WITH_INV:
2113                        inv_stag = true;
2114                        /* fall-through*/
2115                case IB_WR_RDMA_READ:
2116                        if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2117                                err = -EINVAL;
2118                                break;
2119                        }
2120                        info.op_type = I40IW_OP_TYPE_RDMA_READ;
2121                        info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2122                        info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2123                        info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2124                        info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2125                        info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2126                        info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2127                        ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2128                        if (ret) {
2129                                if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2130                                        err = -ENOMEM;
2131                                else
2132                                        err = -EINVAL;
2133                        }
2134                        break;
2135                case IB_WR_LOCAL_INV:
2136                        info.op_type = I40IW_OP_TYPE_INV_STAG;
2137                        info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2138                        ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2139                        if (ret)
2140                                err = -ENOMEM;
2141                        break;
2142                case IB_WR_REG_MR:
2143                {
2144                        struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2145                        int page_shift = ilog2(reg_wr(ib_wr)->mr->page_size);
2146                        int flags = reg_wr(ib_wr)->access;
2147                        struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2148                        struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2149                        struct i40iw_fast_reg_stag_info info;
2150
2151                        memset(&info, 0, sizeof(info));
2152                        info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2153                        info.access_rights |= i40iw_get_user_access(flags);
2154                        info.stag_key = reg_wr(ib_wr)->key & 0xff;
2155                        info.stag_idx = reg_wr(ib_wr)->key >> 8;
2156                        info.wr_id = ib_wr->wr_id;
2157
2158                        info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2159                        info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2160                        info.total_len = iwmr->ibmr.length;
2161                        info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2162                        info.first_pm_pbl_index = palloc->level1.idx;
2163                        info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2164                        info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2165
2166                        if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2167                                info.chunk_size = 1;
2168
2169                        if (page_shift == 21)
2170                                info.page_size = 1; /* 2M page */
2171
2172                        ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2173                        if (ret)
2174                                err = -ENOMEM;
2175                        break;
2176                }
2177                default:
2178                        err = -EINVAL;
2179                        i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2180                                     ib_wr->opcode);
2181                        break;
2182                }
2183
2184                if (err)
2185                        break;
2186                ib_wr = ib_wr->next;
2187        }
2188
2189        if (err)
2190                *bad_wr = ib_wr;
2191        else
2192                ukqp->ops.iw_qp_post_wr(ukqp);
2193        spin_unlock_irqrestore(&iwqp->lock, flags);
2194
2195        return err;
2196}
2197
2198/**
2199 * i40iw_post_recv - post receive wr for kernel application
2200 * @ibqp: ib qp pointer
2201 * @ib_wr: work request for receive
2202 * @bad_wr: bad wr caused an error
2203 */
2204static int i40iw_post_recv(struct ib_qp *ibqp,
2205                           struct ib_recv_wr *ib_wr,
2206                           struct ib_recv_wr **bad_wr)
2207{
2208        struct i40iw_qp *iwqp;
2209        struct i40iw_qp_uk *ukqp;
2210        struct i40iw_post_rq_info post_recv;
2211        struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2212        enum i40iw_status_code ret = 0;
2213        unsigned long flags;
2214        int err = 0;
2215
2216        iwqp = (struct i40iw_qp *)ibqp;
2217        ukqp = &iwqp->sc_qp.qp_uk;
2218
2219        memset(&post_recv, 0, sizeof(post_recv));
2220        spin_lock_irqsave(&iwqp->lock, flags);
2221        while (ib_wr) {
2222                post_recv.num_sges = ib_wr->num_sge;
2223                post_recv.wr_id = ib_wr->wr_id;
2224                i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2225                post_recv.sg_list = sg_list;
2226                ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2227                if (ret) {
2228                        i40iw_pr_err(" post_recv err %d\n", ret);
2229                        if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2230                                err = -ENOMEM;
2231                        else
2232                                err = -EINVAL;
2233                        *bad_wr = ib_wr;
2234                        goto out;
2235                }
2236                ib_wr = ib_wr->next;
2237        }
2238 out:
2239        spin_unlock_irqrestore(&iwqp->lock, flags);
2240        return err;
2241}
2242
2243/**
2244 * i40iw_poll_cq - poll cq for completion (kernel apps)
2245 * @ibcq: cq to poll
2246 * @num_entries: number of entries to poll
2247 * @entry: wr of entry completed
2248 */
2249static int i40iw_poll_cq(struct ib_cq *ibcq,
2250                         int num_entries,
2251                         struct ib_wc *entry)
2252{
2253        struct i40iw_cq *iwcq;
2254        int cqe_count = 0;
2255        struct i40iw_cq_poll_info cq_poll_info;
2256        enum i40iw_status_code ret;
2257        struct i40iw_cq_uk *ukcq;
2258        struct i40iw_sc_qp *qp;
2259        struct i40iw_qp *iwqp;
2260        unsigned long flags;
2261
2262        iwcq = (struct i40iw_cq *)ibcq;
2263        ukcq = &iwcq->sc_cq.cq_uk;
2264
2265        spin_lock_irqsave(&iwcq->lock, flags);
2266        while (cqe_count < num_entries) {
2267                ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2268                if (ret == I40IW_ERR_QUEUE_EMPTY) {
2269                        break;
2270                } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2271                        continue;
2272                } else if (ret) {
2273                        if (!cqe_count)
2274                                cqe_count = -1;
2275                        break;
2276                }
2277                entry->wc_flags = 0;
2278                entry->wr_id = cq_poll_info.wr_id;
2279                if (cq_poll_info.error) {
2280                        entry->status = IB_WC_WR_FLUSH_ERR;
2281                        entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2282                } else {
2283                        entry->status = IB_WC_SUCCESS;
2284                }
2285
2286                switch (cq_poll_info.op_type) {
2287                case I40IW_OP_TYPE_RDMA_WRITE:
2288                        entry->opcode = IB_WC_RDMA_WRITE;
2289                        break;
2290                case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2291                case I40IW_OP_TYPE_RDMA_READ:
2292                        entry->opcode = IB_WC_RDMA_READ;
2293                        break;
2294                case I40IW_OP_TYPE_SEND_SOL:
2295                case I40IW_OP_TYPE_SEND_SOL_INV:
2296                case I40IW_OP_TYPE_SEND_INV:
2297                case I40IW_OP_TYPE_SEND:
2298                        entry->opcode = IB_WC_SEND;
2299                        break;
2300                case I40IW_OP_TYPE_REC:
2301                        entry->opcode = IB_WC_RECV;
2302                        break;
2303                default:
2304                        entry->opcode = IB_WC_RECV;
2305                        break;
2306                }
2307
2308                entry->ex.imm_data = 0;
2309                qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2310                entry->qp = (struct ib_qp *)qp->back_qp;
2311                entry->src_qp = cq_poll_info.qp_id;
2312                iwqp = (struct i40iw_qp *)qp->back_qp;
2313                if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2314                        if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2315                                complete(&iwqp->sq_drained);
2316                        if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2317                                complete(&iwqp->rq_drained);
2318                }
2319                entry->byte_len = cq_poll_info.bytes_xfered;
2320                entry++;
2321                cqe_count++;
2322        }
2323        spin_unlock_irqrestore(&iwcq->lock, flags);
2324        return cqe_count;
2325}
2326
2327/**
2328 * i40iw_req_notify_cq - arm cq kernel application
2329 * @ibcq: cq to arm
2330 * @notify_flags: notofication flags
2331 */
2332static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2333                               enum ib_cq_notify_flags notify_flags)
2334{
2335        struct i40iw_cq *iwcq;
2336        struct i40iw_cq_uk *ukcq;
2337        unsigned long flags;
2338        enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2339
2340        iwcq = (struct i40iw_cq *)ibcq;
2341        ukcq = &iwcq->sc_cq.cq_uk;
2342        if (notify_flags == IB_CQ_SOLICITED)
2343                cq_notify = IW_CQ_COMPL_SOLICITED;
2344        spin_lock_irqsave(&iwcq->lock, flags);
2345        ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2346        spin_unlock_irqrestore(&iwcq->lock, flags);
2347        return 0;
2348}
2349
2350/**
2351 * i40iw_port_immutable - return port's immutable data
2352 * @ibdev: ib dev struct
2353 * @port_num: port number
2354 * @immutable: immutable data for the port return
2355 */
2356static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2357                                struct ib_port_immutable *immutable)
2358{
2359        struct ib_port_attr attr;
2360        int err;
2361
2362        err = i40iw_query_port(ibdev, port_num, &attr);
2363
2364        if (err)
2365                return err;
2366
2367        immutable->pkey_tbl_len = attr.pkey_tbl_len;
2368        immutable->gid_tbl_len = attr.gid_tbl_len;
2369        immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2370
2371        return 0;
2372}
2373
2374static const char * const i40iw_hw_stat_names[] = {
2375        // 32bit names
2376        [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2377        [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2378        [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2379        [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2380        [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2381        [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2382        [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2383        [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2384        [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2385        // 64bit names
2386        [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2387                "ip4InOctets",
2388        [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2389                "ip4InPkts",
2390        [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2391                "ip4InReasmRqd",
2392        [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2393                "ip4InMcastPkts",
2394        [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2395                "ip4OutOctets",
2396        [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2397                "ip4OutPkts",
2398        [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2399                "ip4OutSegRqd",
2400        [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2401                "ip4OutMcastPkts",
2402        [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2403                "ip6InOctets",
2404        [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2405                "ip6InPkts",
2406        [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2407                "ip6InReasmRqd",
2408        [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2409                "ip6InMcastPkts",
2410        [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2411                "ip6OutOctets",
2412        [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2413                "ip6OutPkts",
2414        [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2415                "ip6OutSegRqd",
2416        [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2417                "ip6OutMcastPkts",
2418        [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2419                "tcpInSegs",
2420        [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2421                "tcpOutSegs",
2422        [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2423                "iwInRdmaReads",
2424        [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2425                "iwInRdmaSends",
2426        [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2427                "iwInRdmaWrites",
2428        [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2429                "iwOutRdmaReads",
2430        [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2431                "iwOutRdmaSends",
2432        [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2433                "iwOutRdmaWrites",
2434        [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2435                "iwRdmaBnd",
2436        [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2437                "iwRdmaInv"
2438};
2439
2440static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str,
2441                                 size_t str_len)
2442{
2443        u32 firmware_version = I40IW_FW_VERSION;
2444
2445        snprintf(str, str_len, "%u.%u", firmware_version,
2446                       (firmware_version & 0x000000ff));
2447}
2448
2449/**
2450 * i40iw_alloc_hw_stats - Allocate a hw stats structure
2451 * @ibdev: device pointer from stack
2452 * @port_num: port number
2453 */
2454static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2455                                                  u8 port_num)
2456{
2457        struct i40iw_device *iwdev = to_iwdev(ibdev);
2458        struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2459        int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2460                I40IW_HW_STAT_INDEX_MAX_64;
2461        unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2462
2463        BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2464                     (I40IW_HW_STAT_INDEX_MAX_32 +
2465                      I40IW_HW_STAT_INDEX_MAX_64));
2466
2467        /*
2468         * PFs get the default update lifespan, but VFs only update once
2469         * per second
2470         */
2471        if (!dev->is_pf)
2472                lifespan = 1000;
2473        return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2474                                          lifespan);
2475}
2476
2477/**
2478 * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2479 * @ibdev: device pointer from stack
2480 * @stats: stats pointer from stack
2481 * @port_num: port number
2482 * @index: which hw counter the stack is requesting we update
2483 */
2484static int i40iw_get_hw_stats(struct ib_device *ibdev,
2485                              struct rdma_hw_stats *stats,
2486                              u8 port_num, int index)
2487{
2488        struct i40iw_device *iwdev = to_iwdev(ibdev);
2489        struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2490        struct i40iw_dev_pestat *devstat = &dev->dev_pestat;
2491        struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2492        unsigned long flags;
2493
2494        if (dev->is_pf) {
2495                spin_lock_irqsave(&devstat->stats_lock, flags);
2496                devstat->ops.iw_hw_stat_read_all(devstat,
2497                        &devstat->hw_stats);
2498                spin_unlock_irqrestore(&devstat->stats_lock, flags);
2499        } else {
2500                if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2501                        return -ENOSYS;
2502        }
2503
2504        memcpy(&stats->value[0], &hw_stats, sizeof(*hw_stats));
2505
2506        return stats->num_counters;
2507}
2508
2509/**
2510 * i40iw_query_gid - Query port GID
2511 * @ibdev: device pointer from stack
2512 * @port: port number
2513 * @index: Entry index
2514 * @gid: Global ID
2515 */
2516static int i40iw_query_gid(struct ib_device *ibdev,
2517                           u8 port,
2518                           int index,
2519                           union ib_gid *gid)
2520{
2521        struct i40iw_device *iwdev = to_iwdev(ibdev);
2522
2523        memset(gid->raw, 0, sizeof(gid->raw));
2524        ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2525        return 0;
2526}
2527
2528/**
2529 * i40iw_modify_port  Modify port properties
2530 * @ibdev: device pointer from stack
2531 * @port: port number
2532 * @port_modify_mask: mask for port modifications
2533 * @props: port properties
2534 */
2535static int i40iw_modify_port(struct ib_device *ibdev,
2536                             u8 port,
2537                             int port_modify_mask,
2538                             struct ib_port_modify *props)
2539{
2540        return -ENOSYS;
2541}
2542
2543/**
2544 * i40iw_query_pkey - Query partition key
2545 * @ibdev: device pointer from stack
2546 * @port: port number
2547 * @index: index of pkey
2548 * @pkey: pointer to store the pkey
2549 */
2550static int i40iw_query_pkey(struct ib_device *ibdev,
2551                            u8 port,
2552                            u16 index,
2553                            u16 *pkey)
2554{
2555        *pkey = 0;
2556        return 0;
2557}
2558
2559/**
2560 * i40iw_create_ah - create address handle
2561 * @ibpd: ptr of pd
2562 * @ah_attr: address handle attributes
2563 */
2564static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
2565                                     struct ib_ah_attr *attr)
2566{
2567        return ERR_PTR(-ENOSYS);
2568}
2569
2570/**
2571 * i40iw_destroy_ah - Destroy address handle
2572 * @ah: pointer to address handle
2573 */
2574static int i40iw_destroy_ah(struct ib_ah *ah)
2575{
2576        return -ENOSYS;
2577}
2578
2579/**
2580 * i40iw_init_rdma_device - initialization of iwarp device
2581 * @iwdev: iwarp device
2582 */
2583static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2584{
2585        struct i40iw_ib_device *iwibdev;
2586        struct net_device *netdev = iwdev->netdev;
2587        struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2588
2589        iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2590        if (!iwibdev) {
2591                i40iw_pr_err("iwdev == NULL\n");
2592                return NULL;
2593        }
2594        strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2595        iwibdev->ibdev.owner = THIS_MODULE;
2596        iwdev->iwibdev = iwibdev;
2597        iwibdev->iwdev = iwdev;
2598
2599        iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2600        ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2601
2602        iwibdev->ibdev.uverbs_cmd_mask =
2603            (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2604            (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2605            (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2606            (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2607            (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2608            (1ull << IB_USER_VERBS_CMD_REG_MR) |
2609            (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2610            (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2611            (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2612            (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2613            (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2614            (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2615            (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2616            (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2617            (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2618            (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2619            (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2620            (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2621            (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2622            (1ull << IB_USER_VERBS_CMD_POST_SEND);
2623        iwibdev->ibdev.phys_port_cnt = 1;
2624        iwibdev->ibdev.num_comp_vectors = 1;
2625        iwibdev->ibdev.dma_device = &pcidev->dev;
2626        iwibdev->ibdev.dev.parent = &pcidev->dev;
2627        iwibdev->ibdev.query_port = i40iw_query_port;
2628        iwibdev->ibdev.modify_port = i40iw_modify_port;
2629        iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2630        iwibdev->ibdev.query_gid = i40iw_query_gid;
2631        iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2632        iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2633        iwibdev->ibdev.mmap = i40iw_mmap;
2634        iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2635        iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2636        iwibdev->ibdev.create_qp = i40iw_create_qp;
2637        iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2638        iwibdev->ibdev.query_qp = i40iw_query_qp;
2639        iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2640        iwibdev->ibdev.create_cq = i40iw_create_cq;
2641        iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2642        iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2643        iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2644        iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2645        iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2646        iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
2647        iwibdev->ibdev.query_device = i40iw_query_device;
2648        iwibdev->ibdev.create_ah = i40iw_create_ah;
2649        iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
2650        iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2651        iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2652        iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2653        iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2654        iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2655        if (!iwibdev->ibdev.iwcm) {
2656                ib_dealloc_device(&iwibdev->ibdev);
2657                i40iw_pr_err("iwcm == NULL\n");
2658                return NULL;
2659        }
2660
2661        iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2662        iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2663        iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2664        iwibdev->ibdev.iwcm->connect = i40iw_connect;
2665        iwibdev->ibdev.iwcm->accept = i40iw_accept;
2666        iwibdev->ibdev.iwcm->reject = i40iw_reject;
2667        iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2668        iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2669        memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2670               sizeof(iwibdev->ibdev.iwcm->ifname));
2671        iwibdev->ibdev.get_port_immutable   = i40iw_port_immutable;
2672        iwibdev->ibdev.get_dev_fw_str       = i40iw_get_dev_fw_str;
2673        iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2674        iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2675        iwibdev->ibdev.post_send = i40iw_post_send;
2676        iwibdev->ibdev.post_recv = i40iw_post_recv;
2677
2678        return iwibdev;
2679}
2680
2681/**
2682 * i40iw_port_ibevent - indicate port event
2683 * @iwdev: iwarp device
2684 */
2685void i40iw_port_ibevent(struct i40iw_device *iwdev)
2686{
2687        struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2688        struct ib_event event;
2689
2690        event.device = &iwibdev->ibdev;
2691        event.element.port_num = 1;
2692        event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2693        ib_dispatch_event(&event);
2694}
2695
2696/**
2697 * i40iw_unregister_rdma_device - unregister of iwarp from IB
2698 * @iwibdev: rdma device ptr
2699 */
2700static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2701{
2702        int i;
2703
2704        for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2705                device_remove_file(&iwibdev->ibdev.dev,
2706                                   i40iw_dev_attributes[i]);
2707        ib_unregister_device(&iwibdev->ibdev);
2708}
2709
2710/**
2711 * i40iw_destroy_rdma_device - destroy rdma device and free resources
2712 * @iwibdev: IB device ptr
2713 */
2714void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2715{
2716        if (!iwibdev)
2717                return;
2718
2719        i40iw_unregister_rdma_device(iwibdev);
2720        kfree(iwibdev->ibdev.iwcm);
2721        iwibdev->ibdev.iwcm = NULL;
2722        ib_dealloc_device(&iwibdev->ibdev);
2723}
2724
2725/**
2726 * i40iw_register_rdma_device - register iwarp device to IB
2727 * @iwdev: iwarp device
2728 */
2729int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2730{
2731        int i, ret;
2732        struct i40iw_ib_device *iwibdev;
2733
2734        iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2735        if (!iwdev->iwibdev)
2736                return -ENOMEM;
2737        iwibdev = iwdev->iwibdev;
2738
2739        ret = ib_register_device(&iwibdev->ibdev, NULL);
2740        if (ret)
2741                goto error;
2742
2743        for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2744                ret =
2745                    device_create_file(&iwibdev->ibdev.dev,
2746                                       i40iw_dev_attributes[i]);
2747                if (ret) {
2748                        while (i > 0) {
2749                                i--;
2750                                device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2751                        }
2752                        ib_unregister_device(&iwibdev->ibdev);
2753                        goto error;
2754                }
2755        }
2756        return 0;
2757error:
2758        kfree(iwdev->iwibdev->ibdev.iwcm);
2759        iwdev->iwibdev->ibdev.iwcm = NULL;
2760        ib_dealloc_device(&iwdev->iwibdev->ibdev);
2761        return ret;
2762}
2763