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22#include "cx23885.h"
23#include "cimax2.h"
24#include "dvb_ca_en50221.h"
25
26
27#define MAX_XFER_SIZE 64
28
29
30
31
32
33
34
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37
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39
40
41
42
43
44#define NETUP_DATA 0x000000ff
45#define NETUP_WR 0x00008000
46#define NETUP_RD 0x00004000
47#define NETUP_ACK 0x00001000
48#define NETUP_ADHI 0x00000800
49#define NETUP_ADLO 0x00000400
50#define NETUP_CS1 0x00000200
51#define NETUP_CS0 0x00000100
52#define NETUP_EN_ALL 0x00001000
53#define NETUP_CTRL_OFF (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
54#define NETUP_CI_CTL 0x04
55#define NETUP_CI_RD 1
56
57#define NETUP_IRQ_DETAM 0x1
58#define NETUP_IRQ_IRQAM 0x4
59
60static unsigned int ci_dbg;
61module_param(ci_dbg, int, 0644);
62MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
63
64static unsigned int ci_irq_enable;
65module_param(ci_irq_enable, int, 0644);
66MODULE_PARM_DESC(ci_irq_enable, "Enable IRQ from CAM");
67
68#define ci_dbg_print(args...) \
69 do { \
70 if (ci_dbg) \
71 printk(KERN_DEBUG args); \
72 } while (0)
73
74#define ci_irq_flags() (ci_irq_enable ? NETUP_IRQ_IRQAM : 0)
75
76
77struct netup_ci_state {
78 struct dvb_ca_en50221 ca;
79 struct mutex ca_mutex;
80 struct i2c_adapter *i2c_adap;
81 u8 ci_i2c_addr;
82 int status;
83 struct work_struct work;
84 void *priv;
85 u8 current_irq_mode;
86 int current_ci_flag;
87 unsigned long next_status_checked_time;
88};
89
90
91static int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
92 u8 *buf, int len)
93{
94 int ret;
95 struct i2c_msg msg[] = {
96 {
97 .addr = addr,
98 .flags = 0,
99 .buf = ®,
100 .len = 1
101 }, {
102 .addr = addr,
103 .flags = I2C_M_RD,
104 .buf = buf,
105 .len = len
106 }
107 };
108
109 ret = i2c_transfer(i2c_adap, msg, 2);
110
111 if (ret != 2) {
112 ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
113 __func__, reg, ret);
114
115 return -1;
116 }
117
118 ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
119 __func__, addr, reg, buf[0]);
120
121 return 0;
122}
123
124static int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
125 u8 *buf, int len)
126{
127 int ret;
128 u8 buffer[MAX_XFER_SIZE];
129
130 struct i2c_msg msg = {
131 .addr = addr,
132 .flags = 0,
133 .buf = &buffer[0],
134 .len = len + 1
135 };
136
137 if (1 + len > sizeof(buffer)) {
138 printk(KERN_WARNING
139 "%s: i2c wr reg=%04x: len=%d is too big!\n",
140 KBUILD_MODNAME, reg, len);
141 return -EINVAL;
142 }
143
144 buffer[0] = reg;
145 memcpy(&buffer[1], buf, len);
146
147 ret = i2c_transfer(i2c_adap, &msg, 1);
148
149 if (ret != 1) {
150 ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
151 __func__, reg, ret);
152 return -1;
153 }
154
155 return 0;
156}
157
158static int netup_ci_get_mem(struct cx23885_dev *dev)
159{
160 int mem;
161 unsigned long timeout = jiffies + msecs_to_jiffies(1);
162
163 for (;;) {
164 mem = cx_read(MC417_RWD);
165 if ((mem & NETUP_ACK) == 0)
166 break;
167 if (time_after(jiffies, timeout))
168 break;
169 udelay(1);
170 }
171
172 cx_set(MC417_RWD, NETUP_CTRL_OFF);
173
174 return mem & 0xff;
175}
176
177static int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
178 u8 flag, u8 read, int addr, u8 data)
179{
180 struct netup_ci_state *state = en50221->data;
181 struct cx23885_tsport *port = state->priv;
182 struct cx23885_dev *dev = port->dev;
183
184 u8 store;
185 int mem;
186 int ret;
187
188 if (0 != slot)
189 return -EINVAL;
190
191 if (state->current_ci_flag != flag) {
192 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
193 0, &store, 1);
194 if (ret != 0)
195 return ret;
196
197 store &= ~0x0c;
198 store |= flag;
199
200 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
201 0, &store, 1);
202 if (ret != 0)
203 return ret;
204 }
205 state->current_ci_flag = flag;
206
207 mutex_lock(&dev->gpio_lock);
208
209
210 cx_write(MC417_OEN, NETUP_EN_ALL);
211 cx_write(MC417_RWD, NETUP_CTRL_OFF |
212 NETUP_ADLO | (0xff & addr));
213 cx_clear(MC417_RWD, NETUP_ADLO);
214 cx_write(MC417_RWD, NETUP_CTRL_OFF |
215 NETUP_ADHI | (0xff & (addr >> 8)));
216 cx_clear(MC417_RWD, NETUP_ADHI);
217
218 if (read) {
219 cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
220 } else
221 cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
222
223
224 cx_clear(MC417_RWD,
225 (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
226
227 cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
228 mem = netup_ci_get_mem(dev);
229
230 mutex_unlock(&dev->gpio_lock);
231
232 if (!read)
233 if (mem < 0)
234 return -EREMOTEIO;
235
236 ci_dbg_print("%s: %s: chipaddr=[0x%x] addr=[0x%02x], %s=%x\n", __func__,
237 (read) ? "read" : "write", state->ci_i2c_addr, addr,
238 (flag == NETUP_CI_CTL) ? "ctl" : "mem",
239 (read) ? mem : data);
240
241 if (read)
242 return mem;
243
244 return 0;
245}
246
247int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
248 int slot, int addr)
249{
250 return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
251}
252
253int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
254 int slot, int addr, u8 data)
255{
256 return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
257}
258
259int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
260 u8 addr)
261{
262 return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
263 NETUP_CI_RD, addr, 0);
264}
265
266int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
267 u8 addr, u8 data)
268{
269 return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
270}
271
272int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
273{
274 struct netup_ci_state *state = en50221->data;
275 u8 buf = 0x80;
276 int ret;
277
278 if (0 != slot)
279 return -EINVAL;
280
281 udelay(500);
282 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
283 0, &buf, 1);
284
285 if (ret != 0)
286 return ret;
287
288 udelay(500);
289
290 buf = 0x00;
291 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
292 0, &buf, 1);
293
294 msleep(1000);
295 dvb_ca_en50221_camready_irq(&state->ca, 0);
296
297 return 0;
298
299}
300
301int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
302{
303
304 return 0;
305}
306
307static int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
308{
309 struct netup_ci_state *state = en50221->data;
310 int ret;
311
312 if (irq_mode == state->current_irq_mode)
313 return 0;
314
315 ci_dbg_print("%s: chipaddr=[0x%x] setting ci IRQ to [0x%x] \n",
316 __func__, state->ci_i2c_addr, irq_mode);
317 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
318 0x1b, &irq_mode, 1);
319
320 if (ret != 0)
321 return ret;
322
323 state->current_irq_mode = irq_mode;
324
325 return 0;
326}
327
328int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
329{
330 struct netup_ci_state *state = en50221->data;
331 u8 buf;
332
333 if (0 != slot)
334 return -EINVAL;
335
336 netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
337 0, &buf, 1);
338 buf |= 0x60;
339
340 return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
341 0, &buf, 1);
342}
343
344
345static void netup_read_ci_status(struct work_struct *work)
346{
347 struct netup_ci_state *state =
348 container_of(work, struct netup_ci_state, work);
349 u8 buf[33];
350 int ret;
351
352
353 dvb_ca_en50221_frda_irq(&state->ca, 0);
354
355
356
357 if (time_after(jiffies, state->next_status_checked_time)
358 || !state->status) {
359 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
360 0, &buf[0], 33);
361
362 state->next_status_checked_time = jiffies
363 + msecs_to_jiffies(1000);
364
365 if (ret != 0)
366 return;
367
368 ci_dbg_print("%s: Slot Status Addr=[0x%04x], "
369 "Reg=[0x%02x], data=%02x, "
370 "TS config = %02x\n", __func__,
371 state->ci_i2c_addr, 0, buf[0],
372 buf[0]);
373
374
375 if (buf[0] & 1)
376 state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
377 DVB_CA_EN50221_POLL_CAM_READY;
378 else
379 state->status = 0;
380 }
381}
382
383
384int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
385{
386 struct cx23885_tsport *port = NULL;
387 struct netup_ci_state *state = NULL;
388
389 ci_dbg_print("%s:\n", __func__);
390
391 if (0 == (pci_status & (PCI_MSK_GPIO0 | PCI_MSK_GPIO1)))
392 return 0;
393
394 if (pci_status & PCI_MSK_GPIO0) {
395 port = &dev->ts1;
396 state = port->port_priv;
397 schedule_work(&state->work);
398 ci_dbg_print("%s: Wakeup CI0\n", __func__);
399 }
400
401 if (pci_status & PCI_MSK_GPIO1) {
402 port = &dev->ts2;
403 state = port->port_priv;
404 schedule_work(&state->work);
405 ci_dbg_print("%s: Wakeup CI1\n", __func__);
406 }
407
408 return 1;
409}
410
411int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
412 int slot, int open)
413{
414 struct netup_ci_state *state = en50221->data;
415
416 if (0 != slot)
417 return -EINVAL;
418
419 netup_ci_set_irq(en50221, open ? (NETUP_IRQ_DETAM | ci_irq_flags())
420 : NETUP_IRQ_DETAM);
421
422 return state->status;
423}
424
425int netup_ci_init(struct cx23885_tsport *port)
426{
427 struct netup_ci_state *state;
428 u8 cimax_init[34] = {
429 0x00,
430 0x00,
431 0x00,
432 0x00,
433 0x00,
434 0x44,
435 0x00,
436 0x00,
437 0x00,
438 0x00,
439 0x00,
440 0x00,
441 0x00,
442 0x00,
443 0x44,
444 0x00,
445 0x00,
446 0x00,
447 0x00,
448 0x00,
449 0x00,
450 0x00,
451 0x00,
452 0x02,
453 0x01,
454 0x00,
455 0x00,
456 ci_irq_flags() | NETUP_IRQ_DETAM,
457 0x05,
458 0x00,
459 0x04,
460 0x00,
461 0x33,
462 0x31,
463 };
464 int ret;
465
466 ci_dbg_print("%s\n", __func__);
467 state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
468 if (!state) {
469 ci_dbg_print("%s: Unable create CI structure!\n", __func__);
470 ret = -ENOMEM;
471 goto err;
472 }
473
474 port->port_priv = state;
475
476 switch (port->nr) {
477 case 1:
478 state->ci_i2c_addr = 0x40;
479 break;
480 case 2:
481 state->ci_i2c_addr = 0x41;
482 break;
483 }
484
485 state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
486 state->ca.owner = THIS_MODULE;
487 state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
488 state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
489 state->ca.read_cam_control = netup_ci_read_cam_ctl;
490 state->ca.write_cam_control = netup_ci_write_cam_ctl;
491 state->ca.slot_reset = netup_ci_slot_reset;
492 state->ca.slot_shutdown = netup_ci_slot_shutdown;
493 state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
494 state->ca.poll_slot_status = netup_poll_ci_slot_status;
495 state->ca.data = state;
496 state->priv = port;
497 state->current_irq_mode = ci_irq_flags() | NETUP_IRQ_DETAM;
498
499 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
500 0, &cimax_init[0], 34);
501
502 ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
503 0x1f, &cimax_init[0x18], 1);
504
505 ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
506 0x18, &cimax_init[0x18], 1);
507
508 if (0 != ret)
509 goto err;
510
511 ret = dvb_ca_en50221_init(&port->frontends.adapter,
512 &state->ca,
513 0,
514 1);
515 if (0 != ret)
516 goto err;
517
518 INIT_WORK(&state->work, netup_read_ci_status);
519 schedule_work(&state->work);
520
521 ci_dbg_print("%s: CI initialized!\n", __func__);
522
523 return 0;
524err:
525 ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
526 kfree(state);
527 return ret;
528}
529
530void netup_ci_exit(struct cx23885_tsport *port)
531{
532 struct netup_ci_state *state;
533
534 if (NULL == port)
535 return;
536
537 state = (struct netup_ci_state *)port->port_priv;
538 if (NULL == state)
539 return;
540
541 if (NULL == state->ca.data)
542 return;
543
544 dvb_ca_en50221_release(&state->ca);
545 kfree(state);
546}
547