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34#include <linux/bpf.h>
35#include <linux/etherdevice.h>
36#include <linux/tcp.h>
37#include <linux/if_vlan.h>
38#include <linux/delay.h>
39#include <linux/slab.h>
40#include <linux/hash.h>
41#include <net/ip.h>
42#include <net/busy_poll.h>
43#include <net/vxlan.h>
44#include <net/devlink.h>
45
46#include <linux/mlx4/driver.h>
47#include <linux/mlx4/device.h>
48#include <linux/mlx4/cmd.h>
49#include <linux/mlx4/cq.h>
50
51#include "mlx4_en.h"
52#include "en_port.h"
53
54int mlx4_en_setup_tc(struct net_device *dev, u8 up)
55{
56 struct mlx4_en_priv *priv = netdev_priv(dev);
57 int i;
58 unsigned int offset = 0;
59
60 if (up && up != MLX4_EN_NUM_UP)
61 return -EINVAL;
62
63 netdev_set_num_tc(dev, up);
64
65
66 for (i = 0; i < up; i++) {
67 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
68 offset += priv->num_tx_rings_p_up;
69 }
70
71#ifdef CONFIG_MLX4_EN_DCB
72 if (!mlx4_is_slave(priv->mdev->dev)) {
73 if (up) {
74 if (priv->dcbx_cap)
75 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
76 } else {
77 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
78 priv->cee_config.pfc_state = false;
79 }
80 }
81#endif
82
83 return 0;
84}
85
86static int __mlx4_en_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
87 struct tc_to_netdev *tc)
88{
89 if (tc->type != TC_SETUP_MQPRIO)
90 return -EINVAL;
91
92 return mlx4_en_setup_tc(dev, tc->tc);
93}
94
95#ifdef CONFIG_RFS_ACCEL
96
97struct mlx4_en_filter {
98 struct list_head next;
99 struct work_struct work;
100
101 u8 ip_proto;
102 __be32 src_ip;
103 __be32 dst_ip;
104 __be16 src_port;
105 __be16 dst_port;
106
107 int rxq_index;
108 struct mlx4_en_priv *priv;
109 u32 flow_id;
110 int id;
111 u64 reg_id;
112 u8 activated;
113
114
115 struct hlist_node filter_chain;
116};
117
118static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
119
120static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
121{
122 switch (ip_proto) {
123 case IPPROTO_UDP:
124 return MLX4_NET_TRANS_RULE_ID_UDP;
125 case IPPROTO_TCP:
126 return MLX4_NET_TRANS_RULE_ID_TCP;
127 default:
128 return MLX4_NET_TRANS_RULE_NUM;
129 }
130};
131
132static void mlx4_en_filter_work(struct work_struct *work)
133{
134 struct mlx4_en_filter *filter = container_of(work,
135 struct mlx4_en_filter,
136 work);
137 struct mlx4_en_priv *priv = filter->priv;
138 struct mlx4_spec_list spec_tcp_udp = {
139 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
140 {
141 .tcp_udp = {
142 .dst_port = filter->dst_port,
143 .dst_port_msk = (__force __be16)-1,
144 .src_port = filter->src_port,
145 .src_port_msk = (__force __be16)-1,
146 },
147 },
148 };
149 struct mlx4_spec_list spec_ip = {
150 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
151 {
152 .ipv4 = {
153 .dst_ip = filter->dst_ip,
154 .dst_ip_msk = (__force __be32)-1,
155 .src_ip = filter->src_ip,
156 .src_ip_msk = (__force __be32)-1,
157 },
158 },
159 };
160 struct mlx4_spec_list spec_eth = {
161 .id = MLX4_NET_TRANS_RULE_ID_ETH,
162 };
163 struct mlx4_net_trans_rule rule = {
164 .list = LIST_HEAD_INIT(rule.list),
165 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
166 .exclusive = 1,
167 .allow_loopback = 1,
168 .promisc_mode = MLX4_FS_REGULAR,
169 .port = priv->port,
170 .priority = MLX4_DOMAIN_RFS,
171 };
172 int rc;
173 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
174
175 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
176 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
177 filter->ip_proto);
178 goto ignore;
179 }
180 list_add_tail(&spec_eth.list, &rule.list);
181 list_add_tail(&spec_ip.list, &rule.list);
182 list_add_tail(&spec_tcp_udp.list, &rule.list);
183
184 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
185 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
186 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
187
188 filter->activated = 0;
189
190 if (filter->reg_id) {
191 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
192 if (rc && rc != -ENOENT)
193 en_err(priv, "Error detaching flow. rc = %d\n", rc);
194 }
195
196 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
197 if (rc)
198 en_err(priv, "Error attaching flow. err = %d\n", rc);
199
200ignore:
201 mlx4_en_filter_rfs_expire(priv);
202
203 filter->activated = 1;
204}
205
206static inline struct hlist_head *
207filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
208 __be16 src_port, __be16 dst_port)
209{
210 unsigned long l;
211 int bucket_idx;
212
213 l = (__force unsigned long)src_port |
214 ((__force unsigned long)dst_port << 2);
215 l ^= (__force unsigned long)(src_ip ^ dst_ip);
216
217 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
218
219 return &priv->filter_hash[bucket_idx];
220}
221
222static struct mlx4_en_filter *
223mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
224 __be32 dst_ip, u8 ip_proto, __be16 src_port,
225 __be16 dst_port, u32 flow_id)
226{
227 struct mlx4_en_filter *filter = NULL;
228
229 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
230 if (!filter)
231 return NULL;
232
233 filter->priv = priv;
234 filter->rxq_index = rxq_index;
235 INIT_WORK(&filter->work, mlx4_en_filter_work);
236
237 filter->src_ip = src_ip;
238 filter->dst_ip = dst_ip;
239 filter->ip_proto = ip_proto;
240 filter->src_port = src_port;
241 filter->dst_port = dst_port;
242
243 filter->flow_id = flow_id;
244
245 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
246
247 list_add_tail(&filter->next, &priv->filters);
248 hlist_add_head(&filter->filter_chain,
249 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
250 dst_port));
251
252 return filter;
253}
254
255static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
256{
257 struct mlx4_en_priv *priv = filter->priv;
258 int rc;
259
260 list_del(&filter->next);
261
262 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
263 if (rc && rc != -ENOENT)
264 en_err(priv, "Error detaching flow. rc = %d\n", rc);
265
266 kfree(filter);
267}
268
269static inline struct mlx4_en_filter *
270mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
271 u8 ip_proto, __be16 src_port, __be16 dst_port)
272{
273 struct mlx4_en_filter *filter;
274 struct mlx4_en_filter *ret = NULL;
275
276 hlist_for_each_entry(filter,
277 filter_hash_bucket(priv, src_ip, dst_ip,
278 src_port, dst_port),
279 filter_chain) {
280 if (filter->src_ip == src_ip &&
281 filter->dst_ip == dst_ip &&
282 filter->ip_proto == ip_proto &&
283 filter->src_port == src_port &&
284 filter->dst_port == dst_port) {
285 ret = filter;
286 break;
287 }
288 }
289
290 return ret;
291}
292
293static int
294mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
295 u16 rxq_index, u32 flow_id)
296{
297 struct mlx4_en_priv *priv = netdev_priv(net_dev);
298 struct mlx4_en_filter *filter;
299 const struct iphdr *ip;
300 const __be16 *ports;
301 u8 ip_proto;
302 __be32 src_ip;
303 __be32 dst_ip;
304 __be16 src_port;
305 __be16 dst_port;
306 int nhoff = skb_network_offset(skb);
307 int ret = 0;
308
309 if (skb->protocol != htons(ETH_P_IP))
310 return -EPROTONOSUPPORT;
311
312 ip = (const struct iphdr *)(skb->data + nhoff);
313 if (ip_is_fragment(ip))
314 return -EPROTONOSUPPORT;
315
316 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
317 return -EPROTONOSUPPORT;
318 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
319
320 ip_proto = ip->protocol;
321 src_ip = ip->saddr;
322 dst_ip = ip->daddr;
323 src_port = ports[0];
324 dst_port = ports[1];
325
326 spin_lock_bh(&priv->filters_lock);
327 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
328 src_port, dst_port);
329 if (filter) {
330 if (filter->rxq_index == rxq_index)
331 goto out;
332
333 filter->rxq_index = rxq_index;
334 } else {
335 filter = mlx4_en_filter_alloc(priv, rxq_index,
336 src_ip, dst_ip, ip_proto,
337 src_port, dst_port, flow_id);
338 if (!filter) {
339 ret = -ENOMEM;
340 goto err;
341 }
342 }
343
344 queue_work(priv->mdev->workqueue, &filter->work);
345
346out:
347 ret = filter->id;
348err:
349 spin_unlock_bh(&priv->filters_lock);
350
351 return ret;
352}
353
354void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
355{
356 struct mlx4_en_filter *filter, *tmp;
357 LIST_HEAD(del_list);
358
359 spin_lock_bh(&priv->filters_lock);
360 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
361 list_move(&filter->next, &del_list);
362 hlist_del(&filter->filter_chain);
363 }
364 spin_unlock_bh(&priv->filters_lock);
365
366 list_for_each_entry_safe(filter, tmp, &del_list, next) {
367 cancel_work_sync(&filter->work);
368 mlx4_en_filter_free(filter);
369 }
370}
371
372static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
373{
374 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
375 LIST_HEAD(del_list);
376 int i = 0;
377
378 spin_lock_bh(&priv->filters_lock);
379 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
380 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
381 break;
382
383 if (filter->activated &&
384 !work_pending(&filter->work) &&
385 rps_may_expire_flow(priv->dev,
386 filter->rxq_index, filter->flow_id,
387 filter->id)) {
388 list_move(&filter->next, &del_list);
389 hlist_del(&filter->filter_chain);
390 } else
391 last_filter = filter;
392
393 i++;
394 }
395
396 if (last_filter && (&last_filter->next != priv->filters.next))
397 list_move(&priv->filters, &last_filter->next);
398
399 spin_unlock_bh(&priv->filters_lock);
400
401 list_for_each_entry_safe(filter, tmp, &del_list, next)
402 mlx4_en_filter_free(filter);
403}
404#endif
405
406static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
407 __be16 proto, u16 vid)
408{
409 struct mlx4_en_priv *priv = netdev_priv(dev);
410 struct mlx4_en_dev *mdev = priv->mdev;
411 int err;
412 int idx;
413
414 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
415
416 set_bit(vid, priv->active_vlans);
417
418
419 mutex_lock(&mdev->state_lock);
420 if (mdev->device_up && priv->port_up) {
421 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
422 if (err) {
423 en_err(priv, "Failed configuring VLAN filter\n");
424 goto out;
425 }
426 }
427 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
428 if (err)
429 en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
430
431out:
432 mutex_unlock(&mdev->state_lock);
433 return err;
434}
435
436static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
437 __be16 proto, u16 vid)
438{
439 struct mlx4_en_priv *priv = netdev_priv(dev);
440 struct mlx4_en_dev *mdev = priv->mdev;
441 int err = 0;
442
443 en_dbg(HW, priv, "Killing VID:%d\n", vid);
444
445 clear_bit(vid, priv->active_vlans);
446
447
448 mutex_lock(&mdev->state_lock);
449 mlx4_unregister_vlan(mdev->dev, priv->port, vid);
450
451 if (mdev->device_up && priv->port_up) {
452 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
453 if (err)
454 en_err(priv, "Failed configuring VLAN filter\n");
455 }
456 mutex_unlock(&mdev->state_lock);
457
458 return err;
459}
460
461static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
462{
463 int i;
464 for (i = ETH_ALEN - 1; i >= 0; --i) {
465 dst_mac[i] = src_mac & 0xff;
466 src_mac >>= 8;
467 }
468 memset(&dst_mac[ETH_ALEN], 0, 2);
469}
470
471
472static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
473 int qpn, u64 *reg_id)
474{
475 int err;
476
477 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
478 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
479 return 0;
480
481 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
482 MLX4_DOMAIN_NIC, reg_id);
483 if (err) {
484 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
485 return err;
486 }
487 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
488 return 0;
489}
490
491
492static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
493 unsigned char *mac, int *qpn, u64 *reg_id)
494{
495 struct mlx4_en_dev *mdev = priv->mdev;
496 struct mlx4_dev *dev = mdev->dev;
497 int err;
498
499 switch (dev->caps.steering_mode) {
500 case MLX4_STEERING_MODE_B0: {
501 struct mlx4_qp qp;
502 u8 gid[16] = {0};
503
504 qp.qpn = *qpn;
505 memcpy(&gid[10], mac, ETH_ALEN);
506 gid[5] = priv->port;
507
508 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
509 break;
510 }
511 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
512 struct mlx4_spec_list spec_eth = { {NULL} };
513 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
514
515 struct mlx4_net_trans_rule rule = {
516 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
517 .exclusive = 0,
518 .allow_loopback = 1,
519 .promisc_mode = MLX4_FS_REGULAR,
520 .priority = MLX4_DOMAIN_NIC,
521 };
522
523 rule.port = priv->port;
524 rule.qpn = *qpn;
525 INIT_LIST_HEAD(&rule.list);
526
527 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
528 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
529 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
530 list_add_tail(&spec_eth.list, &rule.list);
531
532 err = mlx4_flow_attach(dev, &rule, reg_id);
533 break;
534 }
535 default:
536 return -EINVAL;
537 }
538 if (err)
539 en_warn(priv, "Failed Attaching Unicast\n");
540
541 return err;
542}
543
544static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
545 unsigned char *mac, int qpn, u64 reg_id)
546{
547 struct mlx4_en_dev *mdev = priv->mdev;
548 struct mlx4_dev *dev = mdev->dev;
549
550 switch (dev->caps.steering_mode) {
551 case MLX4_STEERING_MODE_B0: {
552 struct mlx4_qp qp;
553 u8 gid[16] = {0};
554
555 qp.qpn = qpn;
556 memcpy(&gid[10], mac, ETH_ALEN);
557 gid[5] = priv->port;
558
559 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
560 break;
561 }
562 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
563 mlx4_flow_detach(dev, reg_id);
564 break;
565 }
566 default:
567 en_err(priv, "Invalid steering mode.\n");
568 }
569}
570
571static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
572{
573 struct mlx4_en_dev *mdev = priv->mdev;
574 struct mlx4_dev *dev = mdev->dev;
575 int index = 0;
576 int err = 0;
577 int *qpn = &priv->base_qpn;
578 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
579
580 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
581 priv->dev->dev_addr);
582 index = mlx4_register_mac(dev, priv->port, mac);
583 if (index < 0) {
584 err = index;
585 en_err(priv, "Failed adding MAC: %pM\n",
586 priv->dev->dev_addr);
587 return err;
588 }
589
590 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
591 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
592 *qpn = base_qpn + index;
593 return 0;
594 }
595
596 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
597 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
598 if (err) {
599 en_err(priv, "Failed to reserve qp for mac registration\n");
600 mlx4_unregister_mac(dev, priv->port, mac);
601 return err;
602 }
603
604 return 0;
605}
606
607static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
608{
609 struct mlx4_en_dev *mdev = priv->mdev;
610 struct mlx4_dev *dev = mdev->dev;
611 int qpn = priv->base_qpn;
612
613 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
614 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
615 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
616 priv->dev->dev_addr);
617 mlx4_unregister_mac(dev, priv->port, mac);
618 } else {
619 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
620 priv->port, qpn);
621 mlx4_qp_release_range(dev, qpn, 1);
622 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
623 }
624}
625
626static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
627 unsigned char *new_mac, unsigned char *prev_mac)
628{
629 struct mlx4_en_dev *mdev = priv->mdev;
630 struct mlx4_dev *dev = mdev->dev;
631 int err = 0;
632 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
633
634 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
635 struct hlist_head *bucket;
636 unsigned int mac_hash;
637 struct mlx4_mac_entry *entry;
638 struct hlist_node *tmp;
639 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
640
641 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
642 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
643 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
644 mlx4_en_uc_steer_release(priv, entry->mac,
645 qpn, entry->reg_id);
646 mlx4_unregister_mac(dev, priv->port,
647 prev_mac_u64);
648 hlist_del_rcu(&entry->hlist);
649 synchronize_rcu();
650 memcpy(entry->mac, new_mac, ETH_ALEN);
651 entry->reg_id = 0;
652 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
653 hlist_add_head_rcu(&entry->hlist,
654 &priv->mac_hash[mac_hash]);
655 mlx4_register_mac(dev, priv->port, new_mac_u64);
656 err = mlx4_en_uc_steer_add(priv, new_mac,
657 &qpn,
658 &entry->reg_id);
659 if (err)
660 return err;
661 if (priv->tunnel_reg_id) {
662 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
663 priv->tunnel_reg_id = 0;
664 }
665 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
666 &priv->tunnel_reg_id);
667 return err;
668 }
669 }
670 return -EINVAL;
671 }
672
673 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
674}
675
676static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
677 unsigned char new_mac[ETH_ALEN + 2])
678{
679 int err = 0;
680
681 if (priv->port_up) {
682
683 err = mlx4_en_replace_mac(priv, priv->base_qpn,
684 new_mac, priv->current_mac);
685 if (err)
686 en_err(priv, "Failed changing HW MAC address\n");
687 } else
688 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
689
690 if (!err)
691 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
692
693 return err;
694}
695
696static int mlx4_en_set_mac(struct net_device *dev, void *addr)
697{
698 struct mlx4_en_priv *priv = netdev_priv(dev);
699 struct mlx4_en_dev *mdev = priv->mdev;
700 struct sockaddr *saddr = addr;
701 unsigned char new_mac[ETH_ALEN + 2];
702 int err;
703
704 if (!is_valid_ether_addr(saddr->sa_data))
705 return -EADDRNOTAVAIL;
706
707 mutex_lock(&mdev->state_lock);
708 memcpy(new_mac, saddr->sa_data, ETH_ALEN);
709 err = mlx4_en_do_set_mac(priv, new_mac);
710 if (!err)
711 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
712 mutex_unlock(&mdev->state_lock);
713
714 return err;
715}
716
717static void mlx4_en_clear_list(struct net_device *dev)
718{
719 struct mlx4_en_priv *priv = netdev_priv(dev);
720 struct mlx4_en_mc_list *tmp, *mc_to_del;
721
722 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
723 list_del(&mc_to_del->list);
724 kfree(mc_to_del);
725 }
726}
727
728static void mlx4_en_cache_mclist(struct net_device *dev)
729{
730 struct mlx4_en_priv *priv = netdev_priv(dev);
731 struct netdev_hw_addr *ha;
732 struct mlx4_en_mc_list *tmp;
733
734 mlx4_en_clear_list(dev);
735 netdev_for_each_mc_addr(ha, dev) {
736 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
737 if (!tmp) {
738 mlx4_en_clear_list(dev);
739 return;
740 }
741 memcpy(tmp->addr, ha->addr, ETH_ALEN);
742 list_add_tail(&tmp->list, &priv->mc_list);
743 }
744}
745
746static void update_mclist_flags(struct mlx4_en_priv *priv,
747 struct list_head *dst,
748 struct list_head *src)
749{
750 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
751 bool found;
752
753
754
755
756 list_for_each_entry(dst_tmp, dst, list) {
757 found = false;
758 list_for_each_entry(src_tmp, src, list) {
759 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
760 found = true;
761 break;
762 }
763 }
764 if (!found)
765 dst_tmp->action = MCLIST_REM;
766 }
767
768
769
770
771 list_for_each_entry(src_tmp, src, list) {
772 found = false;
773 list_for_each_entry(dst_tmp, dst, list) {
774 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
775 dst_tmp->action = MCLIST_NONE;
776 found = true;
777 break;
778 }
779 }
780 if (!found) {
781 new_mc = kmemdup(src_tmp,
782 sizeof(struct mlx4_en_mc_list),
783 GFP_KERNEL);
784 if (!new_mc)
785 return;
786
787 new_mc->action = MCLIST_ADD;
788 list_add_tail(&new_mc->list, dst);
789 }
790 }
791}
792
793static void mlx4_en_set_rx_mode(struct net_device *dev)
794{
795 struct mlx4_en_priv *priv = netdev_priv(dev);
796
797 if (!priv->port_up)
798 return;
799
800 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
801}
802
803static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
804 struct mlx4_en_dev *mdev)
805{
806 int err = 0;
807
808 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
809 if (netif_msg_rx_status(priv))
810 en_warn(priv, "Entering promiscuous mode\n");
811 priv->flags |= MLX4_EN_FLAG_PROMISC;
812
813
814 switch (mdev->dev->caps.steering_mode) {
815 case MLX4_STEERING_MODE_DEVICE_MANAGED:
816 err = mlx4_flow_steer_promisc_add(mdev->dev,
817 priv->port,
818 priv->base_qpn,
819 MLX4_FS_ALL_DEFAULT);
820 if (err)
821 en_err(priv, "Failed enabling promiscuous mode\n");
822 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
823 break;
824
825 case MLX4_STEERING_MODE_B0:
826 err = mlx4_unicast_promisc_add(mdev->dev,
827 priv->base_qpn,
828 priv->port);
829 if (err)
830 en_err(priv, "Failed enabling unicast promiscuous mode\n");
831
832
833
834
835 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
836 err = mlx4_multicast_promisc_add(mdev->dev,
837 priv->base_qpn,
838 priv->port);
839 if (err)
840 en_err(priv, "Failed enabling multicast promiscuous mode\n");
841 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
842 }
843 break;
844
845 case MLX4_STEERING_MODE_A0:
846 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
847 priv->port,
848 priv->base_qpn,
849 1);
850 if (err)
851 en_err(priv, "Failed enabling promiscuous mode\n");
852 break;
853 }
854
855
856 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
857 0, MLX4_MCAST_DISABLE);
858 if (err)
859 en_err(priv, "Failed disabling multicast filter\n");
860 }
861}
862
863static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
864 struct mlx4_en_dev *mdev)
865{
866 int err = 0;
867
868 if (netif_msg_rx_status(priv))
869 en_warn(priv, "Leaving promiscuous mode\n");
870 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
871
872
873 switch (mdev->dev->caps.steering_mode) {
874 case MLX4_STEERING_MODE_DEVICE_MANAGED:
875 err = mlx4_flow_steer_promisc_remove(mdev->dev,
876 priv->port,
877 MLX4_FS_ALL_DEFAULT);
878 if (err)
879 en_err(priv, "Failed disabling promiscuous mode\n");
880 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
881 break;
882
883 case MLX4_STEERING_MODE_B0:
884 err = mlx4_unicast_promisc_remove(mdev->dev,
885 priv->base_qpn,
886 priv->port);
887 if (err)
888 en_err(priv, "Failed disabling unicast promiscuous mode\n");
889
890 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
891 err = mlx4_multicast_promisc_remove(mdev->dev,
892 priv->base_qpn,
893 priv->port);
894 if (err)
895 en_err(priv, "Failed disabling multicast promiscuous mode\n");
896 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
897 }
898 break;
899
900 case MLX4_STEERING_MODE_A0:
901 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
902 priv->port,
903 priv->base_qpn, 0);
904 if (err)
905 en_err(priv, "Failed disabling promiscuous mode\n");
906 break;
907 }
908}
909
910static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
911 struct net_device *dev,
912 struct mlx4_en_dev *mdev)
913{
914 struct mlx4_en_mc_list *mclist, *tmp;
915 u64 mcast_addr = 0;
916 u8 mc_list[16] = {0};
917 int err = 0;
918
919
920 if (dev->flags & IFF_ALLMULTI) {
921 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
922 0, MLX4_MCAST_DISABLE);
923 if (err)
924 en_err(priv, "Failed disabling multicast filter\n");
925
926
927 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
928 switch (mdev->dev->caps.steering_mode) {
929 case MLX4_STEERING_MODE_DEVICE_MANAGED:
930 err = mlx4_flow_steer_promisc_add(mdev->dev,
931 priv->port,
932 priv->base_qpn,
933 MLX4_FS_MC_DEFAULT);
934 break;
935
936 case MLX4_STEERING_MODE_B0:
937 err = mlx4_multicast_promisc_add(mdev->dev,
938 priv->base_qpn,
939 priv->port);
940 break;
941
942 case MLX4_STEERING_MODE_A0:
943 break;
944 }
945 if (err)
946 en_err(priv, "Failed entering multicast promisc mode\n");
947 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
948 }
949 } else {
950
951 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
952 switch (mdev->dev->caps.steering_mode) {
953 case MLX4_STEERING_MODE_DEVICE_MANAGED:
954 err = mlx4_flow_steer_promisc_remove(mdev->dev,
955 priv->port,
956 MLX4_FS_MC_DEFAULT);
957 break;
958
959 case MLX4_STEERING_MODE_B0:
960 err = mlx4_multicast_promisc_remove(mdev->dev,
961 priv->base_qpn,
962 priv->port);
963 break;
964
965 case MLX4_STEERING_MODE_A0:
966 break;
967 }
968 if (err)
969 en_err(priv, "Failed disabling multicast promiscuous mode\n");
970 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
971 }
972
973 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
974 0, MLX4_MCAST_DISABLE);
975 if (err)
976 en_err(priv, "Failed disabling multicast filter\n");
977
978
979 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
980 1, MLX4_MCAST_CONFIG);
981
982
983
984 netif_addr_lock_bh(dev);
985 mlx4_en_cache_mclist(dev);
986 netif_addr_unlock_bh(dev);
987 list_for_each_entry(mclist, &priv->mc_list, list) {
988 mcast_addr = mlx4_mac_to_u64(mclist->addr);
989 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
990 mcast_addr, 0, MLX4_MCAST_CONFIG);
991 }
992 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
993 0, MLX4_MCAST_ENABLE);
994 if (err)
995 en_err(priv, "Failed enabling multicast filter\n");
996
997 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
998 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
999 if (mclist->action == MCLIST_REM) {
1000
1001 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1002 mc_list[5] = priv->port;
1003 err = mlx4_multicast_detach(mdev->dev,
1004 &priv->rss_map.indir_qp,
1005 mc_list,
1006 MLX4_PROT_ETH,
1007 mclist->reg_id);
1008 if (err)
1009 en_err(priv, "Fail to detach multicast address\n");
1010
1011 if (mclist->tunnel_reg_id) {
1012 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
1013 if (err)
1014 en_err(priv, "Failed to detach multicast address\n");
1015 }
1016
1017
1018 list_del(&mclist->list);
1019 kfree(mclist);
1020 } else if (mclist->action == MCLIST_ADD) {
1021
1022 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1023
1024 mc_list[5] = priv->port;
1025 err = mlx4_multicast_attach(mdev->dev,
1026 &priv->rss_map.indir_qp,
1027 mc_list,
1028 priv->port, 0,
1029 MLX4_PROT_ETH,
1030 &mclist->reg_id);
1031 if (err)
1032 en_err(priv, "Fail to attach multicast address\n");
1033
1034 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1035 &mclist->tunnel_reg_id);
1036 if (err)
1037 en_err(priv, "Failed to attach multicast address\n");
1038 }
1039 }
1040 }
1041}
1042
1043static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1044 struct net_device *dev,
1045 struct mlx4_en_dev *mdev)
1046{
1047 struct netdev_hw_addr *ha;
1048 struct mlx4_mac_entry *entry;
1049 struct hlist_node *tmp;
1050 bool found;
1051 u64 mac;
1052 int err = 0;
1053 struct hlist_head *bucket;
1054 unsigned int i;
1055 int removed = 0;
1056 u32 prev_flags;
1057
1058
1059
1060
1061
1062
1063 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1064 bucket = &priv->mac_hash[i];
1065 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1066 found = false;
1067 netdev_for_each_uc_addr(ha, dev) {
1068 if (ether_addr_equal_64bits(entry->mac,
1069 ha->addr)) {
1070 found = true;
1071 break;
1072 }
1073 }
1074
1075
1076 if (ether_addr_equal_64bits(entry->mac,
1077 priv->current_mac))
1078 found = true;
1079
1080 if (!found) {
1081 mac = mlx4_mac_to_u64(entry->mac);
1082 mlx4_en_uc_steer_release(priv, entry->mac,
1083 priv->base_qpn,
1084 entry->reg_id);
1085 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1086
1087 hlist_del_rcu(&entry->hlist);
1088 kfree_rcu(entry, rcu);
1089 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1090 entry->mac, priv->port);
1091 ++removed;
1092 }
1093 }
1094 }
1095
1096
1097
1098
1099 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1100 return;
1101
1102 prev_flags = priv->flags;
1103 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1104
1105
1106 netdev_for_each_uc_addr(ha, dev) {
1107 found = false;
1108 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1109 hlist_for_each_entry(entry, bucket, hlist) {
1110 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1111 found = true;
1112 break;
1113 }
1114 }
1115
1116 if (!found) {
1117 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1118 if (!entry) {
1119 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1120 ha->addr, priv->port);
1121 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1122 break;
1123 }
1124 mac = mlx4_mac_to_u64(ha->addr);
1125 memcpy(entry->mac, ha->addr, ETH_ALEN);
1126 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1127 if (err < 0) {
1128 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1129 ha->addr, priv->port, err);
1130 kfree(entry);
1131 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1132 break;
1133 }
1134 err = mlx4_en_uc_steer_add(priv, ha->addr,
1135 &priv->base_qpn,
1136 &entry->reg_id);
1137 if (err) {
1138 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1139 ha->addr, priv->port, err);
1140 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1141 kfree(entry);
1142 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1143 break;
1144 } else {
1145 unsigned int mac_hash;
1146 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1147 ha->addr, priv->port);
1148 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1149 bucket = &priv->mac_hash[mac_hash];
1150 hlist_add_head_rcu(&entry->hlist, bucket);
1151 }
1152 }
1153 }
1154
1155 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1156 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1157 priv->port);
1158 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1159 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1160 priv->port);
1161 }
1162}
1163
1164static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1165{
1166 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1167 rx_mode_task);
1168 struct mlx4_en_dev *mdev = priv->mdev;
1169 struct net_device *dev = priv->dev;
1170
1171 mutex_lock(&mdev->state_lock);
1172 if (!mdev->device_up) {
1173 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1174 goto out;
1175 }
1176 if (!priv->port_up) {
1177 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1178 goto out;
1179 }
1180
1181 if (!netif_carrier_ok(dev)) {
1182 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1183 if (priv->port_state.link_state) {
1184 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1185 netif_carrier_on(dev);
1186 en_dbg(LINK, priv, "Link Up\n");
1187 }
1188 }
1189 }
1190
1191 if (dev->priv_flags & IFF_UNICAST_FLT)
1192 mlx4_en_do_uc_filter(priv, dev, mdev);
1193
1194
1195 if ((dev->flags & IFF_PROMISC) ||
1196 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1197 mlx4_en_set_promisc_mode(priv, mdev);
1198 goto out;
1199 }
1200
1201
1202 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1203 mlx4_en_clear_promisc_mode(priv, mdev);
1204
1205 mlx4_en_do_multicast(priv, dev, mdev);
1206out:
1207 mutex_unlock(&mdev->state_lock);
1208}
1209
1210#ifdef CONFIG_NET_POLL_CONTROLLER
1211static void mlx4_en_netpoll(struct net_device *dev)
1212{
1213 struct mlx4_en_priv *priv = netdev_priv(dev);
1214 struct mlx4_en_cq *cq;
1215 int i;
1216
1217 for (i = 0; i < priv->tx_ring_num; i++) {
1218 cq = priv->tx_cq[i];
1219 napi_schedule(&cq->napi);
1220 }
1221}
1222#endif
1223
1224static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1225{
1226 u64 reg_id;
1227 int err = 0;
1228 int *qpn = &priv->base_qpn;
1229 struct mlx4_mac_entry *entry;
1230
1231 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);
1232 if (err)
1233 return err;
1234
1235 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
1236 &priv->tunnel_reg_id);
1237 if (err)
1238 goto tunnel_err;
1239
1240 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1241 if (!entry) {
1242 err = -ENOMEM;
1243 goto alloc_err;
1244 }
1245
1246 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
1247 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
1248 entry->reg_id = reg_id;
1249 hlist_add_head_rcu(&entry->hlist,
1250 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
1251
1252 return 0;
1253
1254alloc_err:
1255 if (priv->tunnel_reg_id)
1256 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1257
1258tunnel_err:
1259 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
1260 return err;
1261}
1262
1263static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
1264{
1265 u64 mac;
1266 unsigned int i;
1267 int qpn = priv->base_qpn;
1268 struct hlist_head *bucket;
1269 struct hlist_node *tmp;
1270 struct mlx4_mac_entry *entry;
1271
1272 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1273 bucket = &priv->mac_hash[i];
1274 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1275 mac = mlx4_mac_to_u64(entry->mac);
1276 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
1277 entry->mac);
1278 mlx4_en_uc_steer_release(priv, entry->mac,
1279 qpn, entry->reg_id);
1280
1281 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
1282 hlist_del_rcu(&entry->hlist);
1283 kfree_rcu(entry, rcu);
1284 }
1285 }
1286
1287 if (priv->tunnel_reg_id) {
1288 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1289 priv->tunnel_reg_id = 0;
1290 }
1291}
1292
1293static void mlx4_en_tx_timeout(struct net_device *dev)
1294{
1295 struct mlx4_en_priv *priv = netdev_priv(dev);
1296 struct mlx4_en_dev *mdev = priv->mdev;
1297 int i;
1298
1299 if (netif_msg_timer(priv))
1300 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1301
1302 for (i = 0; i < priv->tx_ring_num; i++) {
1303 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
1304 continue;
1305 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1306 i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
1307 priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
1308 }
1309
1310 priv->port_stats.tx_timeout++;
1311 en_dbg(DRV, priv, "Scheduling watchdog\n");
1312 queue_work(mdev->workqueue, &priv->watchdog_task);
1313}
1314
1315
1316static struct rtnl_link_stats64 *
1317mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
1318{
1319 struct mlx4_en_priv *priv = netdev_priv(dev);
1320
1321 spin_lock_bh(&priv->stats_lock);
1322 netdev_stats_to_stats64(stats, &dev->stats);
1323 spin_unlock_bh(&priv->stats_lock);
1324
1325 return stats;
1326}
1327
1328static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1329{
1330 struct mlx4_en_cq *cq;
1331 int i;
1332
1333
1334
1335
1336
1337
1338
1339 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1340 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1341 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1342 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1343 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1344 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1345
1346
1347 for (i = 0; i < priv->rx_ring_num; i++) {
1348 cq = priv->rx_cq[i];
1349 cq->moder_cnt = priv->rx_frames;
1350 cq->moder_time = priv->rx_usecs;
1351 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1352 priv->last_moder_packets[i] = 0;
1353 priv->last_moder_bytes[i] = 0;
1354 }
1355
1356 for (i = 0; i < priv->tx_ring_num; i++) {
1357 cq = priv->tx_cq[i];
1358 cq->moder_cnt = priv->tx_frames;
1359 cq->moder_time = priv->tx_usecs;
1360 }
1361
1362
1363 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1364 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1365 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1366 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1367 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1368 priv->adaptive_rx_coal = 1;
1369 priv->last_moder_jiffies = 0;
1370 priv->last_moder_tx_packets = 0;
1371}
1372
1373static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1374{
1375 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1376 struct mlx4_en_cq *cq;
1377 unsigned long packets;
1378 unsigned long rate;
1379 unsigned long avg_pkt_size;
1380 unsigned long rx_packets;
1381 unsigned long rx_bytes;
1382 unsigned long rx_pkt_diff;
1383 int moder_time;
1384 int ring, err;
1385
1386 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1387 return;
1388
1389 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1390 spin_lock_bh(&priv->stats_lock);
1391 rx_packets = priv->rx_ring[ring]->packets;
1392 rx_bytes = priv->rx_ring[ring]->bytes;
1393 spin_unlock_bh(&priv->stats_lock);
1394
1395 rx_pkt_diff = ((unsigned long) (rx_packets -
1396 priv->last_moder_packets[ring]));
1397 packets = rx_pkt_diff;
1398 rate = packets * HZ / period;
1399 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
1400 priv->last_moder_bytes[ring])) / packets : 0;
1401
1402
1403
1404 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1405 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1406 if (rate < priv->pkt_rate_low)
1407 moder_time = priv->rx_usecs_low;
1408 else if (rate > priv->pkt_rate_high)
1409 moder_time = priv->rx_usecs_high;
1410 else
1411 moder_time = (rate - priv->pkt_rate_low) *
1412 (priv->rx_usecs_high - priv->rx_usecs_low) /
1413 (priv->pkt_rate_high - priv->pkt_rate_low) +
1414 priv->rx_usecs_low;
1415 } else {
1416 moder_time = priv->rx_usecs_low;
1417 }
1418
1419 if (moder_time != priv->last_moder_time[ring]) {
1420 priv->last_moder_time[ring] = moder_time;
1421 cq = priv->rx_cq[ring];
1422 cq->moder_time = moder_time;
1423 cq->moder_cnt = priv->rx_frames;
1424 err = mlx4_en_set_cq_moder(priv, cq);
1425 if (err)
1426 en_err(priv, "Failed modifying moderation for cq:%d\n",
1427 ring);
1428 }
1429 priv->last_moder_packets[ring] = rx_packets;
1430 priv->last_moder_bytes[ring] = rx_bytes;
1431 }
1432
1433 priv->last_moder_jiffies = jiffies;
1434}
1435
1436static void mlx4_en_do_get_stats(struct work_struct *work)
1437{
1438 struct delayed_work *delay = to_delayed_work(work);
1439 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1440 stats_task);
1441 struct mlx4_en_dev *mdev = priv->mdev;
1442 int err;
1443
1444 mutex_lock(&mdev->state_lock);
1445 if (mdev->device_up) {
1446 if (priv->port_up) {
1447 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1448 if (err)
1449 en_dbg(HW, priv, "Could not update stats\n");
1450
1451 mlx4_en_auto_moderation(priv);
1452 }
1453
1454 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1455 }
1456 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1457 mlx4_en_do_set_mac(priv, priv->current_mac);
1458 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1459 }
1460 mutex_unlock(&mdev->state_lock);
1461}
1462
1463
1464
1465
1466static void mlx4_en_service_task(struct work_struct *work)
1467{
1468 struct delayed_work *delay = to_delayed_work(work);
1469 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1470 service_task);
1471 struct mlx4_en_dev *mdev = priv->mdev;
1472
1473 mutex_lock(&mdev->state_lock);
1474 if (mdev->device_up) {
1475 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1476 mlx4_en_ptp_overflow_check(mdev);
1477
1478 mlx4_en_recover_from_oom(priv);
1479 queue_delayed_work(mdev->workqueue, &priv->service_task,
1480 SERVICE_TASK_DELAY);
1481 }
1482 mutex_unlock(&mdev->state_lock);
1483}
1484
1485static void mlx4_en_linkstate(struct work_struct *work)
1486{
1487 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1488 linkstate_task);
1489 struct mlx4_en_dev *mdev = priv->mdev;
1490 int linkstate = priv->link_state;
1491
1492 mutex_lock(&mdev->state_lock);
1493
1494
1495 if (priv->last_link_state != linkstate) {
1496 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
1497 en_info(priv, "Link Down\n");
1498 netif_carrier_off(priv->dev);
1499 } else {
1500 en_info(priv, "Link Up\n");
1501 netif_carrier_on(priv->dev);
1502 }
1503 }
1504 priv->last_link_state = linkstate;
1505 mutex_unlock(&mdev->state_lock);
1506}
1507
1508static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1509{
1510 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1511 int numa_node = priv->mdev->dev->numa_node;
1512
1513 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
1514 return -ENOMEM;
1515
1516 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1517 ring->affinity_mask);
1518 return 0;
1519}
1520
1521static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1522{
1523 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1524}
1525
1526static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
1527 int tx_ring_idx)
1528{
1529 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[tx_ring_idx];
1530 int rr_index;
1531
1532 rr_index = (priv->xdp_ring_num - priv->tx_ring_num) + tx_ring_idx;
1533 if (rr_index >= 0) {
1534 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
1535 tx_ring->recycle_ring = priv->rx_ring[rr_index];
1536 en_dbg(DRV, priv,
1537 "Set tx_ring[%d]->recycle_ring = rx_ring[%d]\n",
1538 tx_ring_idx, rr_index);
1539 } else {
1540 tx_ring->recycle_ring = NULL;
1541 }
1542}
1543
1544int mlx4_en_start_port(struct net_device *dev)
1545{
1546 struct mlx4_en_priv *priv = netdev_priv(dev);
1547 struct mlx4_en_dev *mdev = priv->mdev;
1548 struct mlx4_en_cq *cq;
1549 struct mlx4_en_tx_ring *tx_ring;
1550 int rx_index = 0;
1551 int tx_index = 0;
1552 int err = 0;
1553 int i;
1554 int j;
1555 u8 mc_list[16] = {0};
1556
1557 if (priv->port_up) {
1558 en_dbg(DRV, priv, "start port called while port already up\n");
1559 return 0;
1560 }
1561
1562 INIT_LIST_HEAD(&priv->mc_list);
1563 INIT_LIST_HEAD(&priv->curr_list);
1564 INIT_LIST_HEAD(&priv->ethtool_list);
1565 memset(&priv->ethtool_rules[0], 0,
1566 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1567
1568
1569 dev->mtu = min(dev->mtu, priv->max_mtu);
1570 mlx4_en_calc_rx_buf(dev);
1571 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1572
1573
1574 err = mlx4_en_activate_rx_rings(priv);
1575 if (err) {
1576 en_err(priv, "Failed to activate RX rings\n");
1577 return err;
1578 }
1579 for (i = 0; i < priv->rx_ring_num; i++) {
1580 cq = priv->rx_cq[i];
1581
1582 err = mlx4_en_init_affinity_hint(priv, i);
1583 if (err) {
1584 en_err(priv, "Failed preparing IRQ affinity hint\n");
1585 goto cq_err;
1586 }
1587
1588 err = mlx4_en_activate_cq(priv, cq, i);
1589 if (err) {
1590 en_err(priv, "Failed activating Rx CQ\n");
1591 mlx4_en_free_affinity_hint(priv, i);
1592 goto cq_err;
1593 }
1594
1595 for (j = 0; j < cq->size; j++) {
1596 struct mlx4_cqe *cqe = NULL;
1597
1598 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1599 priv->cqe_factor;
1600 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1601 }
1602
1603 err = mlx4_en_set_cq_moder(priv, cq);
1604 if (err) {
1605 en_err(priv, "Failed setting cq moderation parameters\n");
1606 mlx4_en_deactivate_cq(priv, cq);
1607 mlx4_en_free_affinity_hint(priv, i);
1608 goto cq_err;
1609 }
1610 mlx4_en_arm_cq(priv, cq);
1611 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1612 ++rx_index;
1613 }
1614
1615
1616 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1617 err = mlx4_en_get_qp(priv);
1618 if (err) {
1619 en_err(priv, "Failed getting eth qp\n");
1620 goto cq_err;
1621 }
1622 mdev->mac_removed[priv->port] = 0;
1623
1624 priv->counter_index =
1625 mlx4_get_default_counter_index(mdev->dev, priv->port);
1626
1627 err = mlx4_en_config_rss_steer(priv);
1628 if (err) {
1629 en_err(priv, "Failed configuring rss steering\n");
1630 goto mac_err;
1631 }
1632
1633 err = mlx4_en_create_drop_qp(priv);
1634 if (err)
1635 goto rss_err;
1636
1637
1638 for (i = 0; i < priv->tx_ring_num; i++) {
1639
1640 cq = priv->tx_cq[i];
1641 err = mlx4_en_activate_cq(priv, cq, i);
1642 if (err) {
1643 en_err(priv, "Failed allocating Tx CQ\n");
1644 goto tx_err;
1645 }
1646 err = mlx4_en_set_cq_moder(priv, cq);
1647 if (err) {
1648 en_err(priv, "Failed setting cq moderation parameters\n");
1649 mlx4_en_deactivate_cq(priv, cq);
1650 goto tx_err;
1651 }
1652 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
1653 cq->buf->wqe_index = cpu_to_be16(0xffff);
1654
1655
1656 tx_ring = priv->tx_ring[i];
1657 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
1658 i / priv->num_tx_rings_p_up);
1659 if (err) {
1660 en_err(priv, "Failed allocating Tx ring\n");
1661 mlx4_en_deactivate_cq(priv, cq);
1662 goto tx_err;
1663 }
1664 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1665
1666 mlx4_en_init_recycle_ring(priv, i);
1667
1668
1669 mlx4_en_arm_cq(priv, cq);
1670
1671
1672 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1673 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
1674 ++tx_index;
1675 }
1676
1677
1678 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1679 priv->rx_skb_size + ETH_FCS_LEN,
1680 priv->prof->tx_pause,
1681 priv->prof->tx_ppp,
1682 priv->prof->rx_pause,
1683 priv->prof->rx_ppp);
1684 if (err) {
1685 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1686 priv->port, err);
1687 goto tx_err;
1688 }
1689
1690 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1691 if (err) {
1692 en_err(priv, "Failed setting default qp numbers\n");
1693 goto tx_err;
1694 }
1695
1696 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1697 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1698 if (err) {
1699 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1700 err);
1701 goto tx_err;
1702 }
1703 }
1704
1705
1706 en_dbg(HW, priv, "Initializing port\n");
1707 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1708 if (err) {
1709 en_err(priv, "Failed Initializing port\n");
1710 goto tx_err;
1711 }
1712
1713
1714 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
1715 mlx4_en_set_rss_steer_rules(priv))
1716 mlx4_warn(mdev, "Failed setting steering rules\n");
1717
1718
1719 eth_broadcast_addr(&mc_list[10]);
1720 mc_list[5] = priv->port;
1721 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
1722 priv->port, 0, MLX4_PROT_ETH,
1723 &priv->broadcast_id))
1724 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1725
1726
1727 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1728
1729
1730 queue_work(mdev->workqueue, &priv->rx_mode_task);
1731
1732 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1733 udp_tunnel_get_rx_info(dev);
1734
1735 priv->port_up = true;
1736 netif_tx_start_all_queues(dev);
1737 netif_device_attach(dev);
1738
1739 return 0;
1740
1741tx_err:
1742 while (tx_index--) {
1743 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
1744 mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
1745 }
1746 mlx4_en_destroy_drop_qp(priv);
1747rss_err:
1748 mlx4_en_release_rss_steer(priv);
1749mac_err:
1750 mlx4_en_put_qp(priv);
1751cq_err:
1752 while (rx_index--) {
1753 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1754 mlx4_en_free_affinity_hint(priv, rx_index);
1755 }
1756 for (i = 0; i < priv->rx_ring_num; i++)
1757 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1758
1759 return err;
1760}
1761
1762
1763void mlx4_en_stop_port(struct net_device *dev, int detach)
1764{
1765 struct mlx4_en_priv *priv = netdev_priv(dev);
1766 struct mlx4_en_dev *mdev = priv->mdev;
1767 struct mlx4_en_mc_list *mclist, *tmp;
1768 struct ethtool_flow_id *flow, *tmp_flow;
1769 int i;
1770 u8 mc_list[16] = {0};
1771
1772 if (!priv->port_up) {
1773 en_dbg(DRV, priv, "stop port called while port already down\n");
1774 return;
1775 }
1776
1777
1778 mlx4_CLOSE_PORT(mdev->dev, priv->port);
1779
1780
1781 netif_tx_lock_bh(dev);
1782 if (detach)
1783 netif_device_detach(dev);
1784 netif_tx_stop_all_queues(dev);
1785 netif_tx_unlock_bh(dev);
1786
1787 netif_tx_disable(dev);
1788
1789
1790 priv->port_up = false;
1791 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
1792
1793
1794 if (mdev->dev->caps.steering_mode ==
1795 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1796 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1797 MLX4_EN_FLAG_MC_PROMISC);
1798 mlx4_flow_steer_promisc_remove(mdev->dev,
1799 priv->port,
1800 MLX4_FS_ALL_DEFAULT);
1801 mlx4_flow_steer_promisc_remove(mdev->dev,
1802 priv->port,
1803 MLX4_FS_MC_DEFAULT);
1804 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1805 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1806
1807
1808 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1809 priv->port);
1810
1811
1812 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1813 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1814 priv->port);
1815 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1816 }
1817 }
1818
1819
1820 eth_broadcast_addr(&mc_list[10]);
1821 mc_list[5] = priv->port;
1822 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
1823 MLX4_PROT_ETH, priv->broadcast_id);
1824 list_for_each_entry(mclist, &priv->curr_list, list) {
1825 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1826 mc_list[5] = priv->port;
1827 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
1828 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1829 if (mclist->tunnel_reg_id)
1830 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1831 }
1832 mlx4_en_clear_list(dev);
1833 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1834 list_del(&mclist->list);
1835 kfree(mclist);
1836 }
1837
1838
1839 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1840
1841
1842 if (mdev->dev->caps.steering_mode ==
1843 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1844 ASSERT_RTNL();
1845 list_for_each_entry_safe(flow, tmp_flow,
1846 &priv->ethtool_list, list) {
1847 mlx4_flow_detach(mdev->dev, flow->id);
1848 list_del(&flow->list);
1849 }
1850 }
1851
1852 mlx4_en_destroy_drop_qp(priv);
1853
1854
1855 for (i = 0; i < priv->tx_ring_num; i++) {
1856 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
1857 mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
1858 }
1859 msleep(10);
1860
1861 for (i = 0; i < priv->tx_ring_num; i++)
1862 mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
1863
1864 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
1865 mlx4_en_delete_rss_steer_rules(priv);
1866
1867
1868 mlx4_en_release_rss_steer(priv);
1869
1870
1871 mlx4_en_put_qp(priv);
1872 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
1873 mdev->mac_removed[priv->port] = 1;
1874
1875
1876 for (i = 0; i < priv->rx_ring_num; i++) {
1877 struct mlx4_en_cq *cq = priv->rx_cq[i];
1878
1879 napi_synchronize(&cq->napi);
1880 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1881 mlx4_en_deactivate_cq(priv, cq);
1882
1883 mlx4_en_free_affinity_hint(priv, i);
1884 }
1885}
1886
1887static void mlx4_en_restart(struct work_struct *work)
1888{
1889 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1890 watchdog_task);
1891 struct mlx4_en_dev *mdev = priv->mdev;
1892 struct net_device *dev = priv->dev;
1893
1894 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1895
1896 rtnl_lock();
1897 mutex_lock(&mdev->state_lock);
1898 if (priv->port_up) {
1899 mlx4_en_stop_port(dev, 1);
1900 if (mlx4_en_start_port(dev))
1901 en_err(priv, "Failed restarting port %d\n", priv->port);
1902 }
1903 mutex_unlock(&mdev->state_lock);
1904 rtnl_unlock();
1905}
1906
1907static void mlx4_en_clear_stats(struct net_device *dev)
1908{
1909 struct mlx4_en_priv *priv = netdev_priv(dev);
1910 struct mlx4_en_dev *mdev = priv->mdev;
1911 int i;
1912
1913 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
1914 en_dbg(HW, priv, "Failed dumping statistics\n");
1915
1916 memset(&priv->pstats, 0, sizeof(priv->pstats));
1917 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1918 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
1919 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
1920 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
1921 memset(&priv->rx_priority_flowstats, 0,
1922 sizeof(priv->rx_priority_flowstats));
1923 memset(&priv->tx_priority_flowstats, 0,
1924 sizeof(priv->tx_priority_flowstats));
1925 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
1926
1927 for (i = 0; i < priv->tx_ring_num; i++) {
1928 priv->tx_ring[i]->bytes = 0;
1929 priv->tx_ring[i]->packets = 0;
1930 priv->tx_ring[i]->tx_csum = 0;
1931 priv->tx_ring[i]->tx_dropped = 0;
1932 priv->tx_ring[i]->queue_stopped = 0;
1933 priv->tx_ring[i]->wake_queue = 0;
1934 priv->tx_ring[i]->tso_packets = 0;
1935 priv->tx_ring[i]->xmit_more = 0;
1936 }
1937 for (i = 0; i < priv->rx_ring_num; i++) {
1938 priv->rx_ring[i]->bytes = 0;
1939 priv->rx_ring[i]->packets = 0;
1940 priv->rx_ring[i]->csum_ok = 0;
1941 priv->rx_ring[i]->csum_none = 0;
1942 priv->rx_ring[i]->csum_complete = 0;
1943 }
1944}
1945
1946static int mlx4_en_open(struct net_device *dev)
1947{
1948 struct mlx4_en_priv *priv = netdev_priv(dev);
1949 struct mlx4_en_dev *mdev = priv->mdev;
1950 int err = 0;
1951
1952 mutex_lock(&mdev->state_lock);
1953
1954 if (!mdev->device_up) {
1955 en_err(priv, "Cannot open - device down/disabled\n");
1956 err = -EBUSY;
1957 goto out;
1958 }
1959
1960
1961 mlx4_en_clear_stats(dev);
1962
1963 err = mlx4_en_start_port(dev);
1964 if (err)
1965 en_err(priv, "Failed starting port:%d\n", priv->port);
1966
1967out:
1968 mutex_unlock(&mdev->state_lock);
1969 return err;
1970}
1971
1972
1973static int mlx4_en_close(struct net_device *dev)
1974{
1975 struct mlx4_en_priv *priv = netdev_priv(dev);
1976 struct mlx4_en_dev *mdev = priv->mdev;
1977
1978 en_dbg(IFDOWN, priv, "Close port called\n");
1979
1980 mutex_lock(&mdev->state_lock);
1981
1982 mlx4_en_stop_port(dev, 0);
1983 netif_carrier_off(dev);
1984
1985 mutex_unlock(&mdev->state_lock);
1986 return 0;
1987}
1988
1989static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
1990{
1991 int i;
1992
1993#ifdef CONFIG_RFS_ACCEL
1994 priv->dev->rx_cpu_rmap = NULL;
1995#endif
1996
1997 for (i = 0; i < priv->tx_ring_num; i++) {
1998 if (priv->tx_ring && priv->tx_ring[i])
1999 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
2000 if (priv->tx_cq && priv->tx_cq[i])
2001 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
2002 }
2003
2004 for (i = 0; i < priv->rx_ring_num; i++) {
2005 if (priv->rx_ring[i])
2006 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2007 priv->prof->rx_ring_size, priv->stride);
2008 if (priv->rx_cq[i])
2009 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2010 }
2011
2012}
2013
2014static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
2015{
2016 struct mlx4_en_port_profile *prof = priv->prof;
2017 int i;
2018 int node;
2019
2020
2021 for (i = 0; i < priv->tx_ring_num; i++) {
2022 node = cpu_to_node(i % num_online_cpus());
2023 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
2024 prof->tx_ring_size, i, TX, node))
2025 goto err;
2026
2027 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
2028 prof->tx_ring_size, TXBB_SIZE,
2029 node, i))
2030 goto err;
2031 }
2032
2033
2034 for (i = 0; i < priv->rx_ring_num; i++) {
2035 node = cpu_to_node(i % num_online_cpus());
2036 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
2037 prof->rx_ring_size, i, RX, node))
2038 goto err;
2039
2040 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
2041 prof->rx_ring_size, priv->stride,
2042 node))
2043 goto err;
2044 }
2045
2046#ifdef CONFIG_RFS_ACCEL
2047 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
2048#endif
2049
2050 return 0;
2051
2052err:
2053 en_err(priv, "Failed to allocate NIC resources\n");
2054 for (i = 0; i < priv->rx_ring_num; i++) {
2055 if (priv->rx_ring[i])
2056 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2057 prof->rx_ring_size,
2058 priv->stride);
2059 if (priv->rx_cq[i])
2060 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2061 }
2062 for (i = 0; i < priv->tx_ring_num; i++) {
2063 if (priv->tx_ring[i])
2064 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
2065 if (priv->tx_cq[i])
2066 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
2067 }
2068 return -ENOMEM;
2069}
2070
2071static void mlx4_en_shutdown(struct net_device *dev)
2072{
2073 rtnl_lock();
2074 netif_device_detach(dev);
2075 mlx4_en_close(dev);
2076 rtnl_unlock();
2077}
2078
2079static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
2080 struct mlx4_en_priv *src,
2081 struct mlx4_en_port_profile *prof)
2082{
2083 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
2084 sizeof(dst->hwtstamp_config));
2085 dst->num_tx_rings_p_up = src->mdev->profile.num_tx_rings_p_up;
2086 dst->tx_ring_num = prof->tx_ring_num;
2087 dst->rx_ring_num = prof->rx_ring_num;
2088 dst->flags = prof->flags;
2089 dst->mdev = src->mdev;
2090 dst->port = src->port;
2091 dst->dev = src->dev;
2092 dst->prof = prof;
2093 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2094 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2095
2096 dst->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
2097 GFP_KERNEL);
2098 if (!dst->tx_ring)
2099 return -ENOMEM;
2100
2101 dst->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
2102 GFP_KERNEL);
2103 if (!dst->tx_cq) {
2104 kfree(dst->tx_ring);
2105 return -ENOMEM;
2106 }
2107 return 0;
2108}
2109
2110static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
2111 struct mlx4_en_priv *src)
2112{
2113 memcpy(dst->rx_ring, src->rx_ring,
2114 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
2115 memcpy(dst->rx_cq, src->rx_cq,
2116 sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
2117 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
2118 sizeof(dst->hwtstamp_config));
2119 dst->tx_ring_num = src->tx_ring_num;
2120 dst->rx_ring_num = src->rx_ring_num;
2121 dst->tx_ring = src->tx_ring;
2122 dst->tx_cq = src->tx_cq;
2123 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
2124}
2125
2126int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
2127 struct mlx4_en_priv *tmp,
2128 struct mlx4_en_port_profile *prof)
2129{
2130 mlx4_en_copy_priv(tmp, priv, prof);
2131
2132 if (mlx4_en_alloc_resources(tmp)) {
2133 en_warn(priv,
2134 "%s: Resource allocation failed, using previous configuration\n",
2135 __func__);
2136 kfree(tmp->tx_ring);
2137 kfree(tmp->tx_cq);
2138 return -ENOMEM;
2139 }
2140 return 0;
2141}
2142
2143void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
2144 struct mlx4_en_priv *tmp)
2145{
2146 mlx4_en_free_resources(priv);
2147 mlx4_en_update_priv(priv, tmp);
2148}
2149
2150void mlx4_en_destroy_netdev(struct net_device *dev)
2151{
2152 struct mlx4_en_priv *priv = netdev_priv(dev);
2153 struct mlx4_en_dev *mdev = priv->mdev;
2154 bool shutdown = mdev->dev->persist->interface_state &
2155 MLX4_INTERFACE_STATE_SHUTDOWN;
2156
2157 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2158
2159
2160 if (priv->registered) {
2161 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
2162 priv->port));
2163 if (shutdown)
2164 mlx4_en_shutdown(dev);
2165 else
2166 unregister_netdev(dev);
2167 }
2168
2169 if (priv->allocated)
2170 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2171
2172 cancel_delayed_work(&priv->stats_task);
2173 cancel_delayed_work(&priv->service_task);
2174
2175 flush_workqueue(mdev->workqueue);
2176
2177 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2178 mlx4_en_remove_timestamp(mdev);
2179
2180
2181 mutex_lock(&mdev->state_lock);
2182 mdev->pndev[priv->port] = NULL;
2183 mdev->upper[priv->port] = NULL;
2184 mutex_unlock(&mdev->state_lock);
2185
2186#ifdef CONFIG_RFS_ACCEL
2187 mlx4_en_cleanup_filters(priv);
2188#endif
2189
2190 mlx4_en_free_resources(priv);
2191
2192 kfree(priv->tx_ring);
2193 kfree(priv->tx_cq);
2194
2195 if (!shutdown)
2196 free_netdev(dev);
2197}
2198
2199static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
2200{
2201 struct mlx4_en_priv *priv = netdev_priv(dev);
2202 struct mlx4_en_dev *mdev = priv->mdev;
2203 int err = 0;
2204
2205 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2206 dev->mtu, new_mtu);
2207
2208 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
2209 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
2210 return -EPERM;
2211 }
2212 if (priv->xdp_ring_num && MLX4_EN_EFF_MTU(new_mtu) > FRAG_SZ0) {
2213 en_err(priv, "MTU size:%d requires frags but XDP running\n",
2214 new_mtu);
2215 return -EOPNOTSUPP;
2216 }
2217 dev->mtu = new_mtu;
2218
2219 if (netif_running(dev)) {
2220 mutex_lock(&mdev->state_lock);
2221 if (!mdev->device_up) {
2222
2223
2224 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2225 } else {
2226 mlx4_en_stop_port(dev, 1);
2227 err = mlx4_en_start_port(dev);
2228 if (err) {
2229 en_err(priv, "Failed restarting port:%d\n",
2230 priv->port);
2231 queue_work(mdev->workqueue, &priv->watchdog_task);
2232 }
2233 }
2234 mutex_unlock(&mdev->state_lock);
2235 }
2236 return 0;
2237}
2238
2239static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2240{
2241 struct mlx4_en_priv *priv = netdev_priv(dev);
2242 struct mlx4_en_dev *mdev = priv->mdev;
2243 struct hwtstamp_config config;
2244
2245 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
2246 return -EFAULT;
2247
2248
2249 if (config.flags)
2250 return -EINVAL;
2251
2252
2253 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2254 return -EINVAL;
2255
2256
2257 switch (config.tx_type) {
2258 case HWTSTAMP_TX_OFF:
2259 case HWTSTAMP_TX_ON:
2260 break;
2261 default:
2262 return -ERANGE;
2263 }
2264
2265
2266 switch (config.rx_filter) {
2267 case HWTSTAMP_FILTER_NONE:
2268 break;
2269 case HWTSTAMP_FILTER_ALL:
2270 case HWTSTAMP_FILTER_SOME:
2271 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2272 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2273 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2274 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2275 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2276 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2277 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2278 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2279 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2280 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2281 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2282 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2283 config.rx_filter = HWTSTAMP_FILTER_ALL;
2284 break;
2285 default:
2286 return -ERANGE;
2287 }
2288
2289 if (mlx4_en_reset_config(dev, config, dev->features)) {
2290 config.tx_type = HWTSTAMP_TX_OFF;
2291 config.rx_filter = HWTSTAMP_FILTER_NONE;
2292 }
2293
2294 return copy_to_user(ifr->ifr_data, &config,
2295 sizeof(config)) ? -EFAULT : 0;
2296}
2297
2298static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2299{
2300 struct mlx4_en_priv *priv = netdev_priv(dev);
2301
2302 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
2303 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2304}
2305
2306static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2307{
2308 switch (cmd) {
2309 case SIOCSHWTSTAMP:
2310 return mlx4_en_hwtstamp_set(dev, ifr);
2311 case SIOCGHWTSTAMP:
2312 return mlx4_en_hwtstamp_get(dev, ifr);
2313 default:
2314 return -EOPNOTSUPP;
2315 }
2316}
2317
2318static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
2319 netdev_features_t features)
2320{
2321 struct mlx4_en_priv *en_priv = netdev_priv(netdev);
2322 struct mlx4_en_dev *mdev = en_priv->mdev;
2323
2324
2325
2326
2327
2328 if (features & NETIF_F_HW_VLAN_CTAG_RX &&
2329 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2330 features |= NETIF_F_HW_VLAN_STAG_RX;
2331 else
2332 features &= ~NETIF_F_HW_VLAN_STAG_RX;
2333
2334 return features;
2335}
2336
2337static int mlx4_en_set_features(struct net_device *netdev,
2338 netdev_features_t features)
2339{
2340 struct mlx4_en_priv *priv = netdev_priv(netdev);
2341 bool reset = false;
2342 int ret = 0;
2343
2344 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2345 en_info(priv, "Turn %s RX-FCS\n",
2346 (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2347 reset = true;
2348 }
2349
2350 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2351 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2352
2353 en_info(priv, "Turn %s RX-ALL\n",
2354 ignore_fcs_value ? "ON" : "OFF");
2355 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2356 priv->port, ignore_fcs_value);
2357 if (ret)
2358 return ret;
2359 }
2360
2361 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2362 en_info(priv, "Turn %s RX vlan strip offload\n",
2363 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2364 reset = true;
2365 }
2366
2367 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2368 en_info(priv, "Turn %s TX vlan strip offload\n",
2369 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2370
2371 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
2372 en_info(priv, "Turn %s TX S-VLAN strip offload\n",
2373 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
2374
2375 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2376 en_info(priv, "Turn %s loopback\n",
2377 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2378 mlx4_en_update_loopback_state(netdev, features);
2379 }
2380
2381 if (reset) {
2382 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2383 features);
2384 if (ret)
2385 return ret;
2386 }
2387
2388 return 0;
2389}
2390
2391static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2392{
2393 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2394 struct mlx4_en_dev *mdev = en_priv->mdev;
2395 u64 mac_u64 = mlx4_mac_to_u64(mac);
2396
2397 if (is_multicast_ether_addr(mac))
2398 return -EINVAL;
2399
2400 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
2401}
2402
2403static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
2404{
2405 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2406 struct mlx4_en_dev *mdev = en_priv->mdev;
2407
2408 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
2409}
2410
2411static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
2412 int max_tx_rate)
2413{
2414 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2415 struct mlx4_en_dev *mdev = en_priv->mdev;
2416
2417 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2418 max_tx_rate);
2419}
2420
2421static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
2422{
2423 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2424 struct mlx4_en_dev *mdev = en_priv->mdev;
2425
2426 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2427}
2428
2429static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
2430{
2431 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2432 struct mlx4_en_dev *mdev = en_priv->mdev;
2433
2434 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2435}
2436
2437static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
2438{
2439 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2440 struct mlx4_en_dev *mdev = en_priv->mdev;
2441
2442 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2443}
2444
2445static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
2446 struct ifla_vf_stats *vf_stats)
2447{
2448 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2449 struct mlx4_en_dev *mdev = en_priv->mdev;
2450
2451 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
2452}
2453
2454#define PORT_ID_BYTE_LEN 8
2455static int mlx4_en_get_phys_port_id(struct net_device *dev,
2456 struct netdev_phys_item_id *ppid)
2457{
2458 struct mlx4_en_priv *priv = netdev_priv(dev);
2459 struct mlx4_dev *mdev = priv->mdev->dev;
2460 int i;
2461 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
2462
2463 if (!phys_port_id)
2464 return -EOPNOTSUPP;
2465
2466 ppid->id_len = sizeof(phys_port_id);
2467 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2468 ppid->id[i] = phys_port_id & 0xff;
2469 phys_port_id >>= 8;
2470 }
2471 return 0;
2472}
2473
2474static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
2475{
2476 int ret;
2477 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2478 vxlan_add_task);
2479
2480 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2481 if (ret)
2482 goto out;
2483
2484 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2485 VXLAN_STEER_BY_OUTER_MAC, 1);
2486out:
2487 if (ret) {
2488 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2489 return;
2490 }
2491
2492
2493 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2494 NETIF_F_RXCSUM |
2495 NETIF_F_TSO | NETIF_F_TSO6 |
2496 NETIF_F_GSO_UDP_TUNNEL |
2497 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2498 NETIF_F_GSO_PARTIAL;
2499}
2500
2501static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
2502{
2503 int ret;
2504 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2505 vxlan_del_task);
2506
2507 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2508 NETIF_F_RXCSUM |
2509 NETIF_F_TSO | NETIF_F_TSO6 |
2510 NETIF_F_GSO_UDP_TUNNEL |
2511 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2512 NETIF_F_GSO_PARTIAL);
2513
2514 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2515 VXLAN_STEER_BY_OUTER_MAC, 0);
2516 if (ret)
2517 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2518
2519 priv->vxlan_port = 0;
2520}
2521
2522static void mlx4_en_add_vxlan_port(struct net_device *dev,
2523 struct udp_tunnel_info *ti)
2524{
2525 struct mlx4_en_priv *priv = netdev_priv(dev);
2526 __be16 port = ti->port;
2527 __be16 current_port;
2528
2529 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
2530 return;
2531
2532 if (ti->sa_family != AF_INET)
2533 return;
2534
2535 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2536 return;
2537
2538 current_port = priv->vxlan_port;
2539 if (current_port && current_port != port) {
2540 en_warn(priv, "vxlan port %d configured, can't add port %d\n",
2541 ntohs(current_port), ntohs(port));
2542 return;
2543 }
2544
2545 priv->vxlan_port = port;
2546 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
2547}
2548
2549static void mlx4_en_del_vxlan_port(struct net_device *dev,
2550 struct udp_tunnel_info *ti)
2551{
2552 struct mlx4_en_priv *priv = netdev_priv(dev);
2553 __be16 port = ti->port;
2554 __be16 current_port;
2555
2556 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
2557 return;
2558
2559 if (ti->sa_family != AF_INET)
2560 return;
2561
2562 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2563 return;
2564
2565 current_port = priv->vxlan_port;
2566 if (current_port != port) {
2567 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
2568 return;
2569 }
2570
2571 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
2572}
2573
2574static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2575 struct net_device *dev,
2576 netdev_features_t features)
2577{
2578 features = vlan_features_check(skb, features);
2579 features = vxlan_features_check(skb, features);
2580
2581
2582
2583
2584
2585 if (skb->encapsulation &&
2586 (skb->ip_summed == CHECKSUM_PARTIAL)) {
2587 struct mlx4_en_priv *priv = netdev_priv(dev);
2588
2589 if (!priv->vxlan_port ||
2590 (ip_hdr(skb)->version != 4) ||
2591 (udp_hdr(skb)->dest != priv->vxlan_port))
2592 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2593 }
2594
2595 return features;
2596}
2597
2598static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
2599{
2600 struct mlx4_en_priv *priv = netdev_priv(dev);
2601 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[queue_index];
2602 struct mlx4_update_qp_params params;
2603 int err;
2604
2605 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2606 return -EOPNOTSUPP;
2607
2608
2609 if (maxrate >> 12) {
2610 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2611 params.rate_val = maxrate / 1000;
2612 } else if (maxrate) {
2613 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2614 params.rate_val = maxrate;
2615 } else {
2616 params.rate_unit = 0;
2617 params.rate_val = 0;
2618 }
2619
2620 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2621 ¶ms);
2622 return err;
2623}
2624
2625static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
2626{
2627 struct mlx4_en_priv *priv = netdev_priv(dev);
2628 struct mlx4_en_dev *mdev = priv->mdev;
2629 struct bpf_prog *old_prog;
2630 int xdp_ring_num;
2631 int port_up = 0;
2632 int err;
2633 int i;
2634
2635 xdp_ring_num = prog ? ALIGN(priv->rx_ring_num, MLX4_EN_NUM_UP) : 0;
2636
2637
2638
2639
2640 if (priv->xdp_ring_num == xdp_ring_num) {
2641 if (prog) {
2642 prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
2643 if (IS_ERR(prog))
2644 return PTR_ERR(prog);
2645 }
2646 for (i = 0; i < priv->rx_ring_num; i++) {
2647
2648 old_prog = xchg(&priv->rx_ring[i]->xdp_prog, prog);
2649 if (old_prog)
2650 bpf_prog_put(old_prog);
2651 }
2652 return 0;
2653 }
2654
2655 if (priv->num_frags > 1) {
2656 en_err(priv, "Cannot set XDP if MTU requires multiple frags\n");
2657 return -EOPNOTSUPP;
2658 }
2659
2660 if (priv->tx_ring_num < xdp_ring_num + MLX4_EN_NUM_UP) {
2661 en_err(priv,
2662 "Minimum %d tx channels required to run XDP\n",
2663 (xdp_ring_num + MLX4_EN_NUM_UP) / MLX4_EN_NUM_UP);
2664 return -EINVAL;
2665 }
2666
2667 if (prog) {
2668 prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
2669 if (IS_ERR(prog))
2670 return PTR_ERR(prog);
2671 }
2672
2673 mutex_lock(&mdev->state_lock);
2674 if (priv->port_up) {
2675 port_up = 1;
2676 mlx4_en_stop_port(dev, 1);
2677 }
2678
2679 priv->xdp_ring_num = xdp_ring_num;
2680 netif_set_real_num_tx_queues(dev, priv->tx_ring_num -
2681 priv->xdp_ring_num);
2682
2683 for (i = 0; i < priv->rx_ring_num; i++) {
2684 old_prog = xchg(&priv->rx_ring[i]->xdp_prog, prog);
2685 if (old_prog)
2686 bpf_prog_put(old_prog);
2687 }
2688
2689 if (port_up) {
2690 err = mlx4_en_start_port(dev);
2691 if (err) {
2692 en_err(priv, "Failed starting port %d for XDP change\n",
2693 priv->port);
2694 queue_work(mdev->workqueue, &priv->watchdog_task);
2695 }
2696 }
2697
2698 mutex_unlock(&mdev->state_lock);
2699 return 0;
2700}
2701
2702static bool mlx4_xdp_attached(struct net_device *dev)
2703{
2704 struct mlx4_en_priv *priv = netdev_priv(dev);
2705
2706 return !!priv->xdp_ring_num;
2707}
2708
2709static int mlx4_xdp(struct net_device *dev, struct netdev_xdp *xdp)
2710{
2711 switch (xdp->command) {
2712 case XDP_SETUP_PROG:
2713 return mlx4_xdp_set(dev, xdp->prog);
2714 case XDP_QUERY_PROG:
2715 xdp->prog_attached = mlx4_xdp_attached(dev);
2716 return 0;
2717 default:
2718 return -EINVAL;
2719 }
2720}
2721
2722static const struct net_device_ops mlx4_netdev_ops = {
2723 .ndo_open = mlx4_en_open,
2724 .ndo_stop = mlx4_en_close,
2725 .ndo_start_xmit = mlx4_en_xmit,
2726 .ndo_select_queue = mlx4_en_select_queue,
2727 .ndo_get_stats64 = mlx4_en_get_stats64,
2728 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2729 .ndo_set_mac_address = mlx4_en_set_mac,
2730 .ndo_validate_addr = eth_validate_addr,
2731 .ndo_change_mtu = mlx4_en_change_mtu,
2732 .ndo_do_ioctl = mlx4_en_ioctl,
2733 .ndo_tx_timeout = mlx4_en_tx_timeout,
2734 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2735 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2736#ifdef CONFIG_NET_POLL_CONTROLLER
2737 .ndo_poll_controller = mlx4_en_netpoll,
2738#endif
2739 .ndo_set_features = mlx4_en_set_features,
2740 .ndo_fix_features = mlx4_en_fix_features,
2741 .ndo_setup_tc = __mlx4_en_setup_tc,
2742#ifdef CONFIG_RFS_ACCEL
2743 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2744#endif
2745 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2746 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
2747 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
2748 .ndo_features_check = mlx4_en_features_check,
2749 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2750 .ndo_xdp = mlx4_xdp,
2751};
2752
2753static const struct net_device_ops mlx4_netdev_ops_master = {
2754 .ndo_open = mlx4_en_open,
2755 .ndo_stop = mlx4_en_close,
2756 .ndo_start_xmit = mlx4_en_xmit,
2757 .ndo_select_queue = mlx4_en_select_queue,
2758 .ndo_get_stats64 = mlx4_en_get_stats64,
2759 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2760 .ndo_set_mac_address = mlx4_en_set_mac,
2761 .ndo_validate_addr = eth_validate_addr,
2762 .ndo_change_mtu = mlx4_en_change_mtu,
2763 .ndo_tx_timeout = mlx4_en_tx_timeout,
2764 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2765 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2766 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
2767 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
2768 .ndo_set_vf_rate = mlx4_en_set_vf_rate,
2769 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
2770 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2771 .ndo_get_vf_stats = mlx4_en_get_vf_stats,
2772 .ndo_get_vf_config = mlx4_en_get_vf_config,
2773#ifdef CONFIG_NET_POLL_CONTROLLER
2774 .ndo_poll_controller = mlx4_en_netpoll,
2775#endif
2776 .ndo_set_features = mlx4_en_set_features,
2777 .ndo_fix_features = mlx4_en_fix_features,
2778 .ndo_setup_tc = __mlx4_en_setup_tc,
2779#ifdef CONFIG_RFS_ACCEL
2780 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2781#endif
2782 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2783 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
2784 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
2785 .ndo_features_check = mlx4_en_features_check,
2786 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2787 .ndo_xdp = mlx4_xdp,
2788};
2789
2790struct mlx4_en_bond {
2791 struct work_struct work;
2792 struct mlx4_en_priv *priv;
2793 int is_bonded;
2794 struct mlx4_port_map port_map;
2795};
2796
2797static void mlx4_en_bond_work(struct work_struct *work)
2798{
2799 struct mlx4_en_bond *bond = container_of(work,
2800 struct mlx4_en_bond,
2801 work);
2802 int err = 0;
2803 struct mlx4_dev *dev = bond->priv->mdev->dev;
2804
2805 if (bond->is_bonded) {
2806 if (!mlx4_is_bonded(dev)) {
2807 err = mlx4_bond(dev);
2808 if (err)
2809 en_err(bond->priv, "Fail to bond device\n");
2810 }
2811 if (!err) {
2812 err = mlx4_port_map_set(dev, &bond->port_map);
2813 if (err)
2814 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
2815 bond->port_map.port1,
2816 bond->port_map.port2,
2817 err);
2818 }
2819 } else if (mlx4_is_bonded(dev)) {
2820 err = mlx4_unbond(dev);
2821 if (err)
2822 en_err(bond->priv, "Fail to unbond device\n");
2823 }
2824 dev_put(bond->priv->dev);
2825 kfree(bond);
2826}
2827
2828static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
2829 u8 v2p_p1, u8 v2p_p2)
2830{
2831 struct mlx4_en_bond *bond = NULL;
2832
2833 bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
2834 if (!bond)
2835 return -ENOMEM;
2836
2837 INIT_WORK(&bond->work, mlx4_en_bond_work);
2838 bond->priv = priv;
2839 bond->is_bonded = is_bonded;
2840 bond->port_map.port1 = v2p_p1;
2841 bond->port_map.port2 = v2p_p2;
2842 dev_hold(priv->dev);
2843 queue_work(priv->mdev->workqueue, &bond->work);
2844 return 0;
2845}
2846
2847int mlx4_en_netdev_event(struct notifier_block *this,
2848 unsigned long event, void *ptr)
2849{
2850 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2851 u8 port = 0;
2852 struct mlx4_en_dev *mdev;
2853 struct mlx4_dev *dev;
2854 int i, num_eth_ports = 0;
2855 bool do_bond = true;
2856 struct mlx4_en_priv *priv;
2857 u8 v2p_port1 = 0;
2858 u8 v2p_port2 = 0;
2859
2860 if (!net_eq(dev_net(ndev), &init_net))
2861 return NOTIFY_DONE;
2862
2863 mdev = container_of(this, struct mlx4_en_dev, nb);
2864 dev = mdev->dev;
2865
2866
2867
2868
2869 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
2870 ++num_eth_ports;
2871 if (!port && (mdev->pndev[i] == ndev))
2872 port = i;
2873 mdev->upper[i] = mdev->pndev[i] ?
2874 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
2875
2876 if (!mdev->upper[i])
2877 do_bond = false;
2878 if (num_eth_ports < 2)
2879 continue;
2880
2881 if (mdev->upper[i] != mdev->upper[i-1])
2882 do_bond = false;
2883 }
2884
2885 do_bond = (num_eth_ports == 2) ? do_bond : false;
2886
2887
2888 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
2889 return NOTIFY_DONE;
2890
2891 priv = netdev_priv(ndev);
2892 if (do_bond) {
2893 struct netdev_notifier_bonding_info *notifier_info = ptr;
2894 struct netdev_bonding_info *bonding_info =
2895 ¬ifier_info->bonding_info;
2896
2897
2898 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
2899 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
2900 (bonding_info->master.bond_mode != BOND_MODE_8023AD))
2901 do_bond = false;
2902
2903
2904 if (bonding_info->master.num_slaves != 2)
2905 do_bond = false;
2906
2907
2908 if (do_bond) {
2909 if (bonding_info->master.bond_mode ==
2910 BOND_MODE_ACTIVEBACKUP) {
2911
2912
2913
2914 if (bonding_info->slave.state ==
2915 BOND_STATE_BACKUP) {
2916 if (port == 1) {
2917 v2p_port1 = 2;
2918 v2p_port2 = 2;
2919 } else {
2920 v2p_port1 = 1;
2921 v2p_port2 = 1;
2922 }
2923 } else {
2924 if (port == 1) {
2925 v2p_port1 = 1;
2926 v2p_port2 = 1;
2927 } else {
2928 v2p_port1 = 2;
2929 v2p_port2 = 2;
2930 }
2931 }
2932 } else {
2933
2934
2935
2936 __s8 link = bonding_info->slave.link;
2937
2938 if (port == 1)
2939 v2p_port2 = 2;
2940 else
2941 v2p_port1 = 1;
2942 if ((link == BOND_LINK_UP) ||
2943 (link == BOND_LINK_FAIL)) {
2944 if (port == 1)
2945 v2p_port1 = 1;
2946 else
2947 v2p_port2 = 2;
2948 } else {
2949 if (port == 1)
2950 v2p_port1 = 2;
2951 else
2952 v2p_port2 = 1;
2953 }
2954 }
2955 }
2956 }
2957
2958 mlx4_en_queue_bond_work(priv, do_bond,
2959 v2p_port1, v2p_port2);
2960
2961 return NOTIFY_DONE;
2962}
2963
2964void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
2965 struct mlx4_en_stats_bitmap *stats_bitmap,
2966 u8 rx_ppp, u8 rx_pause,
2967 u8 tx_ppp, u8 tx_pause)
2968{
2969 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
2970
2971 if (!mlx4_is_slave(dev) &&
2972 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
2973 mutex_lock(&stats_bitmap->mutex);
2974 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
2975
2976 if (rx_ppp)
2977 bitmap_set(stats_bitmap->bitmap, last_i,
2978 NUM_FLOW_PRIORITY_STATS_RX);
2979 last_i += NUM_FLOW_PRIORITY_STATS_RX;
2980
2981 if (rx_pause && !(rx_ppp))
2982 bitmap_set(stats_bitmap->bitmap, last_i,
2983 NUM_FLOW_STATS_RX);
2984 last_i += NUM_FLOW_STATS_RX;
2985
2986 if (tx_ppp)
2987 bitmap_set(stats_bitmap->bitmap, last_i,
2988 NUM_FLOW_PRIORITY_STATS_TX);
2989 last_i += NUM_FLOW_PRIORITY_STATS_TX;
2990
2991 if (tx_pause && !(tx_ppp))
2992 bitmap_set(stats_bitmap->bitmap, last_i,
2993 NUM_FLOW_STATS_TX);
2994 last_i += NUM_FLOW_STATS_TX;
2995
2996 mutex_unlock(&stats_bitmap->mutex);
2997 }
2998}
2999
3000void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
3001 struct mlx4_en_stats_bitmap *stats_bitmap,
3002 u8 rx_ppp, u8 rx_pause,
3003 u8 tx_ppp, u8 tx_pause)
3004{
3005 int last_i = 0;
3006
3007 mutex_init(&stats_bitmap->mutex);
3008 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
3009
3010 if (mlx4_is_slave(dev)) {
3011 bitmap_set(stats_bitmap->bitmap, last_i +
3012 MLX4_FIND_NETDEV_STAT(rx_packets), 1);
3013 bitmap_set(stats_bitmap->bitmap, last_i +
3014 MLX4_FIND_NETDEV_STAT(tx_packets), 1);
3015 bitmap_set(stats_bitmap->bitmap, last_i +
3016 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
3017 bitmap_set(stats_bitmap->bitmap, last_i +
3018 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
3019 bitmap_set(stats_bitmap->bitmap, last_i +
3020 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
3021 bitmap_set(stats_bitmap->bitmap, last_i +
3022 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
3023 } else {
3024 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
3025 }
3026 last_i += NUM_MAIN_STATS;
3027
3028 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
3029 last_i += NUM_PORT_STATS;
3030
3031 if (mlx4_is_master(dev))
3032 bitmap_set(stats_bitmap->bitmap, last_i,
3033 NUM_PF_STATS);
3034 last_i += NUM_PF_STATS;
3035
3036 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
3037 rx_ppp, rx_pause,
3038 tx_ppp, tx_pause);
3039 last_i += NUM_FLOW_STATS;
3040
3041 if (!mlx4_is_slave(dev))
3042 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
3043}
3044
3045int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
3046 struct mlx4_en_port_profile *prof)
3047{
3048 struct net_device *dev;
3049 struct mlx4_en_priv *priv;
3050 int i;
3051 int err;
3052
3053 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
3054 MAX_TX_RINGS, MAX_RX_RINGS);
3055 if (dev == NULL)
3056 return -ENOMEM;
3057
3058 netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
3059 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
3060
3061 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
3062 dev->dev_port = port - 1;
3063
3064
3065
3066
3067
3068 priv = netdev_priv(dev);
3069 memset(priv, 0, sizeof(struct mlx4_en_priv));
3070 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
3071 spin_lock_init(&priv->stats_lock);
3072 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
3073 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
3074 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
3075 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
3076 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
3077 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
3078 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
3079#ifdef CONFIG_RFS_ACCEL
3080 INIT_LIST_HEAD(&priv->filters);
3081 spin_lock_init(&priv->filters_lock);
3082#endif
3083
3084 priv->dev = dev;
3085 priv->mdev = mdev;
3086 priv->ddev = &mdev->pdev->dev;
3087 priv->prof = prof;
3088 priv->port = port;
3089 priv->port_up = false;
3090 priv->flags = prof->flags;
3091 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
3092 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
3093 MLX4_WQE_CTRL_SOLICITED);
3094 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
3095 priv->tx_ring_num = prof->tx_ring_num;
3096 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
3097 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
3098
3099 priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
3100 GFP_KERNEL);
3101 if (!priv->tx_ring) {
3102 err = -ENOMEM;
3103 goto out;
3104 }
3105 priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
3106 GFP_KERNEL);
3107 if (!priv->tx_cq) {
3108 err = -ENOMEM;
3109 goto out;
3110 }
3111 priv->rx_ring_num = prof->rx_ring_num;
3112 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
3113 priv->cqe_size = mdev->dev->caps.cqe_size;
3114 priv->mac_index = -1;
3115 priv->msg_enable = MLX4_EN_MSG_LEVEL;
3116#ifdef CONFIG_MLX4_EN_DCB
3117 if (!mlx4_is_slave(priv->mdev->dev)) {
3118 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
3119 DCB_CAP_DCBX_VER_IEEE;
3120 priv->flags |= MLX4_EN_DCB_ENABLED;
3121 priv->cee_config.pfc_state = false;
3122
3123 for (i = 0; i < MLX4_EN_NUM_UP; i++)
3124 priv->cee_config.dcb_pfc[i] = pfc_disabled;
3125
3126 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
3127 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
3128 } else {
3129 en_info(priv, "enabling only PFC DCB ops\n");
3130 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
3131 }
3132 }
3133#endif
3134
3135 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
3136 INIT_HLIST_HEAD(&priv->mac_hash[i]);
3137
3138
3139 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
3140
3141 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
3142 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
3143 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
3144
3145
3146 dev->addr_len = ETH_ALEN;
3147 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
3148 if (!is_valid_ether_addr(dev->dev_addr)) {
3149 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
3150 priv->port, dev->dev_addr);
3151 err = -EINVAL;
3152 goto out;
3153 } else if (mlx4_is_slave(priv->mdev->dev) &&
3154 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
3155
3156
3157
3158 dev->addr_assign_type |= NET_ADDR_RANDOM;
3159 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
3160 }
3161
3162 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
3163
3164 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
3165 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
3166 err = mlx4_en_alloc_resources(priv);
3167 if (err)
3168 goto out;
3169
3170
3171 priv->hwtstamp_config.flags = 0;
3172 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
3173 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
3174
3175
3176 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
3177 MLX4_EN_PAGE_SIZE);
3178 if (err) {
3179 en_err(priv, "Failed to allocate page for rx qps\n");
3180 goto out;
3181 }
3182 priv->allocated = 1;
3183
3184
3185
3186
3187 if (mlx4_is_master(priv->mdev->dev))
3188 dev->netdev_ops = &mlx4_netdev_ops_master;
3189 else
3190 dev->netdev_ops = &mlx4_netdev_ops;
3191 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
3192 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
3193 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3194
3195 dev->ethtool_ops = &mlx4_en_ethtool_ops;
3196
3197
3198
3199
3200 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3201 if (mdev->LSO_support)
3202 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
3203
3204 dev->vlan_features = dev->hw_features;
3205
3206 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
3207 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
3208 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
3209 NETIF_F_HW_VLAN_CTAG_FILTER;
3210 dev->hw_features |= NETIF_F_LOOPBACK |
3211 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
3212
3213 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
3214 dev->features |= NETIF_F_HW_VLAN_STAG_RX |
3215 NETIF_F_HW_VLAN_STAG_FILTER;
3216 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
3217 }
3218
3219 if (mlx4_is_slave(mdev->dev)) {
3220 int phv;
3221
3222 err = get_phv_bit(mdev->dev, port, &phv);
3223 if (!err && phv) {
3224 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3225 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
3226 }
3227 } else {
3228 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
3229 !(mdev->dev->caps.flags2 &
3230 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
3231 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3232 }
3233
3234 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
3235 dev->hw_features |= NETIF_F_RXFCS;
3236
3237 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
3238 dev->hw_features |= NETIF_F_RXALL;
3239
3240 if (mdev->dev->caps.steering_mode ==
3241 MLX4_STEERING_MODE_DEVICE_MANAGED &&
3242 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
3243 dev->hw_features |= NETIF_F_NTUPLE;
3244
3245 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
3246 dev->priv_flags |= IFF_UNICAST_FLT;
3247
3248
3249 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
3250 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3251 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
3252 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
3253 } else {
3254 en_warn(priv,
3255 "No RSS hash capabilities exposed, using Toeplitz\n");
3256 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3257 }
3258
3259 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3260 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
3261 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3262 NETIF_F_GSO_PARTIAL;
3263 dev->features |= NETIF_F_GSO_UDP_TUNNEL |
3264 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3265 NETIF_F_GSO_PARTIAL;
3266 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
3267 }
3268
3269 mdev->pndev[port] = dev;
3270 mdev->upper[port] = NULL;
3271
3272 netif_carrier_off(dev);
3273 mlx4_en_set_default_moderation(priv);
3274
3275 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
3276 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
3277
3278 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
3279
3280
3281 mlx4_en_calc_rx_buf(dev);
3282 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
3283 priv->rx_skb_size + ETH_FCS_LEN,
3284 prof->tx_pause, prof->tx_ppp,
3285 prof->rx_pause, prof->rx_ppp);
3286 if (err) {
3287 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3288 priv->port, err);
3289 goto out;
3290 }
3291
3292 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3293 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3294 if (err) {
3295 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3296 err);
3297 goto out;
3298 }
3299 }
3300
3301
3302 en_warn(priv, "Initializing port\n");
3303 err = mlx4_INIT_PORT(mdev->dev, priv->port);
3304 if (err) {
3305 en_err(priv, "Failed Initializing port\n");
3306 goto out;
3307 }
3308 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3309
3310
3311 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3312 mlx4_en_init_timestamp(mdev);
3313
3314 queue_delayed_work(mdev->workqueue, &priv->service_task,
3315 SERVICE_TASK_DELAY);
3316
3317 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3318 mdev->profile.prof[priv->port].rx_ppp,
3319 mdev->profile.prof[priv->port].rx_pause,
3320 mdev->profile.prof[priv->port].tx_ppp,
3321 mdev->profile.prof[priv->port].tx_pause);
3322
3323 err = register_netdev(dev);
3324 if (err) {
3325 en_err(priv, "Netdev registration failed for port %d\n", port);
3326 goto out;
3327 }
3328
3329 priv->registered = 1;
3330 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
3331 dev);
3332
3333 return 0;
3334
3335out:
3336 mlx4_en_destroy_netdev(dev);
3337 return err;
3338}
3339
3340int mlx4_en_reset_config(struct net_device *dev,
3341 struct hwtstamp_config ts_config,
3342 netdev_features_t features)
3343{
3344 struct mlx4_en_priv *priv = netdev_priv(dev);
3345 struct mlx4_en_dev *mdev = priv->mdev;
3346 struct mlx4_en_port_profile new_prof;
3347 struct mlx4_en_priv *tmp;
3348 int port_up = 0;
3349 int err = 0;
3350
3351 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3352 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3353 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3354 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
3355 return 0;
3356
3357 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3358 (features & NETIF_F_HW_VLAN_CTAG_RX) &&
3359 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
3360 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
3361 return -EINVAL;
3362 }
3363
3364 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
3365 if (!tmp)
3366 return -ENOMEM;
3367
3368 mutex_lock(&mdev->state_lock);
3369
3370 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
3371 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
3372
3373 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof);
3374 if (err)
3375 goto out;
3376
3377 if (priv->port_up) {
3378 port_up = 1;
3379 mlx4_en_stop_port(dev, 1);
3380 }
3381
3382 en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
3383 ts_config.rx_filter,
3384 !!(features & NETIF_F_HW_VLAN_CTAG_RX));
3385
3386 mlx4_en_safe_replace_resources(priv, tmp);
3387
3388 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
3389 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3390 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3391 else
3392 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3393 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
3394
3395
3396
3397 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
3398 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3399 else
3400 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3401 }
3402
3403 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
3404 if (features & NETIF_F_RXFCS)
3405 dev->features |= NETIF_F_RXFCS;
3406 else
3407 dev->features &= ~NETIF_F_RXFCS;
3408 }
3409
3410
3411
3412
3413
3414 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
3415 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
3416 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
3417 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3418 }
3419
3420 if (port_up) {
3421 err = mlx4_en_start_port(dev);
3422 if (err)
3423 en_err(priv, "Failed starting port\n");
3424 }
3425
3426out:
3427 mutex_unlock(&mdev->state_lock);
3428 kfree(tmp);
3429 if (!err)
3430 netdev_features_change(dev);
3431 return err;
3432}
3433
