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9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/udp_tunnel.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
44
45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
56#define CHIP_NUM_57980S_10 0x1666
57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61#define CHIP_NUM_57980S_IOV 0x1664
62
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
70#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
71#endif
72
73enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
78static const struct pci_device_id qede_pci_tbl[] = {
79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
85#ifdef CONFIG_QED_SRIOV
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
87#endif
88 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
98static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
100static void qede_link_update(void *dev, struct qed_link_output *link);
101
102#ifdef CONFIG_QED_SRIOV
103static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
104{
105 struct qede_dev *edev = netdev_priv(ndev);
106
107 if (vlan > 4095) {
108 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
109 return -EINVAL;
110 }
111
112 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
113 vlan, vf);
114
115 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
116}
117
118static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
119{
120 struct qede_dev *edev = netdev_priv(ndev);
121
122 DP_VERBOSE(edev, QED_MSG_IOV,
123 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
124 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
125
126 if (!is_valid_ether_addr(mac)) {
127 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
128 return -EINVAL;
129 }
130
131 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
132}
133
134static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
135{
136 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
137 struct qed_dev_info *qed_info = &edev->dev_info.common;
138 int rc;
139
140 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
141
142 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
143
144
145 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
146 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
147 struct qed_update_vport_params params;
148
149 memset(¶ms, 0, sizeof(params));
150 params.vport_id = 0;
151 params.update_tx_switching_flg = 1;
152 params.tx_switching_flg = num_vfs_param ? 1 : 0;
153 edev->ops->vport_update(edev->cdev, ¶ms);
154 }
155
156 return rc;
157}
158#endif
159
160static struct pci_driver qede_pci_driver = {
161 .name = "qede",
162 .id_table = qede_pci_tbl,
163 .probe = qede_probe,
164 .remove = qede_remove,
165#ifdef CONFIG_QED_SRIOV
166 .sriov_configure = qede_sriov_configure,
167#endif
168};
169
170static void qede_force_mac(void *dev, u8 *mac)
171{
172 struct qede_dev *edev = dev;
173
174 ether_addr_copy(edev->ndev->dev_addr, mac);
175 ether_addr_copy(edev->primary_mac, mac);
176}
177
178static struct qed_eth_cb_ops qede_ll_ops = {
179 {
180 .link_update = qede_link_update,
181 },
182 .force_mac = qede_force_mac,
183};
184
185static int qede_netdev_event(struct notifier_block *this, unsigned long event,
186 void *ptr)
187{
188 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
189 struct ethtool_drvinfo drvinfo;
190 struct qede_dev *edev;
191
192
193 if (event != NETDEV_CHANGENAME)
194 goto done;
195
196
197 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
198 goto done;
199
200 memset(&drvinfo, 0, sizeof(drvinfo));
201 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
202 if (strcmp(drvinfo.driver, "qede"))
203 goto done;
204 edev = netdev_priv(ndev);
205
206
207 if (!edev->ops || !edev->ops->common)
208 goto done;
209 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
210 "qede");
211
212done:
213 return NOTIFY_DONE;
214}
215
216static struct notifier_block qede_netdev_notifier = {
217 .notifier_call = qede_netdev_event,
218};
219
220static
221int __init qede_init(void)
222{
223 int ret;
224
225 pr_notice("qede_init: %s\n", version);
226
227 qed_ops = qed_get_eth_ops();
228 if (!qed_ops) {
229 pr_notice("Failed to get qed ethtool operations\n");
230 return -EINVAL;
231 }
232
233
234
235
236 ret = register_netdevice_notifier(&qede_netdev_notifier);
237 if (ret) {
238 pr_notice("Failed to register netdevice_notifier\n");
239 qed_put_eth_ops();
240 return -EINVAL;
241 }
242
243 ret = pci_register_driver(&qede_pci_driver);
244 if (ret) {
245 pr_notice("Failed to register driver\n");
246 unregister_netdevice_notifier(&qede_netdev_notifier);
247 qed_put_eth_ops();
248 return -EINVAL;
249 }
250
251 return 0;
252}
253
254static void __exit qede_cleanup(void)
255{
256 pr_notice("qede_cleanup called\n");
257
258 unregister_netdevice_notifier(&qede_netdev_notifier);
259 pci_unregister_driver(&qede_pci_driver);
260 qed_put_eth_ops();
261}
262
263module_init(qede_init);
264module_exit(qede_cleanup);
265
266
267
268
269
270
271
272static int qede_free_tx_pkt(struct qede_dev *edev,
273 struct qede_tx_queue *txq,
274 int *len)
275{
276 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
277 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
278 struct eth_tx_1st_bd *first_bd;
279 struct eth_tx_bd *tx_data_bd;
280 int bds_consumed = 0;
281 int nbds;
282 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
283 int i, split_bd_len = 0;
284
285 if (unlikely(!skb)) {
286 DP_ERR(edev,
287 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
288 idx, txq->sw_tx_cons, txq->sw_tx_prod);
289 return -1;
290 }
291
292 *len = skb->len;
293
294 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
295
296 bds_consumed++;
297
298 nbds = first_bd->data.nbds;
299
300 if (data_split) {
301 struct eth_tx_bd *split = (struct eth_tx_bd *)
302 qed_chain_consume(&txq->tx_pbl);
303 split_bd_len = BD_UNMAP_LEN(split);
304 bds_consumed++;
305 }
306 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
307 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
308
309
310 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
311 tx_data_bd = (struct eth_tx_bd *)
312 qed_chain_consume(&txq->tx_pbl);
313 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
314 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
315 }
316
317 while (bds_consumed++ < nbds)
318 qed_chain_consume(&txq->tx_pbl);
319
320
321 dev_kfree_skb_any(skb);
322 txq->sw_tx_ring[idx].skb = NULL;
323 txq->sw_tx_ring[idx].flags = 0;
324
325 return 0;
326}
327
328
329static void qede_free_failed_tx_pkt(struct qede_dev *edev,
330 struct qede_tx_queue *txq,
331 struct eth_tx_1st_bd *first_bd,
332 int nbd,
333 bool data_split)
334{
335 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
336 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
337 struct eth_tx_bd *tx_data_bd;
338 int i, split_bd_len = 0;
339
340
341 qed_chain_set_prod(&txq->tx_pbl,
342 le16_to_cpu(txq->tx_db.data.bd_prod),
343 first_bd);
344
345 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
346
347 if (data_split) {
348 struct eth_tx_bd *split = (struct eth_tx_bd *)
349 qed_chain_produce(&txq->tx_pbl);
350 split_bd_len = BD_UNMAP_LEN(split);
351 nbd--;
352 }
353
354 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
355 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
356
357
358 for (i = 0; i < nbd; i++) {
359 tx_data_bd = (struct eth_tx_bd *)
360 qed_chain_produce(&txq->tx_pbl);
361 if (tx_data_bd->nbytes)
362 dma_unmap_page(&edev->pdev->dev,
363 BD_UNMAP_ADDR(tx_data_bd),
364 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
365 }
366
367
368 qed_chain_set_prod(&txq->tx_pbl,
369 le16_to_cpu(txq->tx_db.data.bd_prod),
370 first_bd);
371
372
373 dev_kfree_skb_any(skb);
374 txq->sw_tx_ring[idx].skb = NULL;
375 txq->sw_tx_ring[idx].flags = 0;
376}
377
378static u32 qede_xmit_type(struct qede_dev *edev,
379 struct sk_buff *skb,
380 int *ipv6_ext)
381{
382 u32 rc = XMIT_L4_CSUM;
383 __be16 l3_proto;
384
385 if (skb->ip_summed != CHECKSUM_PARTIAL)
386 return XMIT_PLAIN;
387
388 l3_proto = vlan_get_protocol(skb);
389 if (l3_proto == htons(ETH_P_IPV6) &&
390 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
391 *ipv6_ext = 1;
392
393 if (skb->encapsulation)
394 rc |= XMIT_ENC;
395
396 if (skb_is_gso(skb))
397 rc |= XMIT_LSO;
398
399 return rc;
400}
401
402static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
403 struct eth_tx_2nd_bd *second_bd,
404 struct eth_tx_3rd_bd *third_bd)
405{
406 u8 l4_proto;
407 u16 bd2_bits1 = 0, bd2_bits2 = 0;
408
409 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
410
411 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
412 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
413 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
414
415 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
416 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
417
418 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
419 l4_proto = ipv6_hdr(skb)->nexthdr;
420 else
421 l4_proto = ip_hdr(skb)->protocol;
422
423 if (l4_proto == IPPROTO_UDP)
424 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
425
426 if (third_bd)
427 third_bd->data.bitfields |=
428 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
429 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
430 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
431
432 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
433 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
434}
435
436static int map_frag_to_bd(struct qede_dev *edev,
437 skb_frag_t *frag,
438 struct eth_tx_bd *bd)
439{
440 dma_addr_t mapping;
441
442
443 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
444 skb_frag_size(frag),
445 DMA_TO_DEVICE);
446 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
447 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
448 return -ENOMEM;
449 }
450
451
452 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
453
454 return 0;
455}
456
457static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
458{
459 if (is_encap_pkt)
460 return (skb_inner_transport_header(skb) +
461 inner_tcp_hdrlen(skb) - skb->data);
462 else
463 return (skb_transport_header(skb) +
464 tcp_hdrlen(skb) - skb->data);
465}
466
467
468#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
469static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
470 u8 xmit_type)
471{
472 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
473
474 if (xmit_type & XMIT_LSO) {
475 int hlen;
476
477 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
478
479
480 if (skb_headlen(skb) > hlen)
481 allowed_frags--;
482 }
483
484 return (skb_shinfo(skb)->nr_frags > allowed_frags);
485}
486#endif
487
488static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
489{
490
491
492
493 wmb();
494 barrier();
495 writel(txq->tx_db.raw, txq->doorbell_addr);
496
497
498
499
500
501
502
503 mmiowb();
504}
505
506
507static
508netdev_tx_t qede_start_xmit(struct sk_buff *skb,
509 struct net_device *ndev)
510{
511 struct qede_dev *edev = netdev_priv(ndev);
512 struct netdev_queue *netdev_txq;
513 struct qede_tx_queue *txq;
514 struct eth_tx_1st_bd *first_bd;
515 struct eth_tx_2nd_bd *second_bd = NULL;
516 struct eth_tx_3rd_bd *third_bd = NULL;
517 struct eth_tx_bd *tx_data_bd = NULL;
518 u16 txq_index;
519 u8 nbd = 0;
520 dma_addr_t mapping;
521 int rc, frag_idx = 0, ipv6_ext = 0;
522 u8 xmit_type;
523 u16 idx;
524 u16 hlen;
525 bool data_split = false;
526
527
528 txq_index = skb_get_queue_mapping(skb);
529 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
530 txq = QEDE_TX_QUEUE(edev, txq_index);
531 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
532
533 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
534 (MAX_SKB_FRAGS + 1));
535
536 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
537
538#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
539 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
540 if (skb_linearize(skb)) {
541 DP_NOTICE(edev,
542 "SKB linearization failed - silently dropping this SKB\n");
543 dev_kfree_skb_any(skb);
544 return NETDEV_TX_OK;
545 }
546 }
547#endif
548
549
550 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
551 txq->sw_tx_ring[idx].skb = skb;
552 first_bd = (struct eth_tx_1st_bd *)
553 qed_chain_produce(&txq->tx_pbl);
554 memset(first_bd, 0, sizeof(*first_bd));
555 first_bd->data.bd_flags.bitfields =
556 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
557
558
559 mapping = dma_map_single(&edev->pdev->dev, skb->data,
560 skb_headlen(skb), DMA_TO_DEVICE);
561 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
562 DP_NOTICE(edev, "SKB mapping failed\n");
563 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
564 qede_update_tx_producer(txq);
565 return NETDEV_TX_OK;
566 }
567 nbd++;
568 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
569
570
571
572
573 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
574 second_bd = (struct eth_tx_2nd_bd *)
575 qed_chain_produce(&txq->tx_pbl);
576 memset(second_bd, 0, sizeof(*second_bd));
577
578 nbd++;
579 third_bd = (struct eth_tx_3rd_bd *)
580 qed_chain_produce(&txq->tx_pbl);
581 memset(third_bd, 0, sizeof(*third_bd));
582
583 nbd++;
584
585 tx_data_bd = (struct eth_tx_bd *)second_bd;
586 }
587
588 if (skb_vlan_tag_present(skb)) {
589 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
590 first_bd->data.bd_flags.bitfields |=
591 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
592 }
593
594
595 if (xmit_type & XMIT_L4_CSUM) {
596
597
598
599 first_bd->data.bd_flags.bitfields |=
600 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
601
602 if (xmit_type & XMIT_ENC) {
603 first_bd->data.bd_flags.bitfields |=
604 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
605 first_bd->data.bitfields |=
606 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
607 }
608
609
610
611
612
613 if (unlikely(ipv6_ext))
614 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
615 }
616
617 if (xmit_type & XMIT_LSO) {
618 first_bd->data.bd_flags.bitfields |=
619 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
620 third_bd->data.lso_mss =
621 cpu_to_le16(skb_shinfo(skb)->gso_size);
622
623 if (unlikely(xmit_type & XMIT_ENC)) {
624 first_bd->data.bd_flags.bitfields |=
625 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
626 hlen = qede_get_skb_hlen(skb, true);
627 } else {
628 first_bd->data.bd_flags.bitfields |=
629 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
630 hlen = qede_get_skb_hlen(skb, false);
631 }
632
633
634 third_bd->data.bitfields |=
635 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
636
637
638
639
640 if (unlikely(skb_headlen(skb) > hlen)) {
641 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
642 "TSO split header size is %d (%x:%x)\n",
643 first_bd->nbytes, first_bd->addr.hi,
644 first_bd->addr.lo);
645
646 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
647 le32_to_cpu(first_bd->addr.lo)) +
648 hlen;
649
650 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
651 le16_to_cpu(first_bd->nbytes) -
652 hlen);
653
654
655
656
657 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
658
659 first_bd->nbytes = cpu_to_le16(hlen);
660
661 tx_data_bd = (struct eth_tx_bd *)third_bd;
662 data_split = true;
663 }
664 } else {
665 first_bd->data.bitfields |=
666 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
667 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
668 }
669
670
671
672 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
673 rc = map_frag_to_bd(edev,
674 &skb_shinfo(skb)->frags[frag_idx],
675 tx_data_bd);
676 if (rc) {
677 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
678 data_split);
679 qede_update_tx_producer(txq);
680 return NETDEV_TX_OK;
681 }
682
683 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
684 tx_data_bd = (struct eth_tx_bd *)third_bd;
685 else
686 tx_data_bd = NULL;
687
688 frag_idx++;
689 }
690
691
692 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
693 tx_data_bd = (struct eth_tx_bd *)
694 qed_chain_produce(&txq->tx_pbl);
695
696 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
697
698 rc = map_frag_to_bd(edev,
699 &skb_shinfo(skb)->frags[frag_idx],
700 tx_data_bd);
701 if (rc) {
702 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
703 data_split);
704 qede_update_tx_producer(txq);
705 return NETDEV_TX_OK;
706 }
707 }
708
709
710 first_bd->data.nbds = nbd;
711
712 netdev_tx_sent_queue(netdev_txq, skb->len);
713
714 skb_tx_timestamp(skb);
715
716
717
718
719 txq->sw_tx_prod++;
720
721
722 txq->tx_db.data.bd_prod =
723 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
724
725 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
726 qede_update_tx_producer(txq);
727
728 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
729 < (MAX_SKB_FRAGS + 1))) {
730 if (skb->xmit_more)
731 qede_update_tx_producer(txq);
732
733 netif_tx_stop_queue(netdev_txq);
734 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
735 "Stop queue was called\n");
736
737
738
739
740 smp_mb();
741
742 if (qed_chain_get_elem_left(&txq->tx_pbl)
743 >= (MAX_SKB_FRAGS + 1) &&
744 (edev->state == QEDE_STATE_OPEN)) {
745 netif_tx_wake_queue(netdev_txq);
746 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
747 "Wake queue was called\n");
748 }
749 }
750
751 return NETDEV_TX_OK;
752}
753
754int qede_txq_has_work(struct qede_tx_queue *txq)
755{
756 u16 hw_bd_cons;
757
758
759 barrier();
760 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
761 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
762 return 0;
763
764 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
765}
766
767static int qede_tx_int(struct qede_dev *edev,
768 struct qede_tx_queue *txq)
769{
770 struct netdev_queue *netdev_txq;
771 u16 hw_bd_cons;
772 unsigned int pkts_compl = 0, bytes_compl = 0;
773 int rc;
774
775 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
776
777 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
778 barrier();
779
780 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
781 int len = 0;
782
783 rc = qede_free_tx_pkt(edev, txq, &len);
784 if (rc) {
785 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
786 hw_bd_cons,
787 qed_chain_get_cons_idx(&txq->tx_pbl));
788 break;
789 }
790
791 bytes_compl += len;
792 pkts_compl++;
793 txq->sw_tx_cons++;
794 }
795
796 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
797
798
799
800
801
802
803
804
805
806
807 smp_mb();
808
809 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
810
811
812
813
814
815
816
817
818
819
820 __netif_tx_lock(netdev_txq, smp_processor_id());
821
822 if ((netif_tx_queue_stopped(netdev_txq)) &&
823 (edev->state == QEDE_STATE_OPEN) &&
824 (qed_chain_get_elem_left(&txq->tx_pbl)
825 >= (MAX_SKB_FRAGS + 1))) {
826 netif_tx_wake_queue(netdev_txq);
827 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
828 "Wake queue was called\n");
829 }
830
831 __netif_tx_unlock(netdev_txq);
832 }
833
834 return 0;
835}
836
837bool qede_has_rx_work(struct qede_rx_queue *rxq)
838{
839 u16 hw_comp_cons, sw_comp_cons;
840
841
842 barrier();
843
844 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
845 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
846
847 return hw_comp_cons != sw_comp_cons;
848}
849
850static bool qede_has_tx_work(struct qede_fastpath *fp)
851{
852 u8 tc;
853
854 for (tc = 0; tc < fp->edev->num_tc; tc++)
855 if (qede_txq_has_work(&fp->txqs[tc]))
856 return true;
857 return false;
858}
859
860static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
861{
862 qed_chain_consume(&rxq->rx_bd_ring);
863 rxq->sw_rx_cons++;
864}
865
866
867
868
869static inline void qede_reuse_page(struct qede_dev *edev,
870 struct qede_rx_queue *rxq,
871 struct sw_rx_data *curr_cons)
872{
873 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
874 struct sw_rx_data *curr_prod;
875 dma_addr_t new_mapping;
876
877 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
878 *curr_prod = *curr_cons;
879
880 new_mapping = curr_prod->mapping + curr_prod->page_offset;
881
882 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
883 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
884
885 rxq->sw_rx_prod++;
886 curr_cons->data = NULL;
887}
888
889
890
891
892void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
893 struct qede_dev *edev, u8 count)
894{
895 struct sw_rx_data *curr_cons;
896
897 for (; count > 0; count--) {
898 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
899 qede_reuse_page(edev, rxq, curr_cons);
900 qede_rx_bd_ring_consume(rxq);
901 }
902}
903
904static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
905 struct qede_rx_queue *rxq,
906 struct sw_rx_data *curr_cons)
907{
908
909 curr_cons->page_offset += rxq->rx_buf_seg_size;
910
911 if (curr_cons->page_offset == PAGE_SIZE) {
912 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
913
914
915
916 curr_cons->page_offset -= rxq->rx_buf_seg_size;
917
918 return -ENOMEM;
919 }
920
921 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
922 PAGE_SIZE, DMA_FROM_DEVICE);
923 } else {
924
925
926
927
928 page_ref_inc(curr_cons->data);
929 qede_reuse_page(edev, rxq, curr_cons);
930 }
931
932 return 0;
933}
934
935static inline void qede_update_rx_prod(struct qede_dev *edev,
936 struct qede_rx_queue *rxq)
937{
938 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
939 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
940 struct eth_rx_prod_data rx_prods = {0};
941
942
943 rx_prods.bd_prod = cpu_to_le16(bd_prod);
944 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
945
946
947
948
949
950 wmb();
951
952 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
953 (u32 *)&rx_prods);
954
955
956
957
958
959
960
961 mmiowb();
962}
963
964static u32 qede_get_rxhash(struct qede_dev *edev,
965 u8 bitfields,
966 __le32 rss_hash,
967 enum pkt_hash_types *rxhash_type)
968{
969 enum rss_hash_type htype;
970
971 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
972
973 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
974 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
975 (htype == RSS_HASH_TYPE_IPV6)) ?
976 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
977 return le32_to_cpu(rss_hash);
978 }
979 *rxhash_type = PKT_HASH_TYPE_NONE;
980 return 0;
981}
982
983static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
984{
985 skb_checksum_none_assert(skb);
986
987 if (csum_flag & QEDE_CSUM_UNNECESSARY)
988 skb->ip_summed = CHECKSUM_UNNECESSARY;
989
990 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
991 skb->csum_level = 1;
992}
993
994static inline void qede_skb_receive(struct qede_dev *edev,
995 struct qede_fastpath *fp,
996 struct sk_buff *skb,
997 u16 vlan_tag)
998{
999 if (vlan_tag)
1000 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1001 vlan_tag);
1002
1003 napi_gro_receive(&fp->napi, skb);
1004}
1005
1006static void qede_set_gro_params(struct qede_dev *edev,
1007 struct sk_buff *skb,
1008 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1009{
1010 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1011
1012 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1013 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1014 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1015 else
1016 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1017
1018 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1019 cqe->header_len;
1020}
1021
1022static int qede_fill_frag_skb(struct qede_dev *edev,
1023 struct qede_rx_queue *rxq,
1024 u8 tpa_agg_index,
1025 u16 len_on_bd)
1026{
1027 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1028 NUM_RX_BDS_MAX];
1029 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1030 struct sk_buff *skb = tpa_info->skb;
1031
1032 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1033 goto out;
1034
1035
1036 skb_fill_page_desc(skb, tpa_info->frag_id++,
1037 current_bd->data, current_bd->page_offset,
1038 len_on_bd);
1039
1040 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
1041
1042
1043
1044 page_ref_inc(current_bd->data);
1045 goto out;
1046 }
1047
1048 qed_chain_consume(&rxq->rx_bd_ring);
1049 rxq->sw_rx_cons++;
1050
1051 skb->data_len += len_on_bd;
1052 skb->truesize += rxq->rx_buf_seg_size;
1053 skb->len += len_on_bd;
1054
1055 return 0;
1056
1057out:
1058 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1059 qede_recycle_rx_bd_ring(rxq, edev, 1);
1060 return -ENOMEM;
1061}
1062
1063static void qede_tpa_start(struct qede_dev *edev,
1064 struct qede_rx_queue *rxq,
1065 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1066{
1067 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1068 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1069 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1070 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1071 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1072 struct sw_rx_data *sw_rx_data_cons;
1073 struct sw_rx_data *sw_rx_data_prod;
1074 enum pkt_hash_types rxhash_type;
1075 u32 rxhash;
1076
1077 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1078 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1079
1080
1081
1082
1083
1084 sw_rx_data_prod->mapping = replace_buf->mapping;
1085
1086 sw_rx_data_prod->data = replace_buf->data;
1087 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1088 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1089 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1090
1091 rxq->sw_rx_prod++;
1092
1093
1094
1095
1096 tpa_info->start_buf = *sw_rx_data_cons;
1097 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1098 le32_to_cpu(rx_bd_cons->addr.lo));
1099
1100 tpa_info->start_buf_mapping = mapping;
1101 rxq->sw_rx_cons++;
1102
1103
1104
1105
1106
1107 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1108 le16_to_cpu(cqe->len_on_first_bd));
1109 if (unlikely(!tpa_info->skb)) {
1110 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
1111 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1112 goto cons_buf;
1113 }
1114
1115 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1116 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1117
1118
1119 tpa_info->frag_id = 0;
1120 tpa_info->agg_state = QEDE_AGG_STATE_START;
1121
1122 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1123 cqe->rss_hash, &rxhash_type);
1124 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1125 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1126 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1127 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1128 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1129 else
1130 tpa_info->vlan_tag = 0;
1131
1132
1133 qede_set_gro_params(edev, tpa_info->skb, cqe);
1134
1135cons_buf:
1136 if (likely(cqe->ext_bd_len_list[0]))
1137 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1138 le16_to_cpu(cqe->ext_bd_len_list[0]));
1139
1140 if (unlikely(cqe->ext_bd_len_list[1])) {
1141 DP_ERR(edev,
1142 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1143 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1144 }
1145}
1146
1147#ifdef CONFIG_INET
1148static void qede_gro_ip_csum(struct sk_buff *skb)
1149{
1150 const struct iphdr *iph = ip_hdr(skb);
1151 struct tcphdr *th;
1152
1153 skb_set_transport_header(skb, sizeof(struct iphdr));
1154 th = tcp_hdr(skb);
1155
1156 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1157 iph->saddr, iph->daddr, 0);
1158
1159 tcp_gro_complete(skb);
1160}
1161
1162static void qede_gro_ipv6_csum(struct sk_buff *skb)
1163{
1164 struct ipv6hdr *iph = ipv6_hdr(skb);
1165 struct tcphdr *th;
1166
1167 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1168 th = tcp_hdr(skb);
1169
1170 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1171 &iph->saddr, &iph->daddr, 0);
1172 tcp_gro_complete(skb);
1173}
1174#endif
1175
1176static void qede_gro_receive(struct qede_dev *edev,
1177 struct qede_fastpath *fp,
1178 struct sk_buff *skb,
1179 u16 vlan_tag)
1180{
1181
1182
1183
1184
1185
1186 if (unlikely(!skb->data_len)) {
1187 skb_shinfo(skb)->gso_type = 0;
1188 skb_shinfo(skb)->gso_size = 0;
1189 goto send_skb;
1190 }
1191
1192#ifdef CONFIG_INET
1193 if (skb_shinfo(skb)->gso_size) {
1194 skb_set_network_header(skb, 0);
1195
1196 switch (skb->protocol) {
1197 case htons(ETH_P_IP):
1198 qede_gro_ip_csum(skb);
1199 break;
1200 case htons(ETH_P_IPV6):
1201 qede_gro_ipv6_csum(skb);
1202 break;
1203 default:
1204 DP_ERR(edev,
1205 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1206 ntohs(skb->protocol));
1207 }
1208 }
1209#endif
1210
1211send_skb:
1212 skb_record_rx_queue(skb, fp->rss_id);
1213 qede_skb_receive(edev, fp, skb, vlan_tag);
1214}
1215
1216static inline void qede_tpa_cont(struct qede_dev *edev,
1217 struct qede_rx_queue *rxq,
1218 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1219{
1220 int i;
1221
1222 for (i = 0; cqe->len_list[i]; i++)
1223 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1224 le16_to_cpu(cqe->len_list[i]));
1225
1226 if (unlikely(i > 1))
1227 DP_ERR(edev,
1228 "Strange - TPA cont with more than a single len_list entry\n");
1229}
1230
1231static void qede_tpa_end(struct qede_dev *edev,
1232 struct qede_fastpath *fp,
1233 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1234{
1235 struct qede_rx_queue *rxq = fp->rxq;
1236 struct qede_agg_info *tpa_info;
1237 struct sk_buff *skb;
1238 int i;
1239
1240 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1241 skb = tpa_info->skb;
1242
1243 for (i = 0; cqe->len_list[i]; i++)
1244 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1245 le16_to_cpu(cqe->len_list[i]));
1246 if (unlikely(i > 1))
1247 DP_ERR(edev,
1248 "Strange - TPA emd with more than a single len_list entry\n");
1249
1250 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1251 goto err;
1252
1253
1254 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1255 DP_ERR(edev,
1256 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1257 cqe->num_of_bds, tpa_info->frag_id);
1258 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1259 DP_ERR(edev,
1260 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1261 le16_to_cpu(cqe->total_packet_len), skb->len);
1262
1263 memcpy(skb->data,
1264 page_address(tpa_info->start_buf.data) +
1265 tpa_info->start_cqe.placement_offset +
1266 tpa_info->start_buf.page_offset,
1267 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1268
1269
1270 tpa_info->replace_buf = tpa_info->start_buf;
1271 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1272
1273
1274 skb->protocol = eth_type_trans(skb, edev->ndev);
1275 skb->ip_summed = CHECKSUM_UNNECESSARY;
1276
1277
1278
1279
1280 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1281
1282 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1283
1284 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1285
1286 return;
1287err:
1288
1289
1290
1291 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1292 sizeof(struct sw_rx_data));
1293 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1294 tpa_info->start_buf.data = NULL;
1295 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1296 dev_kfree_skb_any(tpa_info->skb);
1297 tpa_info->skb = NULL;
1298}
1299
1300static bool qede_tunn_exist(u16 flag)
1301{
1302 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1303 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1304}
1305
1306static u8 qede_check_tunn_csum(u16 flag)
1307{
1308 u16 csum_flag = 0;
1309 u8 tcsum = 0;
1310
1311 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1312 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1313 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1314 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1315
1316 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1317 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1318 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1319 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1320 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1321 }
1322
1323 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1324 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1325 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1326 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1327
1328 if (csum_flag & flag)
1329 return QEDE_CSUM_ERROR;
1330
1331 return QEDE_CSUM_UNNECESSARY | tcsum;
1332}
1333
1334static u8 qede_check_notunn_csum(u16 flag)
1335{
1336 u16 csum_flag = 0;
1337 u8 csum = 0;
1338
1339 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1340 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1341 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1342 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1343 csum = QEDE_CSUM_UNNECESSARY;
1344 }
1345
1346 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1347 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1348
1349 if (csum_flag & flag)
1350 return QEDE_CSUM_ERROR;
1351
1352 return csum;
1353}
1354
1355static u8 qede_check_csum(u16 flag)
1356{
1357 if (!qede_tunn_exist(flag))
1358 return qede_check_notunn_csum(flag);
1359 else
1360 return qede_check_tunn_csum(flag);
1361}
1362
1363static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1364 u16 flag)
1365{
1366 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1367
1368 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1369 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1370 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1371 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1372 return true;
1373
1374 return false;
1375}
1376
1377static int qede_rx_int(struct qede_fastpath *fp, int budget)
1378{
1379 struct qede_dev *edev = fp->edev;
1380 struct qede_rx_queue *rxq = fp->rxq;
1381
1382 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1383 int rx_pkt = 0;
1384 u8 csum_flag;
1385
1386 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1387 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1388
1389
1390
1391
1392
1393
1394 rmb();
1395
1396
1397 while (sw_comp_cons != hw_comp_cons) {
1398 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1399 enum pkt_hash_types rxhash_type;
1400 enum eth_rx_cqe_type cqe_type;
1401 struct sw_rx_data *sw_rx_data;
1402 union eth_rx_cqe *cqe;
1403 struct sk_buff *skb;
1404 struct page *data;
1405 __le16 flags;
1406 u16 len, pad;
1407 u32 rx_hash;
1408
1409
1410 cqe = (union eth_rx_cqe *)
1411 qed_chain_consume(&rxq->rx_comp_ring);
1412 cqe_type = cqe->fast_path_regular.type;
1413
1414 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1415 edev->ops->eth_cqe_completion(
1416 edev->cdev, fp->rss_id,
1417 (struct eth_slow_path_rx_cqe *)cqe);
1418 goto next_cqe;
1419 }
1420
1421 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1422 switch (cqe_type) {
1423 case ETH_RX_CQE_TYPE_TPA_START:
1424 qede_tpa_start(edev, rxq,
1425 &cqe->fast_path_tpa_start);
1426 goto next_cqe;
1427 case ETH_RX_CQE_TYPE_TPA_CONT:
1428 qede_tpa_cont(edev, rxq,
1429 &cqe->fast_path_tpa_cont);
1430 goto next_cqe;
1431 case ETH_RX_CQE_TYPE_TPA_END:
1432 qede_tpa_end(edev, fp,
1433 &cqe->fast_path_tpa_end);
1434 goto next_rx_only;
1435 default:
1436 break;
1437 }
1438 }
1439
1440
1441 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1442 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1443 data = sw_rx_data->data;
1444
1445 fp_cqe = &cqe->fast_path_regular;
1446 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1447 pad = fp_cqe->placement_offset;
1448 flags = cqe->fast_path_regular.pars_flags.flags;
1449
1450
1451 parse_flag = le16_to_cpu(flags);
1452
1453 csum_flag = qede_check_csum(parse_flag);
1454 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1455 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1456 parse_flag)) {
1457 rxq->rx_ip_frags++;
1458 goto alloc_skb;
1459 }
1460
1461 DP_NOTICE(edev,
1462 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1463 sw_comp_cons, parse_flag);
1464 rxq->rx_hw_errors++;
1465 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1466 goto next_cqe;
1467 }
1468
1469alloc_skb:
1470 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1471 if (unlikely(!skb)) {
1472 DP_NOTICE(edev,
1473 "Build_skb failed, dropping incoming packet\n");
1474 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1475 rxq->rx_alloc_errors++;
1476 goto next_cqe;
1477 }
1478
1479
1480 if (len + pad <= edev->rx_copybreak) {
1481 memcpy(skb_put(skb, len),
1482 page_address(data) + pad +
1483 sw_rx_data->page_offset, len);
1484 qede_reuse_page(edev, rxq, sw_rx_data);
1485 } else {
1486 struct skb_frag_struct *frag;
1487 unsigned int pull_len;
1488 unsigned char *va;
1489
1490 frag = &skb_shinfo(skb)->frags[0];
1491
1492 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1493 pad + sw_rx_data->page_offset,
1494 len, rxq->rx_buf_seg_size);
1495
1496 va = skb_frag_address(frag);
1497 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1498
1499
1500 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1501
1502 skb_frag_size_sub(frag, pull_len);
1503 frag->page_offset += pull_len;
1504 skb->data_len -= pull_len;
1505 skb->tail += pull_len;
1506
1507 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1508 sw_rx_data))) {
1509 DP_ERR(edev, "Failed to allocate rx buffer\n");
1510
1511
1512
1513
1514
1515 page_ref_inc(sw_rx_data->data);
1516 rxq->rx_alloc_errors++;
1517 qede_recycle_rx_bd_ring(rxq, edev,
1518 fp_cqe->bd_num);
1519 dev_kfree_skb_any(skb);
1520 goto next_cqe;
1521 }
1522 }
1523
1524 qede_rx_bd_ring_consume(rxq);
1525
1526 if (fp_cqe->bd_num != 1) {
1527 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1528 u8 num_frags;
1529
1530 pkt_len -= len;
1531
1532 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1533 num_frags--) {
1534 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1535 rxq->rx_buf_size : pkt_len;
1536 if (unlikely(!cur_size)) {
1537 DP_ERR(edev,
1538 "Still got %d BDs for mapping jumbo, but length became 0\n",
1539 num_frags);
1540 qede_recycle_rx_bd_ring(rxq, edev,
1541 num_frags);
1542 dev_kfree_skb_any(skb);
1543 goto next_cqe;
1544 }
1545
1546 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1547 qede_recycle_rx_bd_ring(rxq, edev,
1548 num_frags);
1549 dev_kfree_skb_any(skb);
1550 goto next_cqe;
1551 }
1552
1553 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1554 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1555 qede_rx_bd_ring_consume(rxq);
1556
1557 dma_unmap_page(&edev->pdev->dev,
1558 sw_rx_data->mapping,
1559 PAGE_SIZE, DMA_FROM_DEVICE);
1560
1561 skb_fill_page_desc(skb,
1562 skb_shinfo(skb)->nr_frags++,
1563 sw_rx_data->data, 0,
1564 cur_size);
1565
1566 skb->truesize += PAGE_SIZE;
1567 skb->data_len += cur_size;
1568 skb->len += cur_size;
1569 pkt_len -= cur_size;
1570 }
1571
1572 if (unlikely(pkt_len))
1573 DP_ERR(edev,
1574 "Mapped all BDs of jumbo, but still have %d bytes\n",
1575 pkt_len);
1576 }
1577
1578 skb->protocol = eth_type_trans(skb, edev->ndev);
1579
1580 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1581 fp_cqe->rss_hash,
1582 &rxhash_type);
1583
1584 skb_set_hash(skb, rx_hash, rxhash_type);
1585
1586 qede_set_skb_csum(skb, csum_flag);
1587
1588 skb_record_rx_queue(skb, fp->rss_id);
1589
1590 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1591next_rx_only:
1592 rx_pkt++;
1593
1594next_cqe:
1595 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1596 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1597
1598
1599
1600 if (rx_pkt == budget)
1601 break;
1602 }
1603
1604
1605 qede_update_rx_prod(edev, rxq);
1606
1607 return rx_pkt;
1608}
1609
1610static int qede_poll(struct napi_struct *napi, int budget)
1611{
1612 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1613 napi);
1614 struct qede_dev *edev = fp->edev;
1615 int rx_work_done = 0;
1616 u8 tc;
1617
1618 for (tc = 0; tc < edev->num_tc; tc++)
1619 if (qede_txq_has_work(&fp->txqs[tc]))
1620 qede_tx_int(edev, &fp->txqs[tc]);
1621
1622 rx_work_done = qede_has_rx_work(fp->rxq) ?
1623 qede_rx_int(fp, budget) : 0;
1624 if (rx_work_done < budget) {
1625 qed_sb_update_sb_idx(fp->sb_info);
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639 rmb();
1640
1641
1642 if (!(qede_has_rx_work(fp->rxq) ||
1643 qede_has_tx_work(fp))) {
1644 napi_complete(napi);
1645
1646
1647 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1648 1 );
1649 } else {
1650 rx_work_done = budget;
1651 }
1652 }
1653
1654 return rx_work_done;
1655}
1656
1657static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1658{
1659 struct qede_fastpath *fp = fp_cookie;
1660
1661 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 );
1662
1663 napi_schedule_irqoff(&fp->napi);
1664 return IRQ_HANDLED;
1665}
1666
1667
1668
1669
1670
1671
1672static int qede_open(struct net_device *ndev);
1673static int qede_close(struct net_device *ndev);
1674static int qede_set_mac_addr(struct net_device *ndev, void *p);
1675static void qede_set_rx_mode(struct net_device *ndev);
1676static void qede_config_rx_mode(struct net_device *ndev);
1677
1678static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1679 enum qed_filter_xcast_params_type opcode,
1680 unsigned char mac[ETH_ALEN])
1681{
1682 struct qed_filter_params filter_cmd;
1683
1684 memset(&filter_cmd, 0, sizeof(filter_cmd));
1685 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1686 filter_cmd.filter.ucast.type = opcode;
1687 filter_cmd.filter.ucast.mac_valid = 1;
1688 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1689
1690 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1691}
1692
1693static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1694 enum qed_filter_xcast_params_type opcode,
1695 u16 vid)
1696{
1697 struct qed_filter_params filter_cmd;
1698
1699 memset(&filter_cmd, 0, sizeof(filter_cmd));
1700 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1701 filter_cmd.filter.ucast.type = opcode;
1702 filter_cmd.filter.ucast.vlan_valid = 1;
1703 filter_cmd.filter.ucast.vlan = vid;
1704
1705 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1706}
1707
1708void qede_fill_by_demand_stats(struct qede_dev *edev)
1709{
1710 struct qed_eth_stats stats;
1711
1712 edev->ops->get_vport_stats(edev->cdev, &stats);
1713 edev->stats.no_buff_discards = stats.no_buff_discards;
1714 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1715 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1716 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1717 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1718 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1719 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1720 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1721 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1722
1723 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1724 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1725 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1726 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1727 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1728 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1729 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1730 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1731 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1732 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1733 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1734 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1735
1736 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1737 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1738 edev->stats.rx_128_to_255_byte_packets =
1739 stats.rx_128_to_255_byte_packets;
1740 edev->stats.rx_256_to_511_byte_packets =
1741 stats.rx_256_to_511_byte_packets;
1742 edev->stats.rx_512_to_1023_byte_packets =
1743 stats.rx_512_to_1023_byte_packets;
1744 edev->stats.rx_1024_to_1518_byte_packets =
1745 stats.rx_1024_to_1518_byte_packets;
1746 edev->stats.rx_1519_to_1522_byte_packets =
1747 stats.rx_1519_to_1522_byte_packets;
1748 edev->stats.rx_1519_to_2047_byte_packets =
1749 stats.rx_1519_to_2047_byte_packets;
1750 edev->stats.rx_2048_to_4095_byte_packets =
1751 stats.rx_2048_to_4095_byte_packets;
1752 edev->stats.rx_4096_to_9216_byte_packets =
1753 stats.rx_4096_to_9216_byte_packets;
1754 edev->stats.rx_9217_to_16383_byte_packets =
1755 stats.rx_9217_to_16383_byte_packets;
1756 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1757 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1758 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1759 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1760 edev->stats.rx_align_errors = stats.rx_align_errors;
1761 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1762 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1763 edev->stats.rx_jabbers = stats.rx_jabbers;
1764 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1765 edev->stats.rx_fragments = stats.rx_fragments;
1766 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1767 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1768 edev->stats.tx_128_to_255_byte_packets =
1769 stats.tx_128_to_255_byte_packets;
1770 edev->stats.tx_256_to_511_byte_packets =
1771 stats.tx_256_to_511_byte_packets;
1772 edev->stats.tx_512_to_1023_byte_packets =
1773 stats.tx_512_to_1023_byte_packets;
1774 edev->stats.tx_1024_to_1518_byte_packets =
1775 stats.tx_1024_to_1518_byte_packets;
1776 edev->stats.tx_1519_to_2047_byte_packets =
1777 stats.tx_1519_to_2047_byte_packets;
1778 edev->stats.tx_2048_to_4095_byte_packets =
1779 stats.tx_2048_to_4095_byte_packets;
1780 edev->stats.tx_4096_to_9216_byte_packets =
1781 stats.tx_4096_to_9216_byte_packets;
1782 edev->stats.tx_9217_to_16383_byte_packets =
1783 stats.tx_9217_to_16383_byte_packets;
1784 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1785 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1786 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1787 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1788 edev->stats.brb_truncates = stats.brb_truncates;
1789 edev->stats.brb_discards = stats.brb_discards;
1790 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1791}
1792
1793static struct rtnl_link_stats64 *qede_get_stats64(
1794 struct net_device *dev,
1795 struct rtnl_link_stats64 *stats)
1796{
1797 struct qede_dev *edev = netdev_priv(dev);
1798
1799 qede_fill_by_demand_stats(edev);
1800
1801 stats->rx_packets = edev->stats.rx_ucast_pkts +
1802 edev->stats.rx_mcast_pkts +
1803 edev->stats.rx_bcast_pkts;
1804 stats->tx_packets = edev->stats.tx_ucast_pkts +
1805 edev->stats.tx_mcast_pkts +
1806 edev->stats.tx_bcast_pkts;
1807
1808 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1809 edev->stats.rx_mcast_bytes +
1810 edev->stats.rx_bcast_bytes;
1811
1812 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1813 edev->stats.tx_mcast_bytes +
1814 edev->stats.tx_bcast_bytes;
1815
1816 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1817 stats->multicast = edev->stats.rx_mcast_pkts +
1818 edev->stats.rx_bcast_pkts;
1819
1820 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1821
1822 stats->collisions = edev->stats.tx_total_collisions;
1823 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1824 stats->rx_frame_errors = edev->stats.rx_align_errors;
1825
1826 return stats;
1827}
1828
1829#ifdef CONFIG_QED_SRIOV
1830static int qede_get_vf_config(struct net_device *dev, int vfidx,
1831 struct ifla_vf_info *ivi)
1832{
1833 struct qede_dev *edev = netdev_priv(dev);
1834
1835 if (!edev->ops)
1836 return -EINVAL;
1837
1838 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1839}
1840
1841static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1842 int min_tx_rate, int max_tx_rate)
1843{
1844 struct qede_dev *edev = netdev_priv(dev);
1845
1846 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
1847 max_tx_rate);
1848}
1849
1850static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1851{
1852 struct qede_dev *edev = netdev_priv(dev);
1853
1854 if (!edev->ops)
1855 return -EINVAL;
1856
1857 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1858}
1859
1860static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1861 int link_state)
1862{
1863 struct qede_dev *edev = netdev_priv(dev);
1864
1865 if (!edev->ops)
1866 return -EINVAL;
1867
1868 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1869}
1870#endif
1871
1872static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1873{
1874 struct qed_update_vport_params params;
1875 int rc;
1876
1877
1878 if (edev->accept_any_vlan == action)
1879 return;
1880
1881 memset(¶ms, 0, sizeof(params));
1882
1883 params.vport_id = 0;
1884 params.accept_any_vlan = action;
1885 params.update_accept_any_vlan_flg = 1;
1886
1887 rc = edev->ops->vport_update(edev->cdev, ¶ms);
1888 if (rc) {
1889 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1890 action ? "enable" : "disable");
1891 } else {
1892 DP_INFO(edev, "%s accept-any-vlan\n",
1893 action ? "enabled" : "disabled");
1894 edev->accept_any_vlan = action;
1895 }
1896}
1897
1898static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1899{
1900 struct qede_dev *edev = netdev_priv(dev);
1901 struct qede_vlan *vlan, *tmp;
1902 int rc;
1903
1904 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1905
1906 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1907 if (!vlan) {
1908 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1909 return -ENOMEM;
1910 }
1911 INIT_LIST_HEAD(&vlan->list);
1912 vlan->vid = vid;
1913 vlan->configured = false;
1914
1915
1916 list_for_each_entry(tmp, &edev->vlan_list, list) {
1917 if (tmp->vid == vlan->vid) {
1918 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1919 "vlan already configured\n");
1920 kfree(vlan);
1921 return -EEXIST;
1922 }
1923 }
1924
1925
1926 if (edev->state != QEDE_STATE_OPEN) {
1927 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1928 "Interface is down, VLAN %d will be configured when interface is up\n",
1929 vid);
1930 if (vid != 0)
1931 edev->non_configured_vlans++;
1932 list_add(&vlan->list, &edev->vlan_list);
1933
1934 return 0;
1935 }
1936
1937
1938
1939
1940
1941 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1942 (vlan->vid == 0)) {
1943 rc = qede_set_ucast_rx_vlan(edev,
1944 QED_FILTER_XCAST_TYPE_ADD,
1945 vlan->vid);
1946 if (rc) {
1947 DP_ERR(edev, "Failed to configure VLAN %d\n",
1948 vlan->vid);
1949 kfree(vlan);
1950 return -EINVAL;
1951 }
1952 vlan->configured = true;
1953
1954
1955 if (vlan->vid != 0)
1956 edev->configured_vlans++;
1957 } else {
1958
1959 if (!edev->non_configured_vlans)
1960 qede_config_accept_any_vlan(edev, true);
1961
1962 edev->non_configured_vlans++;
1963 }
1964
1965 list_add(&vlan->list, &edev->vlan_list);
1966
1967 return 0;
1968}
1969
1970static void qede_del_vlan_from_list(struct qede_dev *edev,
1971 struct qede_vlan *vlan)
1972{
1973
1974 if (vlan->vid != 0) {
1975 if (vlan->configured)
1976 edev->configured_vlans--;
1977 else
1978 edev->non_configured_vlans--;
1979 }
1980
1981 list_del(&vlan->list);
1982 kfree(vlan);
1983}
1984
1985static int qede_configure_vlan_filters(struct qede_dev *edev)
1986{
1987 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1988 struct qed_dev_eth_info *dev_info;
1989 struct qede_vlan *vlan = NULL;
1990
1991 if (list_empty(&edev->vlan_list))
1992 return 0;
1993
1994 dev_info = &edev->dev_info;
1995
1996
1997 list_for_each_entry(vlan, &edev->vlan_list, list) {
1998 if (vlan->configured)
1999 continue;
2000
2001
2002 if ((vlan->vid != 0) &&
2003 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2004 accept_any_vlan = 1;
2005 continue;
2006 }
2007
2008 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2009
2010 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2011 vlan->vid);
2012 if (rc) {
2013 DP_ERR(edev, "Failed to configure VLAN %u\n",
2014 vlan->vid);
2015 real_rc = rc;
2016 continue;
2017 }
2018
2019 vlan->configured = true;
2020
2021 if (vlan->vid != 0) {
2022 edev->non_configured_vlans--;
2023 edev->configured_vlans++;
2024 }
2025 }
2026
2027
2028
2029
2030
2031
2032 if (accept_any_vlan)
2033 qede_config_accept_any_vlan(edev, true);
2034 else if (!edev->non_configured_vlans)
2035 qede_config_accept_any_vlan(edev, false);
2036
2037 return real_rc;
2038}
2039
2040static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2041{
2042 struct qede_dev *edev = netdev_priv(dev);
2043 struct qede_vlan *vlan = NULL;
2044 int rc;
2045
2046 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2047
2048
2049 list_for_each_entry(vlan, &edev->vlan_list, list)
2050 if (vlan->vid == vid)
2051 break;
2052
2053 if (!vlan || (vlan->vid != vid)) {
2054 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2055 "Vlan isn't configured\n");
2056 return 0;
2057 }
2058
2059 if (edev->state != QEDE_STATE_OPEN) {
2060
2061
2062
2063 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2064 "Interface is down, removing VLAN from list only\n");
2065 qede_del_vlan_from_list(edev, vlan);
2066 return 0;
2067 }
2068
2069
2070 if (vlan->configured) {
2071 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2072 vid);
2073 if (rc) {
2074 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2075 return -EINVAL;
2076 }
2077 }
2078
2079 qede_del_vlan_from_list(edev, vlan);
2080
2081
2082
2083
2084 rc = qede_configure_vlan_filters(edev);
2085
2086 return rc;
2087}
2088
2089static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2090{
2091 struct qede_vlan *vlan = NULL;
2092
2093 if (list_empty(&edev->vlan_list))
2094 return;
2095
2096 list_for_each_entry(vlan, &edev->vlan_list, list) {
2097 if (!vlan->configured)
2098 continue;
2099
2100 vlan->configured = false;
2101
2102
2103 if (vlan->vid != 0) {
2104 edev->non_configured_vlans++;
2105 edev->configured_vlans--;
2106 }
2107
2108 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2109 "marked vlan %d as non-configured\n",
2110 vlan->vid);
2111 }
2112
2113 edev->accept_any_vlan = false;
2114}
2115
2116int qede_set_features(struct net_device *dev, netdev_features_t features)
2117{
2118 struct qede_dev *edev = netdev_priv(dev);
2119 netdev_features_t changes = features ^ dev->features;
2120 bool need_reload = false;
2121
2122
2123 if (changes & NETIF_F_GRO) {
2124 if (dev->features & NETIF_F_GRO)
2125 need_reload = !edev->gro_disable;
2126 else
2127 need_reload = edev->gro_disable;
2128 }
2129
2130 if (need_reload && netif_running(edev->ndev)) {
2131 dev->features = features;
2132 qede_reload(edev, NULL, NULL);
2133 return 1;
2134 }
2135
2136 return 0;
2137}
2138
2139static void qede_udp_tunnel_add(struct net_device *dev,
2140 struct udp_tunnel_info *ti)
2141{
2142 struct qede_dev *edev = netdev_priv(dev);
2143 u16 t_port = ntohs(ti->port);
2144
2145 switch (ti->type) {
2146 case UDP_TUNNEL_TYPE_VXLAN:
2147 if (edev->vxlan_dst_port)
2148 return;
2149
2150 edev->vxlan_dst_port = t_port;
2151
2152 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d",
2153 t_port);
2154
2155 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2156 break;
2157 case UDP_TUNNEL_TYPE_GENEVE:
2158 if (edev->geneve_dst_port)
2159 return;
2160
2161 edev->geneve_dst_port = t_port;
2162
2163 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d",
2164 t_port);
2165 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2166 break;
2167 default:
2168 return;
2169 }
2170
2171 schedule_delayed_work(&edev->sp_task, 0);
2172}
2173
2174static void qede_udp_tunnel_del(struct net_device *dev,
2175 struct udp_tunnel_info *ti)
2176{
2177 struct qede_dev *edev = netdev_priv(dev);
2178 u16 t_port = ntohs(ti->port);
2179
2180 switch (ti->type) {
2181 case UDP_TUNNEL_TYPE_VXLAN:
2182 if (t_port != edev->vxlan_dst_port)
2183 return;
2184
2185 edev->vxlan_dst_port = 0;
2186
2187 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d",
2188 t_port);
2189
2190 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2191 break;
2192 case UDP_TUNNEL_TYPE_GENEVE:
2193 if (t_port != edev->geneve_dst_port)
2194 return;
2195
2196 edev->geneve_dst_port = 0;
2197
2198 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d",
2199 t_port);
2200 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2201 break;
2202 default:
2203 return;
2204 }
2205
2206 schedule_delayed_work(&edev->sp_task, 0);
2207}
2208
2209static const struct net_device_ops qede_netdev_ops = {
2210 .ndo_open = qede_open,
2211 .ndo_stop = qede_close,
2212 .ndo_start_xmit = qede_start_xmit,
2213 .ndo_set_rx_mode = qede_set_rx_mode,
2214 .ndo_set_mac_address = qede_set_mac_addr,
2215 .ndo_validate_addr = eth_validate_addr,
2216 .ndo_change_mtu = qede_change_mtu,
2217#ifdef CONFIG_QED_SRIOV
2218 .ndo_set_vf_mac = qede_set_vf_mac,
2219 .ndo_set_vf_vlan = qede_set_vf_vlan,
2220#endif
2221 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2222 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
2223 .ndo_set_features = qede_set_features,
2224 .ndo_get_stats64 = qede_get_stats64,
2225#ifdef CONFIG_QED_SRIOV
2226 .ndo_set_vf_link_state = qede_set_vf_link_state,
2227 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
2228 .ndo_get_vf_config = qede_get_vf_config,
2229 .ndo_set_vf_rate = qede_set_vf_rate,
2230#endif
2231 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2232 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
2233};
2234
2235
2236
2237
2238
2239
2240static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2241 struct pci_dev *pdev,
2242 struct qed_dev_eth_info *info,
2243 u32 dp_module,
2244 u8 dp_level)
2245{
2246 struct net_device *ndev;
2247 struct qede_dev *edev;
2248
2249 ndev = alloc_etherdev_mqs(sizeof(*edev),
2250 info->num_queues,
2251 info->num_queues);
2252 if (!ndev) {
2253 pr_err("etherdev allocation failed\n");
2254 return NULL;
2255 }
2256
2257 edev = netdev_priv(ndev);
2258 edev->ndev = ndev;
2259 edev->cdev = cdev;
2260 edev->pdev = pdev;
2261 edev->dp_module = dp_module;
2262 edev->dp_level = dp_level;
2263 edev->ops = qed_ops;
2264 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2265 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
2266
2267 SET_NETDEV_DEV(ndev, &pdev->dev);
2268
2269 memset(&edev->stats, 0, sizeof(edev->stats));
2270 memcpy(&edev->dev_info, info, sizeof(*info));
2271
2272 edev->num_tc = edev->dev_info.num_tc;
2273
2274 INIT_LIST_HEAD(&edev->vlan_list);
2275
2276 return edev;
2277}
2278
2279static void qede_init_ndev(struct qede_dev *edev)
2280{
2281 struct net_device *ndev = edev->ndev;
2282 struct pci_dev *pdev = edev->pdev;
2283 u32 hw_features;
2284
2285 pci_set_drvdata(pdev, ndev);
2286
2287 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2288 ndev->base_addr = ndev->mem_start;
2289 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2290 ndev->irq = edev->dev_info.common.pci_irq;
2291
2292 ndev->watchdog_timeo = TX_TIMEOUT;
2293
2294 ndev->netdev_ops = &qede_netdev_ops;
2295
2296 qede_set_ethtool_ops(ndev);
2297
2298
2299 hw_features = NETIF_F_GRO | NETIF_F_SG |
2300 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2301 NETIF_F_TSO | NETIF_F_TSO6;
2302
2303
2304 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2305 NETIF_F_TSO_ECN;
2306 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2307 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2308 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2309 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2310
2311 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2312 NETIF_F_HIGHDMA;
2313 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2314 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
2315 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
2316
2317 ndev->hw_features = hw_features;
2318
2319
2320 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2321}
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
2335{
2336 *p_dp_level = QED_LEVEL_NOTICE;
2337 *p_dp_module = 0;
2338
2339 if (debug & QED_LOG_VERBOSE_MASK) {
2340 *p_dp_level = QED_LEVEL_VERBOSE;
2341 *p_dp_module = (debug & 0x3FFFFFFF);
2342 } else if (debug & QED_LOG_INFO_MASK) {
2343 *p_dp_level = QED_LEVEL_INFO;
2344 } else if (debug & QED_LOG_NOTICE_MASK) {
2345 *p_dp_level = QED_LEVEL_NOTICE;
2346 }
2347}
2348
2349static void qede_free_fp_array(struct qede_dev *edev)
2350{
2351 if (edev->fp_array) {
2352 struct qede_fastpath *fp;
2353 int i;
2354
2355 for_each_rss(i) {
2356 fp = &edev->fp_array[i];
2357
2358 kfree(fp->sb_info);
2359 kfree(fp->rxq);
2360 kfree(fp->txqs);
2361 }
2362 kfree(edev->fp_array);
2363 }
2364 edev->num_rss = 0;
2365}
2366
2367static int qede_alloc_fp_array(struct qede_dev *edev)
2368{
2369 struct qede_fastpath *fp;
2370 int i;
2371
2372 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2373 sizeof(*edev->fp_array), GFP_KERNEL);
2374 if (!edev->fp_array) {
2375 DP_NOTICE(edev, "fp array allocation failed\n");
2376 goto err;
2377 }
2378
2379 for_each_rss(i) {
2380 fp = &edev->fp_array[i];
2381
2382 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2383 if (!fp->sb_info) {
2384 DP_NOTICE(edev, "sb info struct allocation failed\n");
2385 goto err;
2386 }
2387
2388 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2389 if (!fp->rxq) {
2390 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2391 goto err;
2392 }
2393
2394 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2395 if (!fp->txqs) {
2396 DP_NOTICE(edev, "TXQ array allocation failed\n");
2397 goto err;
2398 }
2399 }
2400
2401 return 0;
2402err:
2403 qede_free_fp_array(edev);
2404 return -ENOMEM;
2405}
2406
2407static void qede_sp_task(struct work_struct *work)
2408{
2409 struct qede_dev *edev = container_of(work, struct qede_dev,
2410 sp_task.work);
2411 struct qed_dev *cdev = edev->cdev;
2412
2413 mutex_lock(&edev->qede_lock);
2414
2415 if (edev->state == QEDE_STATE_OPEN) {
2416 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2417 qede_config_rx_mode(edev->ndev);
2418 }
2419
2420 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2421 struct qed_tunn_params tunn_params;
2422
2423 memset(&tunn_params, 0, sizeof(tunn_params));
2424 tunn_params.update_vxlan_port = 1;
2425 tunn_params.vxlan_port = edev->vxlan_dst_port;
2426 qed_ops->tunn_config(cdev, &tunn_params);
2427 }
2428
2429 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2430 struct qed_tunn_params tunn_params;
2431
2432 memset(&tunn_params, 0, sizeof(tunn_params));
2433 tunn_params.update_geneve_port = 1;
2434 tunn_params.geneve_port = edev->geneve_dst_port;
2435 qed_ops->tunn_config(cdev, &tunn_params);
2436 }
2437
2438 mutex_unlock(&edev->qede_lock);
2439}
2440
2441static void qede_update_pf_params(struct qed_dev *cdev)
2442{
2443 struct qed_pf_params pf_params;
2444
2445
2446 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2447 pf_params.eth_pf_params.num_cons = 128;
2448 qed_ops->common->update_pf_params(cdev, &pf_params);
2449}
2450
2451enum qede_probe_mode {
2452 QEDE_PROBE_NORMAL,
2453};
2454
2455static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2456 bool is_vf, enum qede_probe_mode mode)
2457{
2458 struct qed_probe_params probe_params;
2459 struct qed_slowpath_params params;
2460 struct qed_dev_eth_info dev_info;
2461 struct qede_dev *edev;
2462 struct qed_dev *cdev;
2463 int rc;
2464
2465 if (unlikely(dp_level & QED_LEVEL_INFO))
2466 pr_notice("Starting qede probe\n");
2467
2468 memset(&probe_params, 0, sizeof(probe_params));
2469 probe_params.protocol = QED_PROTOCOL_ETH;
2470 probe_params.dp_module = dp_module;
2471 probe_params.dp_level = dp_level;
2472 probe_params.is_vf = is_vf;
2473 cdev = qed_ops->common->probe(pdev, &probe_params);
2474 if (!cdev) {
2475 rc = -ENODEV;
2476 goto err0;
2477 }
2478
2479 qede_update_pf_params(cdev);
2480
2481
2482 memset(¶ms, 0, sizeof(struct qed_slowpath_params));
2483 params.int_mode = QED_INT_MODE_MSIX;
2484 params.drv_major = QEDE_MAJOR_VERSION;
2485 params.drv_minor = QEDE_MINOR_VERSION;
2486 params.drv_rev = QEDE_REVISION_VERSION;
2487 params.drv_eng = QEDE_ENGINEERING_VERSION;
2488 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2489 rc = qed_ops->common->slowpath_start(cdev, ¶ms);
2490 if (rc) {
2491 pr_notice("Cannot start slowpath\n");
2492 goto err1;
2493 }
2494
2495
2496 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2497 if (rc)
2498 goto err2;
2499
2500 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2501 dp_level);
2502 if (!edev) {
2503 rc = -ENOMEM;
2504 goto err2;
2505 }
2506
2507 if (is_vf)
2508 edev->flags |= QEDE_FLAG_IS_VF;
2509
2510 qede_init_ndev(edev);
2511
2512 rc = register_netdev(edev->ndev);
2513 if (rc) {
2514 DP_NOTICE(edev, "Cannot register net-device\n");
2515 goto err3;
2516 }
2517
2518 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2519
2520 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2521
2522#ifdef CONFIG_DCB
2523 if (!IS_VF(edev))
2524 qede_set_dcbnl_ops(edev->ndev);
2525#endif
2526
2527 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2528 mutex_init(&edev->qede_lock);
2529 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
2530
2531 DP_INFO(edev, "Ending successfully qede probe\n");
2532
2533 return 0;
2534
2535err3:
2536 free_netdev(edev->ndev);
2537err2:
2538 qed_ops->common->slowpath_stop(cdev);
2539err1:
2540 qed_ops->common->remove(cdev);
2541err0:
2542 return rc;
2543}
2544
2545static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2546{
2547 bool is_vf = false;
2548 u32 dp_module = 0;
2549 u8 dp_level = 0;
2550
2551 switch ((enum qede_pci_private)id->driver_data) {
2552 case QEDE_PRIVATE_VF:
2553 if (debug & QED_LOG_VERBOSE_MASK)
2554 dev_err(&pdev->dev, "Probing a VF\n");
2555 is_vf = true;
2556 break;
2557 default:
2558 if (debug & QED_LOG_VERBOSE_MASK)
2559 dev_err(&pdev->dev, "Probing a PF\n");
2560 }
2561
2562 qede_config_debug(debug, &dp_module, &dp_level);
2563
2564 return __qede_probe(pdev, dp_module, dp_level, is_vf,
2565 QEDE_PROBE_NORMAL);
2566}
2567
2568enum qede_remove_mode {
2569 QEDE_REMOVE_NORMAL,
2570};
2571
2572static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2573{
2574 struct net_device *ndev = pci_get_drvdata(pdev);
2575 struct qede_dev *edev = netdev_priv(ndev);
2576 struct qed_dev *cdev = edev->cdev;
2577
2578 DP_INFO(edev, "Starting qede_remove\n");
2579
2580 cancel_delayed_work_sync(&edev->sp_task);
2581 unregister_netdev(ndev);
2582
2583 edev->ops->common->set_power_state(cdev, PCI_D0);
2584
2585 pci_set_drvdata(pdev, NULL);
2586
2587 free_netdev(ndev);
2588
2589
2590 qed_ops->common->slowpath_stop(cdev);
2591 qed_ops->common->remove(cdev);
2592
2593 pr_notice("Ending successfully qede_remove\n");
2594}
2595
2596static void qede_remove(struct pci_dev *pdev)
2597{
2598 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2599}
2600
2601
2602
2603
2604
2605
2606static int qede_set_num_queues(struct qede_dev *edev)
2607{
2608 int rc;
2609 u16 rss_num;
2610
2611
2612 if (edev->req_rss)
2613 rss_num = edev->req_rss;
2614 else
2615 rss_num = netif_get_num_default_rss_queues() *
2616 edev->dev_info.common.num_hwfns;
2617
2618 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2619
2620 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2621 if (rc > 0) {
2622
2623 edev->num_rss = rc;
2624 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2625 QEDE_RSS_CNT(edev), rss_num);
2626 rc = 0;
2627 }
2628 return rc;
2629}
2630
2631static void qede_free_mem_sb(struct qede_dev *edev,
2632 struct qed_sb_info *sb_info)
2633{
2634 if (sb_info->sb_virt)
2635 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2636 (void *)sb_info->sb_virt, sb_info->sb_phys);
2637}
2638
2639
2640static int qede_alloc_mem_sb(struct qede_dev *edev,
2641 struct qed_sb_info *sb_info,
2642 u16 sb_id)
2643{
2644 struct status_block *sb_virt;
2645 dma_addr_t sb_phys;
2646 int rc;
2647
2648 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2649 sizeof(*sb_virt),
2650 &sb_phys, GFP_KERNEL);
2651 if (!sb_virt) {
2652 DP_ERR(edev, "Status block allocation failed\n");
2653 return -ENOMEM;
2654 }
2655
2656 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2657 sb_virt, sb_phys, sb_id,
2658 QED_SB_TYPE_L2_QUEUE);
2659 if (rc) {
2660 DP_ERR(edev, "Status block initialization failed\n");
2661 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2662 sb_virt, sb_phys);
2663 return rc;
2664 }
2665
2666 return 0;
2667}
2668
2669static void qede_free_rx_buffers(struct qede_dev *edev,
2670 struct qede_rx_queue *rxq)
2671{
2672 u16 i;
2673
2674 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2675 struct sw_rx_data *rx_buf;
2676 struct page *data;
2677
2678 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2679 data = rx_buf->data;
2680
2681 dma_unmap_page(&edev->pdev->dev,
2682 rx_buf->mapping,
2683 PAGE_SIZE, DMA_FROM_DEVICE);
2684
2685 rx_buf->data = NULL;
2686 __free_page(data);
2687 }
2688}
2689
2690static void qede_free_sge_mem(struct qede_dev *edev,
2691 struct qede_rx_queue *rxq) {
2692 int i;
2693
2694 if (edev->gro_disable)
2695 return;
2696
2697 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2698 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2699 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2700
2701 if (replace_buf->data) {
2702 dma_unmap_page(&edev->pdev->dev,
2703 replace_buf->mapping,
2704 PAGE_SIZE, DMA_FROM_DEVICE);
2705 __free_page(replace_buf->data);
2706 }
2707 }
2708}
2709
2710static void qede_free_mem_rxq(struct qede_dev *edev,
2711 struct qede_rx_queue *rxq)
2712{
2713 qede_free_sge_mem(edev, rxq);
2714
2715
2716 qede_free_rx_buffers(edev, rxq);
2717
2718
2719 kfree(rxq->sw_rx_ring);
2720
2721
2722 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2723 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2724}
2725
2726static int qede_alloc_rx_buffer(struct qede_dev *edev,
2727 struct qede_rx_queue *rxq)
2728{
2729 struct sw_rx_data *sw_rx_data;
2730 struct eth_rx_bd *rx_bd;
2731 dma_addr_t mapping;
2732 struct page *data;
2733 u16 rx_buf_size;
2734
2735 rx_buf_size = rxq->rx_buf_size;
2736
2737 data = alloc_pages(GFP_ATOMIC, 0);
2738 if (unlikely(!data)) {
2739 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2740 return -ENOMEM;
2741 }
2742
2743
2744
2745
2746 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2747 PAGE_SIZE, DMA_FROM_DEVICE);
2748 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2749 __free_page(data);
2750 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2751 return -ENOMEM;
2752 }
2753
2754 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
2755 sw_rx_data->page_offset = 0;
2756 sw_rx_data->data = data;
2757 sw_rx_data->mapping = mapping;
2758
2759
2760 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2761 WARN_ON(!rx_bd);
2762 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2763 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2764
2765 rxq->sw_rx_prod++;
2766
2767 return 0;
2768}
2769
2770static int qede_alloc_sge_mem(struct qede_dev *edev,
2771 struct qede_rx_queue *rxq)
2772{
2773 dma_addr_t mapping;
2774 int i;
2775
2776 if (edev->gro_disable)
2777 return 0;
2778
2779 if (edev->ndev->mtu > PAGE_SIZE) {
2780 edev->gro_disable = 1;
2781 return 0;
2782 }
2783
2784 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2785 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2786 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2787
2788 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2789 if (unlikely(!replace_buf->data)) {
2790 DP_NOTICE(edev,
2791 "Failed to allocate TPA skb pool [replacement buffer]\n");
2792 goto err;
2793 }
2794
2795 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2796 rxq->rx_buf_size, DMA_FROM_DEVICE);
2797 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2798 DP_NOTICE(edev,
2799 "Failed to map TPA replacement buffer\n");
2800 goto err;
2801 }
2802
2803 replace_buf->mapping = mapping;
2804 tpa_info->replace_buf.page_offset = 0;
2805
2806 tpa_info->replace_buf_mapping = mapping;
2807 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2808 }
2809
2810 return 0;
2811err:
2812 qede_free_sge_mem(edev, rxq);
2813 edev->gro_disable = 1;
2814 return -ENOMEM;
2815}
2816
2817
2818static int qede_alloc_mem_rxq(struct qede_dev *edev,
2819 struct qede_rx_queue *rxq)
2820{
2821 int i, rc, size;
2822
2823 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2824
2825 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2826 edev->ndev->mtu;
2827 if (rxq->rx_buf_size > PAGE_SIZE)
2828 rxq->rx_buf_size = PAGE_SIZE;
2829
2830
2831 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2832
2833
2834 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2835 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2836 if (!rxq->sw_rx_ring) {
2837 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2838 rc = -ENOMEM;
2839 goto err;
2840 }
2841
2842
2843 rc = edev->ops->common->chain_alloc(edev->cdev,
2844 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2845 QED_CHAIN_MODE_NEXT_PTR,
2846 QED_CHAIN_CNT_TYPE_U16,
2847 RX_RING_SIZE,
2848 sizeof(struct eth_rx_bd),
2849 &rxq->rx_bd_ring);
2850
2851 if (rc)
2852 goto err;
2853
2854
2855 rc = edev->ops->common->chain_alloc(edev->cdev,
2856 QED_CHAIN_USE_TO_CONSUME,
2857 QED_CHAIN_MODE_PBL,
2858 QED_CHAIN_CNT_TYPE_U16,
2859 RX_RING_SIZE,
2860 sizeof(union eth_rx_cqe),
2861 &rxq->rx_comp_ring);
2862 if (rc)
2863 goto err;
2864
2865
2866 for (i = 0; i < rxq->num_rx_buffers; i++) {
2867 rc = qede_alloc_rx_buffer(edev, rxq);
2868 if (rc) {
2869 DP_ERR(edev,
2870 "Rx buffers allocation failed at index %d\n", i);
2871 goto err;
2872 }
2873 }
2874
2875 rc = qede_alloc_sge_mem(edev, rxq);
2876err:
2877 return rc;
2878}
2879
2880static void qede_free_mem_txq(struct qede_dev *edev,
2881 struct qede_tx_queue *txq)
2882{
2883
2884 kfree(txq->sw_tx_ring);
2885
2886
2887 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2888}
2889
2890
2891static int qede_alloc_mem_txq(struct qede_dev *edev,
2892 struct qede_tx_queue *txq)
2893{
2894 int size, rc;
2895 union eth_tx_bd_types *p_virt;
2896
2897 txq->num_tx_buffers = edev->q_num_tx_buffers;
2898
2899
2900 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2901 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2902 if (!txq->sw_tx_ring) {
2903 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2904 goto err;
2905 }
2906
2907 rc = edev->ops->common->chain_alloc(edev->cdev,
2908 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2909 QED_CHAIN_MODE_PBL,
2910 QED_CHAIN_CNT_TYPE_U16,
2911 NUM_TX_BDS_MAX,
2912 sizeof(*p_virt), &txq->tx_pbl);
2913 if (rc)
2914 goto err;
2915
2916 return 0;
2917
2918err:
2919 qede_free_mem_txq(edev, txq);
2920 return -ENOMEM;
2921}
2922
2923
2924static void qede_free_mem_fp(struct qede_dev *edev,
2925 struct qede_fastpath *fp)
2926{
2927 int tc;
2928
2929 qede_free_mem_sb(edev, fp->sb_info);
2930
2931 qede_free_mem_rxq(edev, fp->rxq);
2932
2933 for (tc = 0; tc < edev->num_tc; tc++)
2934 qede_free_mem_txq(edev, &fp->txqs[tc]);
2935}
2936
2937
2938
2939
2940static int qede_alloc_mem_fp(struct qede_dev *edev,
2941 struct qede_fastpath *fp)
2942{
2943 int rc, tc;
2944
2945 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2946 if (rc)
2947 goto err;
2948
2949 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2950 if (rc)
2951 goto err;
2952
2953 for (tc = 0; tc < edev->num_tc; tc++) {
2954 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2955 if (rc)
2956 goto err;
2957 }
2958
2959 return 0;
2960err:
2961 return rc;
2962}
2963
2964static void qede_free_mem_load(struct qede_dev *edev)
2965{
2966 int i;
2967
2968 for_each_rss(i) {
2969 struct qede_fastpath *fp = &edev->fp_array[i];
2970
2971 qede_free_mem_fp(edev, fp);
2972 }
2973}
2974
2975
2976static int qede_alloc_mem_load(struct qede_dev *edev)
2977{
2978 int rc = 0, rss_id;
2979
2980 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2981 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2982
2983 rc = qede_alloc_mem_fp(edev, fp);
2984 if (rc) {
2985 DP_ERR(edev,
2986 "Failed to allocate memory for fastpath - rss id = %d\n",
2987 rss_id);
2988 qede_free_mem_load(edev);
2989 return rc;
2990 }
2991 }
2992
2993 return 0;
2994}
2995
2996
2997static void qede_init_fp(struct qede_dev *edev)
2998{
2999 int rss_id, txq_index, tc;
3000 struct qede_fastpath *fp;
3001
3002 for_each_rss(rss_id) {
3003 fp = &edev->fp_array[rss_id];
3004
3005 fp->edev = edev;
3006 fp->rss_id = rss_id;
3007
3008 memset((void *)&fp->napi, 0, sizeof(fp->napi));
3009
3010 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
3011
3012 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
3013 fp->rxq->rxq_id = rss_id;
3014
3015 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
3016 for (tc = 0; tc < edev->num_tc; tc++) {
3017 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
3018 fp->txqs[tc].index = txq_index;
3019 }
3020
3021 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
3022 edev->ndev->name, rss_id);
3023 }
3024
3025 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
3026}
3027
3028static int qede_set_real_num_queues(struct qede_dev *edev)
3029{
3030 int rc = 0;
3031
3032 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3033 if (rc) {
3034 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3035 return rc;
3036 }
3037 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3038 if (rc) {
3039 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3040 return rc;
3041 }
3042
3043 return 0;
3044}
3045
3046static void qede_napi_disable_remove(struct qede_dev *edev)
3047{
3048 int i;
3049
3050 for_each_rss(i) {
3051 napi_disable(&edev->fp_array[i].napi);
3052
3053 netif_napi_del(&edev->fp_array[i].napi);
3054 }
3055}
3056
3057static void qede_napi_add_enable(struct qede_dev *edev)
3058{
3059 int i;
3060
3061
3062 for_each_rss(i) {
3063 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3064 qede_poll, NAPI_POLL_WEIGHT);
3065 napi_enable(&edev->fp_array[i].napi);
3066 }
3067}
3068
3069static void qede_sync_free_irqs(struct qede_dev *edev)
3070{
3071 int i;
3072
3073 for (i = 0; i < edev->int_info.used_cnt; i++) {
3074 if (edev->int_info.msix_cnt) {
3075 synchronize_irq(edev->int_info.msix[i].vector);
3076 free_irq(edev->int_info.msix[i].vector,
3077 &edev->fp_array[i]);
3078 } else {
3079 edev->ops->common->simd_handler_clean(edev->cdev, i);
3080 }
3081 }
3082
3083 edev->int_info.used_cnt = 0;
3084}
3085
3086static int qede_req_msix_irqs(struct qede_dev *edev)
3087{
3088 int i, rc;
3089
3090
3091 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3092 DP_ERR(edev,
3093 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3094 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3095 return -EINVAL;
3096 }
3097
3098 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3099 rc = request_irq(edev->int_info.msix[i].vector,
3100 qede_msix_fp_int, 0, edev->fp_array[i].name,
3101 &edev->fp_array[i]);
3102 if (rc) {
3103 DP_ERR(edev, "Request fp %d irq failed\n", i);
3104 qede_sync_free_irqs(edev);
3105 return rc;
3106 }
3107 DP_VERBOSE(edev, NETIF_MSG_INTR,
3108 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3109 edev->fp_array[i].name, i,
3110 &edev->fp_array[i]);
3111 edev->int_info.used_cnt++;
3112 }
3113
3114 return 0;
3115}
3116
3117static void qede_simd_fp_handler(void *cookie)
3118{
3119 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3120
3121 napi_schedule_irqoff(&fp->napi);
3122}
3123
3124static int qede_setup_irqs(struct qede_dev *edev)
3125{
3126 int i, rc = 0;
3127
3128
3129 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3130 if (rc)
3131 return rc;
3132
3133 if (edev->int_info.msix_cnt) {
3134 rc = qede_req_msix_irqs(edev);
3135 if (rc)
3136 return rc;
3137 edev->ndev->irq = edev->int_info.msix[0].vector;
3138 } else {
3139 const struct qed_common_ops *ops;
3140
3141
3142 ops = edev->ops->common;
3143 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3144 ops->simd_handler_config(edev->cdev,
3145 &edev->fp_array[i], i,
3146 qede_simd_fp_handler);
3147 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3148 }
3149 return 0;
3150}
3151
3152static int qede_drain_txq(struct qede_dev *edev,
3153 struct qede_tx_queue *txq,
3154 bool allow_drain)
3155{
3156 int rc, cnt = 1000;
3157
3158 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3159 if (!cnt) {
3160 if (allow_drain) {
3161 DP_NOTICE(edev,
3162 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3163 txq->index);
3164 rc = edev->ops->common->drain(edev->cdev);
3165 if (rc)
3166 return rc;
3167 return qede_drain_txq(edev, txq, false);
3168 }
3169 DP_NOTICE(edev,
3170 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3171 txq->index, txq->sw_tx_prod,
3172 txq->sw_tx_cons);
3173 return -ENODEV;
3174 }
3175 cnt--;
3176 usleep_range(1000, 2000);
3177 barrier();
3178 }
3179
3180
3181 usleep_range(1000, 2000);
3182
3183 return 0;
3184}
3185
3186static int qede_stop_queues(struct qede_dev *edev)
3187{
3188 struct qed_update_vport_params vport_update_params;
3189 struct qed_dev *cdev = edev->cdev;
3190 int rc, tc, i;
3191
3192
3193 memset(&vport_update_params, 0, sizeof(vport_update_params));
3194 vport_update_params.vport_id = 0;
3195 vport_update_params.update_vport_active_flg = 1;
3196 vport_update_params.vport_active_flg = 0;
3197 vport_update_params.update_rss_flg = 0;
3198
3199 rc = edev->ops->vport_update(cdev, &vport_update_params);
3200 if (rc) {
3201 DP_ERR(edev, "Failed to update vport\n");
3202 return rc;
3203 }
3204
3205
3206 for_each_rss(i) {
3207 struct qede_fastpath *fp = &edev->fp_array[i];
3208
3209 for (tc = 0; tc < edev->num_tc; tc++) {
3210 struct qede_tx_queue *txq = &fp->txqs[tc];
3211
3212 rc = qede_drain_txq(edev, txq, true);
3213 if (rc)
3214 return rc;
3215 }
3216 }
3217
3218
3219 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3220 struct qed_stop_rxq_params rx_params;
3221
3222
3223 for (tc = 0; tc < edev->num_tc; tc++) {
3224 struct qed_stop_txq_params tx_params;
3225
3226 tx_params.rss_id = i;
3227 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3228 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3229 if (rc) {
3230 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3231 tx_params.tx_queue_id);
3232 return rc;
3233 }
3234 }
3235
3236
3237 memset(&rx_params, 0, sizeof(rx_params));
3238 rx_params.rss_id = i;
3239 rx_params.rx_queue_id = i;
3240
3241 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3242 if (rc) {
3243 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3244 return rc;
3245 }
3246 }
3247
3248
3249 rc = edev->ops->vport_stop(cdev, 0);
3250 if (rc)
3251 DP_ERR(edev, "Failed to stop VPORT\n");
3252
3253 return rc;
3254}
3255
3256static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
3257{
3258 int rc, tc, i;
3259 int vlan_removal_en = 1;
3260 struct qed_dev *cdev = edev->cdev;
3261 struct qed_update_vport_params vport_update_params;
3262 struct qed_queue_start_common_params q_params;
3263 struct qed_dev_info *qed_info = &edev->dev_info.common;
3264 struct qed_start_vport_params start = {0};
3265 bool reset_rss_indir = false;
3266
3267 if (!edev->num_rss) {
3268 DP_ERR(edev,
3269 "Cannot update V-VPORT as active as there are no Rx queues\n");
3270 return -EINVAL;
3271 }
3272
3273 start.gro_enable = !edev->gro_disable;
3274 start.mtu = edev->ndev->mtu;
3275 start.vport_id = 0;
3276 start.drop_ttl0 = true;
3277 start.remove_inner_vlan = vlan_removal_en;
3278 start.clear_stats = clear_stats;
3279
3280 rc = edev->ops->vport_start(cdev, &start);
3281
3282 if (rc) {
3283 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3284 return rc;
3285 }
3286
3287 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3288 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
3289 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
3290
3291 for_each_rss(i) {
3292 struct qede_fastpath *fp = &edev->fp_array[i];
3293 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3294
3295 memset(&q_params, 0, sizeof(q_params));
3296 q_params.rss_id = i;
3297 q_params.queue_id = i;
3298 q_params.vport_id = 0;
3299 q_params.sb = fp->sb_info->igu_sb_id;
3300 q_params.sb_idx = RX_PI;
3301
3302 rc = edev->ops->q_rx_start(cdev, &q_params,
3303 fp->rxq->rx_buf_size,
3304 fp->rxq->rx_bd_ring.p_phys_addr,
3305 phys_table,
3306 fp->rxq->rx_comp_ring.page_cnt,
3307 &fp->rxq->hw_rxq_prod_addr);
3308 if (rc) {
3309 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3310 return rc;
3311 }
3312
3313 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3314
3315 qede_update_rx_prod(edev, fp->rxq);
3316
3317 for (tc = 0; tc < edev->num_tc; tc++) {
3318 struct qede_tx_queue *txq = &fp->txqs[tc];
3319 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3320
3321 memset(&q_params, 0, sizeof(q_params));
3322 q_params.rss_id = i;
3323 q_params.queue_id = txq_index;
3324 q_params.vport_id = 0;
3325 q_params.sb = fp->sb_info->igu_sb_id;
3326 q_params.sb_idx = TX_PI(tc);
3327
3328 rc = edev->ops->q_tx_start(cdev, &q_params,
3329 txq->tx_pbl.pbl.p_phys_table,
3330 txq->tx_pbl.page_cnt,
3331 &txq->doorbell_addr);
3332 if (rc) {
3333 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3334 txq_index, rc);
3335 return rc;
3336 }
3337
3338 txq->hw_cons_ptr =
3339 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3340 SET_FIELD(txq->tx_db.data.params,
3341 ETH_DB_DATA_DEST, DB_DEST_XCM);
3342 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3343 DB_AGG_CMD_SET);
3344 SET_FIELD(txq->tx_db.data.params,
3345 ETH_DB_DATA_AGG_VAL_SEL,
3346 DQ_XCM_ETH_TX_BD_PROD_CMD);
3347
3348 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3349 }
3350 }
3351
3352
3353 memset(&vport_update_params, 0, sizeof(vport_update_params));
3354 vport_update_params.vport_id = start.vport_id;
3355 vport_update_params.update_vport_active_flg = 1;
3356 vport_update_params.vport_active_flg = 1;
3357
3358 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3359 qed_info->tx_switching) {
3360 vport_update_params.update_tx_switching_flg = 1;
3361 vport_update_params.tx_switching_flg = 1;
3362 }
3363
3364
3365 if (QEDE_RSS_CNT(edev) > 1) {
3366 vport_update_params.update_rss_flg = 1;
3367
3368
3369 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3370 if (edev->rss_params.rss_ind_table[i] >=
3371 edev->num_rss) {
3372 reset_rss_indir = true;
3373 break;
3374 }
3375 }
3376
3377 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3378 reset_rss_indir) {
3379 u16 val;
3380
3381 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3382 u16 indir_val;
3383
3384 val = QEDE_RSS_CNT(edev);
3385 indir_val = ethtool_rxfh_indir_default(i, val);
3386 edev->rss_params.rss_ind_table[i] = indir_val;
3387 }
3388 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3389 }
3390
3391 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3392 netdev_rss_key_fill(edev->rss_params.rss_key,
3393 sizeof(edev->rss_params.rss_key));
3394 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3395 }
3396
3397 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3398 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3399 QED_RSS_IPV6 |
3400 QED_RSS_IPV4_TCP |
3401 QED_RSS_IPV6_TCP;
3402 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3403 }
3404
3405 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3406 sizeof(vport_update_params.rss_params));
3407 } else {
3408 memset(&vport_update_params.rss_params, 0,
3409 sizeof(vport_update_params.rss_params));
3410 }
3411
3412 rc = edev->ops->vport_update(cdev, &vport_update_params);
3413 if (rc) {
3414 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3415 return rc;
3416 }
3417
3418 return 0;
3419}
3420
3421static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3422 enum qed_filter_xcast_params_type opcode,
3423 unsigned char *mac, int num_macs)
3424{
3425 struct qed_filter_params filter_cmd;
3426 int i;
3427
3428 memset(&filter_cmd, 0, sizeof(filter_cmd));
3429 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3430 filter_cmd.filter.mcast.type = opcode;
3431 filter_cmd.filter.mcast.num = num_macs;
3432
3433 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3434 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3435
3436 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3437}
3438
3439enum qede_unload_mode {
3440 QEDE_UNLOAD_NORMAL,
3441};
3442
3443static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3444{
3445 struct qed_link_params link_params;
3446 int rc;
3447
3448 DP_INFO(edev, "Starting qede unload\n");
3449
3450 mutex_lock(&edev->qede_lock);
3451 edev->state = QEDE_STATE_CLOSED;
3452
3453
3454 netif_tx_disable(edev->ndev);
3455 netif_carrier_off(edev->ndev);
3456
3457
3458 memset(&link_params, 0, sizeof(link_params));
3459 link_params.link_up = false;
3460 edev->ops->common->set_link(edev->cdev, &link_params);
3461 rc = qede_stop_queues(edev);
3462 if (rc) {
3463 qede_sync_free_irqs(edev);
3464 goto out;
3465 }
3466
3467 DP_INFO(edev, "Stopped Queues\n");
3468
3469 qede_vlan_mark_nonconfigured(edev);
3470 edev->ops->fastpath_stop(edev->cdev);
3471
3472
3473 qede_sync_free_irqs(edev);
3474 edev->ops->common->set_fp_int(edev->cdev, 0);
3475
3476 qede_napi_disable_remove(edev);
3477
3478 qede_free_mem_load(edev);
3479 qede_free_fp_array(edev);
3480
3481out:
3482 mutex_unlock(&edev->qede_lock);
3483 DP_INFO(edev, "Ending qede unload\n");
3484}
3485
3486enum qede_load_mode {
3487 QEDE_LOAD_NORMAL,
3488 QEDE_LOAD_RELOAD,
3489};
3490
3491static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3492{
3493 struct qed_link_params link_params;
3494 struct qed_link_output link_output;
3495 int rc;
3496
3497 DP_INFO(edev, "Starting qede load\n");
3498
3499 rc = qede_set_num_queues(edev);
3500 if (rc)
3501 goto err0;
3502
3503 rc = qede_alloc_fp_array(edev);
3504 if (rc)
3505 goto err0;
3506
3507 qede_init_fp(edev);
3508
3509 rc = qede_alloc_mem_load(edev);
3510 if (rc)
3511 goto err1;
3512 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3513 QEDE_RSS_CNT(edev), edev->num_tc);
3514
3515 rc = qede_set_real_num_queues(edev);
3516 if (rc)
3517 goto err2;
3518
3519 qede_napi_add_enable(edev);
3520 DP_INFO(edev, "Napi added and enabled\n");
3521
3522 rc = qede_setup_irqs(edev);
3523 if (rc)
3524 goto err3;
3525 DP_INFO(edev, "Setup IRQs succeeded\n");
3526
3527 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
3528 if (rc)
3529 goto err4;
3530 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3531
3532
3533 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3534
3535 mutex_lock(&edev->qede_lock);
3536 edev->state = QEDE_STATE_OPEN;
3537 mutex_unlock(&edev->qede_lock);
3538
3539
3540 qede_configure_vlan_filters(edev);
3541
3542
3543 memset(&link_params, 0, sizeof(link_params));
3544 link_params.link_up = true;
3545 edev->ops->common->set_link(edev->cdev, &link_params);
3546
3547
3548 memset(&link_output, 0, sizeof(link_output));
3549 edev->ops->common->get_link(edev->cdev, &link_output);
3550 qede_link_update(edev, &link_output);
3551
3552 DP_INFO(edev, "Ending successfully qede load\n");
3553
3554 return 0;
3555
3556err4:
3557 qede_sync_free_irqs(edev);
3558 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3559err3:
3560 qede_napi_disable_remove(edev);
3561err2:
3562 qede_free_mem_load(edev);
3563err1:
3564 edev->ops->common->set_fp_int(edev->cdev, 0);
3565 qede_free_fp_array(edev);
3566 edev->num_rss = 0;
3567err0:
3568 return rc;
3569}
3570
3571void qede_reload(struct qede_dev *edev,
3572 void (*func)(struct qede_dev *, union qede_reload_args *),
3573 union qede_reload_args *args)
3574{
3575 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3576
3577
3578
3579 if (func)
3580 func(edev, args);
3581
3582 qede_load(edev, QEDE_LOAD_RELOAD);
3583
3584 mutex_lock(&edev->qede_lock);
3585 qede_config_rx_mode(edev->ndev);
3586 mutex_unlock(&edev->qede_lock);
3587}
3588
3589
3590static int qede_open(struct net_device *ndev)
3591{
3592 struct qede_dev *edev = netdev_priv(ndev);
3593 int rc;
3594
3595 netif_carrier_off(ndev);
3596
3597 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3598
3599 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3600
3601 if (rc)
3602 return rc;
3603
3604 udp_tunnel_get_rx_info(ndev);
3605
3606 return 0;
3607}
3608
3609static int qede_close(struct net_device *ndev)
3610{
3611 struct qede_dev *edev = netdev_priv(ndev);
3612
3613 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3614
3615 return 0;
3616}
3617
3618static void qede_link_update(void *dev, struct qed_link_output *link)
3619{
3620 struct qede_dev *edev = dev;
3621
3622 if (!netif_running(edev->ndev)) {
3623 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3624 return;
3625 }
3626
3627 if (link->link_up) {
3628 if (!netif_carrier_ok(edev->ndev)) {
3629 DP_NOTICE(edev, "Link is up\n");
3630 netif_tx_start_all_queues(edev->ndev);
3631 netif_carrier_on(edev->ndev);
3632 }
3633 } else {
3634 if (netif_carrier_ok(edev->ndev)) {
3635 DP_NOTICE(edev, "Link is down\n");
3636 netif_tx_disable(edev->ndev);
3637 netif_carrier_off(edev->ndev);
3638 }
3639 }
3640}
3641
3642static int qede_set_mac_addr(struct net_device *ndev, void *p)
3643{
3644 struct qede_dev *edev = netdev_priv(ndev);
3645 struct sockaddr *addr = p;
3646 int rc;
3647
3648 ASSERT_RTNL();
3649
3650 DP_INFO(edev, "Set_mac_addr called\n");
3651
3652 if (!is_valid_ether_addr(addr->sa_data)) {
3653 DP_NOTICE(edev, "The MAC address is not valid\n");
3654 return -EFAULT;
3655 }
3656
3657 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3658 DP_NOTICE(edev, "qed prevents setting MAC\n");
3659 return -EINVAL;
3660 }
3661
3662 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3663
3664 if (!netif_running(ndev)) {
3665 DP_NOTICE(edev, "The device is currently down\n");
3666 return 0;
3667 }
3668
3669
3670 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3671 edev->primary_mac);
3672 if (rc)
3673 return rc;
3674
3675
3676 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3677 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3678 edev->primary_mac);
3679}
3680
3681static int
3682qede_configure_mcast_filtering(struct net_device *ndev,
3683 enum qed_filter_rx_mode_type *accept_flags)
3684{
3685 struct qede_dev *edev = netdev_priv(ndev);
3686 unsigned char *mc_macs, *temp;
3687 struct netdev_hw_addr *ha;
3688 int rc = 0, mc_count;
3689 size_t size;
3690
3691 size = 64 * ETH_ALEN;
3692
3693 mc_macs = kzalloc(size, GFP_KERNEL);
3694 if (!mc_macs) {
3695 DP_NOTICE(edev,
3696 "Failed to allocate memory for multicast MACs\n");
3697 rc = -ENOMEM;
3698 goto exit;
3699 }
3700
3701 temp = mc_macs;
3702
3703
3704 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3705 mc_macs, 1);
3706 if (rc)
3707 goto exit;
3708
3709 netif_addr_lock_bh(ndev);
3710
3711 mc_count = netdev_mc_count(ndev);
3712 if (mc_count < 64) {
3713 netdev_for_each_mc_addr(ha, ndev) {
3714 ether_addr_copy(temp, ha->addr);
3715 temp += ETH_ALEN;
3716 }
3717 }
3718
3719 netif_addr_unlock_bh(ndev);
3720
3721
3722 if ((ndev->flags & IFF_ALLMULTI) ||
3723 (mc_count > 64)) {
3724 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3725 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3726 } else {
3727
3728 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3729 mc_macs, mc_count);
3730 }
3731
3732exit:
3733 kfree(mc_macs);
3734 return rc;
3735}
3736
3737static void qede_set_rx_mode(struct net_device *ndev)
3738{
3739 struct qede_dev *edev = netdev_priv(ndev);
3740
3741 DP_INFO(edev, "qede_set_rx_mode called\n");
3742
3743 if (edev->state != QEDE_STATE_OPEN) {
3744 DP_INFO(edev,
3745 "qede_set_rx_mode called while interface is down\n");
3746 } else {
3747 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3748 schedule_delayed_work(&edev->sp_task, 0);
3749 }
3750}
3751
3752
3753static void qede_config_rx_mode(struct net_device *ndev)
3754{
3755 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3756 struct qede_dev *edev = netdev_priv(ndev);
3757 struct qed_filter_params rx_mode;
3758 unsigned char *uc_macs, *temp;
3759 struct netdev_hw_addr *ha;
3760 int rc, uc_count;
3761 size_t size;
3762
3763 netif_addr_lock_bh(ndev);
3764
3765 uc_count = netdev_uc_count(ndev);
3766 size = uc_count * ETH_ALEN;
3767
3768 uc_macs = kzalloc(size, GFP_ATOMIC);
3769 if (!uc_macs) {
3770 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3771 netif_addr_unlock_bh(ndev);
3772 return;
3773 }
3774
3775 temp = uc_macs;
3776 netdev_for_each_uc_addr(ha, ndev) {
3777 ether_addr_copy(temp, ha->addr);
3778 temp += ETH_ALEN;
3779 }
3780
3781 netif_addr_unlock_bh(ndev);
3782
3783
3784 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3785 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3786
3787
3788
3789
3790 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3791 edev->primary_mac);
3792 if (rc)
3793 goto out;
3794
3795
3796 if ((ndev->flags & IFF_PROMISC) ||
3797 (uc_count > 15)) {
3798 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3799 } else {
3800
3801 int i;
3802
3803 temp = uc_macs;
3804 for (i = 0; i < uc_count; i++) {
3805 rc = qede_set_ucast_rx_mac(edev,
3806 QED_FILTER_XCAST_TYPE_ADD,
3807 temp);
3808 if (rc)
3809 goto out;
3810
3811 temp += ETH_ALEN;
3812 }
3813
3814 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3815 if (rc)
3816 goto out;
3817 }
3818
3819
3820 if (ndev->flags & IFF_PROMISC) {
3821 qede_config_accept_any_vlan(edev, true);
3822 } else if (!edev->non_configured_vlans) {
3823
3824
3825
3826
3827 qede_config_accept_any_vlan(edev, false);
3828 }
3829
3830 rx_mode.filter.accept_flags = accept_flags;
3831 edev->ops->filter_config(edev->cdev, &rx_mode);
3832out:
3833 kfree(uc_macs);
3834}
3835