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18#ifndef _WMI_H_
19#define _WMI_H_
20
21#include <linux/types.h>
22#include <net/mac80211.h>
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64struct wmi_cmd_hdr {
65 __le32 cmd_id;
66} __packed;
67
68#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
69#define WMI_CMD_HDR_CMD_ID_LSB 0
70#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
71#define WMI_CMD_HDR_PLT_PRIV_LSB 24
72
73#define HTC_PROTOCOL_VERSION 0x0002
74#define WMI_PROTOCOL_VERSION 0x0002
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82
83typedef __s32 __bitwise a_sle32;
84
85static inline a_sle32 a_cpu_to_sle32(s32 val)
86{
87 return (__force a_sle32)cpu_to_le32(val);
88}
89
90static inline s32 a_sle32_to_cpu(a_sle32 val)
91{
92 return le32_to_cpu((__force __le32)val);
93}
94
95enum wmi_service {
96 WMI_SERVICE_BEACON_OFFLOAD = 0,
97 WMI_SERVICE_SCAN_OFFLOAD,
98 WMI_SERVICE_ROAM_OFFLOAD,
99 WMI_SERVICE_BCN_MISS_OFFLOAD,
100 WMI_SERVICE_STA_PWRSAVE,
101 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
102 WMI_SERVICE_AP_UAPSD,
103 WMI_SERVICE_AP_DFS,
104 WMI_SERVICE_11AC,
105 WMI_SERVICE_BLOCKACK,
106 WMI_SERVICE_PHYERR,
107 WMI_SERVICE_BCN_FILTER,
108 WMI_SERVICE_RTT,
109 WMI_SERVICE_RATECTRL,
110 WMI_SERVICE_WOW,
111 WMI_SERVICE_RATECTRL_CACHE,
112 WMI_SERVICE_IRAM_TIDS,
113 WMI_SERVICE_ARPNS_OFFLOAD,
114 WMI_SERVICE_NLO,
115 WMI_SERVICE_GTK_OFFLOAD,
116 WMI_SERVICE_SCAN_SCH,
117 WMI_SERVICE_CSA_OFFLOAD,
118 WMI_SERVICE_CHATTER,
119 WMI_SERVICE_COEX_FREQAVOID,
120 WMI_SERVICE_PACKET_POWER_SAVE,
121 WMI_SERVICE_FORCE_FW_HANG,
122 WMI_SERVICE_GPIO,
123 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
124 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
125 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
126 WMI_SERVICE_STA_KEEP_ALIVE,
127 WMI_SERVICE_TX_ENCAP,
128 WMI_SERVICE_BURST,
129 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
130 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
131 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
132 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
133 WMI_SERVICE_EARLY_RX,
134 WMI_SERVICE_STA_SMPS,
135 WMI_SERVICE_FWTEST,
136 WMI_SERVICE_STA_WMMAC,
137 WMI_SERVICE_TDLS,
138 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
139 WMI_SERVICE_ADAPTIVE_OCS,
140 WMI_SERVICE_BA_SSN_SUPPORT,
141 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
142 WMI_SERVICE_WLAN_HB,
143 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
144 WMI_SERVICE_BATCH_SCAN,
145 WMI_SERVICE_QPOWER,
146 WMI_SERVICE_PLMREQ,
147 WMI_SERVICE_THERMAL_MGMT,
148 WMI_SERVICE_RMC,
149 WMI_SERVICE_MHF_OFFLOAD,
150 WMI_SERVICE_COEX_SAR,
151 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
152 WMI_SERVICE_NAN,
153 WMI_SERVICE_L1SS_STAT,
154 WMI_SERVICE_ESTIMATE_LINKSPEED,
155 WMI_SERVICE_OBSS_SCAN,
156 WMI_SERVICE_TDLS_OFFCHAN,
157 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
158 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
159 WMI_SERVICE_IBSS_PWRSAVE,
160 WMI_SERVICE_LPASS,
161 WMI_SERVICE_EXTSCAN,
162 WMI_SERVICE_D0WOW,
163 WMI_SERVICE_HSOFFLOAD,
164 WMI_SERVICE_ROAM_HO_OFFLOAD,
165 WMI_SERVICE_RX_FULL_REORDER,
166 WMI_SERVICE_DHCP_OFFLOAD,
167 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
168 WMI_SERVICE_MDNS_OFFLOAD,
169 WMI_SERVICE_SAP_AUTH_OFFLOAD,
170 WMI_SERVICE_ATF,
171 WMI_SERVICE_COEX_GPIO,
172 WMI_SERVICE_ENHANCED_PROXY_STA,
173 WMI_SERVICE_TT,
174 WMI_SERVICE_PEER_CACHING,
175 WMI_SERVICE_AUX_SPECTRAL_INTF,
176 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
177 WMI_SERVICE_BSS_CHANNEL_INFO_64,
178 WMI_SERVICE_EXT_RES_CFG_SUPPORT,
179 WMI_SERVICE_MESH_11S,
180 WMI_SERVICE_MESH_NON_11S,
181 WMI_SERVICE_PEER_STATS,
182 WMI_SERVICE_RESTRT_CHNL_SUPPORT,
183 WMI_SERVICE_TX_MODE_PUSH_ONLY,
184 WMI_SERVICE_TX_MODE_PUSH_PULL,
185 WMI_SERVICE_TX_MODE_DYNAMIC,
186
187
188 WMI_SERVICE_MAX,
189};
190
191enum wmi_10x_service {
192 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
193 WMI_10X_SERVICE_SCAN_OFFLOAD,
194 WMI_10X_SERVICE_ROAM_OFFLOAD,
195 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
196 WMI_10X_SERVICE_STA_PWRSAVE,
197 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
198 WMI_10X_SERVICE_AP_UAPSD,
199 WMI_10X_SERVICE_AP_DFS,
200 WMI_10X_SERVICE_11AC,
201 WMI_10X_SERVICE_BLOCKACK,
202 WMI_10X_SERVICE_PHYERR,
203 WMI_10X_SERVICE_BCN_FILTER,
204 WMI_10X_SERVICE_RTT,
205 WMI_10X_SERVICE_RATECTRL,
206 WMI_10X_SERVICE_WOW,
207 WMI_10X_SERVICE_RATECTRL_CACHE,
208 WMI_10X_SERVICE_IRAM_TIDS,
209 WMI_10X_SERVICE_BURST,
210
211
212 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
213 WMI_10X_SERVICE_FORCE_FW_HANG,
214 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
215 WMI_10X_SERVICE_ATF,
216 WMI_10X_SERVICE_COEX_GPIO,
217 WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
218 WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
219 WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
220 WMI_10X_SERVICE_MESH,
221 WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
222 WMI_10X_SERVICE_PEER_STATS,
223};
224
225enum wmi_main_service {
226 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
227 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
228 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
229 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
230 WMI_MAIN_SERVICE_STA_PWRSAVE,
231 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
232 WMI_MAIN_SERVICE_AP_UAPSD,
233 WMI_MAIN_SERVICE_AP_DFS,
234 WMI_MAIN_SERVICE_11AC,
235 WMI_MAIN_SERVICE_BLOCKACK,
236 WMI_MAIN_SERVICE_PHYERR,
237 WMI_MAIN_SERVICE_BCN_FILTER,
238 WMI_MAIN_SERVICE_RTT,
239 WMI_MAIN_SERVICE_RATECTRL,
240 WMI_MAIN_SERVICE_WOW,
241 WMI_MAIN_SERVICE_RATECTRL_CACHE,
242 WMI_MAIN_SERVICE_IRAM_TIDS,
243 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
244 WMI_MAIN_SERVICE_NLO,
245 WMI_MAIN_SERVICE_GTK_OFFLOAD,
246 WMI_MAIN_SERVICE_SCAN_SCH,
247 WMI_MAIN_SERVICE_CSA_OFFLOAD,
248 WMI_MAIN_SERVICE_CHATTER,
249 WMI_MAIN_SERVICE_COEX_FREQAVOID,
250 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
251 WMI_MAIN_SERVICE_FORCE_FW_HANG,
252 WMI_MAIN_SERVICE_GPIO,
253 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
254 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
255 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
256 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
257 WMI_MAIN_SERVICE_TX_ENCAP,
258};
259
260enum wmi_10_4_service {
261 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
262 WMI_10_4_SERVICE_SCAN_OFFLOAD,
263 WMI_10_4_SERVICE_ROAM_OFFLOAD,
264 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
265 WMI_10_4_SERVICE_STA_PWRSAVE,
266 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
267 WMI_10_4_SERVICE_AP_UAPSD,
268 WMI_10_4_SERVICE_AP_DFS,
269 WMI_10_4_SERVICE_11AC,
270 WMI_10_4_SERVICE_BLOCKACK,
271 WMI_10_4_SERVICE_PHYERR,
272 WMI_10_4_SERVICE_BCN_FILTER,
273 WMI_10_4_SERVICE_RTT,
274 WMI_10_4_SERVICE_RATECTRL,
275 WMI_10_4_SERVICE_WOW,
276 WMI_10_4_SERVICE_RATECTRL_CACHE,
277 WMI_10_4_SERVICE_IRAM_TIDS,
278 WMI_10_4_SERVICE_BURST,
279 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
280 WMI_10_4_SERVICE_GTK_OFFLOAD,
281 WMI_10_4_SERVICE_SCAN_SCH,
282 WMI_10_4_SERVICE_CSA_OFFLOAD,
283 WMI_10_4_SERVICE_CHATTER,
284 WMI_10_4_SERVICE_COEX_FREQAVOID,
285 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
286 WMI_10_4_SERVICE_FORCE_FW_HANG,
287 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
288 WMI_10_4_SERVICE_GPIO,
289 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
290 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
291 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
292 WMI_10_4_SERVICE_TX_ENCAP,
293 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
294 WMI_10_4_SERVICE_EARLY_RX,
295 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
296 WMI_10_4_SERVICE_TT,
297 WMI_10_4_SERVICE_ATF,
298 WMI_10_4_SERVICE_PEER_CACHING,
299 WMI_10_4_SERVICE_COEX_GPIO,
300 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
301 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
302 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
303 WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
304 WMI_10_4_SERVICE_MESH_NON_11S,
305 WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
306 WMI_10_4_SERVICE_PEER_STATS,
307 WMI_10_4_SERVICE_MESH_11S,
308 WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
309 WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
310 WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
311};
312
313static inline char *wmi_service_name(int service_id)
314{
315#define SVCSTR(x) case x: return #x
316
317 switch (service_id) {
318 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
319 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
320 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
321 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
322 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
323 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
324 SVCSTR(WMI_SERVICE_AP_UAPSD);
325 SVCSTR(WMI_SERVICE_AP_DFS);
326 SVCSTR(WMI_SERVICE_11AC);
327 SVCSTR(WMI_SERVICE_BLOCKACK);
328 SVCSTR(WMI_SERVICE_PHYERR);
329 SVCSTR(WMI_SERVICE_BCN_FILTER);
330 SVCSTR(WMI_SERVICE_RTT);
331 SVCSTR(WMI_SERVICE_RATECTRL);
332 SVCSTR(WMI_SERVICE_WOW);
333 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
334 SVCSTR(WMI_SERVICE_IRAM_TIDS);
335 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
336 SVCSTR(WMI_SERVICE_NLO);
337 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
338 SVCSTR(WMI_SERVICE_SCAN_SCH);
339 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
340 SVCSTR(WMI_SERVICE_CHATTER);
341 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
342 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
343 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
344 SVCSTR(WMI_SERVICE_GPIO);
345 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
346 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
347 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
348 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
349 SVCSTR(WMI_SERVICE_TX_ENCAP);
350 SVCSTR(WMI_SERVICE_BURST);
351 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
352 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
353 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
354 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
355 SVCSTR(WMI_SERVICE_EARLY_RX);
356 SVCSTR(WMI_SERVICE_STA_SMPS);
357 SVCSTR(WMI_SERVICE_FWTEST);
358 SVCSTR(WMI_SERVICE_STA_WMMAC);
359 SVCSTR(WMI_SERVICE_TDLS);
360 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
361 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
362 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
363 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
364 SVCSTR(WMI_SERVICE_WLAN_HB);
365 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
366 SVCSTR(WMI_SERVICE_BATCH_SCAN);
367 SVCSTR(WMI_SERVICE_QPOWER);
368 SVCSTR(WMI_SERVICE_PLMREQ);
369 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
370 SVCSTR(WMI_SERVICE_RMC);
371 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
372 SVCSTR(WMI_SERVICE_COEX_SAR);
373 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
374 SVCSTR(WMI_SERVICE_NAN);
375 SVCSTR(WMI_SERVICE_L1SS_STAT);
376 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
377 SVCSTR(WMI_SERVICE_OBSS_SCAN);
378 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
379 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
380 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
381 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
382 SVCSTR(WMI_SERVICE_LPASS);
383 SVCSTR(WMI_SERVICE_EXTSCAN);
384 SVCSTR(WMI_SERVICE_D0WOW);
385 SVCSTR(WMI_SERVICE_HSOFFLOAD);
386 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
387 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
388 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
389 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
390 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
391 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
392 SVCSTR(WMI_SERVICE_ATF);
393 SVCSTR(WMI_SERVICE_COEX_GPIO);
394 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
395 SVCSTR(WMI_SERVICE_TT);
396 SVCSTR(WMI_SERVICE_PEER_CACHING);
397 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
398 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
399 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
400 SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
401 SVCSTR(WMI_SERVICE_MESH_11S);
402 SVCSTR(WMI_SERVICE_MESH_NON_11S);
403 SVCSTR(WMI_SERVICE_PEER_STATS);
404 SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
405 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
406 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
407 SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
408 default:
409 return NULL;
410 }
411
412#undef SVCSTR
413}
414
415#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
416 ((svc_id) < (len) && \
417 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
418 BIT((svc_id) % (sizeof(u32))))
419
420#define SVCMAP(x, y, len) \
421 do { \
422 if (WMI_SERVICE_IS_ENABLED((in), (x), (len))) \
423 __set_bit(y, out); \
424 } while (0)
425
426static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
427 size_t len)
428{
429 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
430 WMI_SERVICE_BEACON_OFFLOAD, len);
431 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
432 WMI_SERVICE_SCAN_OFFLOAD, len);
433 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
434 WMI_SERVICE_ROAM_OFFLOAD, len);
435 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
436 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
437 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
438 WMI_SERVICE_STA_PWRSAVE, len);
439 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
440 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
441 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
442 WMI_SERVICE_AP_UAPSD, len);
443 SVCMAP(WMI_10X_SERVICE_AP_DFS,
444 WMI_SERVICE_AP_DFS, len);
445 SVCMAP(WMI_10X_SERVICE_11AC,
446 WMI_SERVICE_11AC, len);
447 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
448 WMI_SERVICE_BLOCKACK, len);
449 SVCMAP(WMI_10X_SERVICE_PHYERR,
450 WMI_SERVICE_PHYERR, len);
451 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
452 WMI_SERVICE_BCN_FILTER, len);
453 SVCMAP(WMI_10X_SERVICE_RTT,
454 WMI_SERVICE_RTT, len);
455 SVCMAP(WMI_10X_SERVICE_RATECTRL,
456 WMI_SERVICE_RATECTRL, len);
457 SVCMAP(WMI_10X_SERVICE_WOW,
458 WMI_SERVICE_WOW, len);
459 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
460 WMI_SERVICE_RATECTRL_CACHE, len);
461 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
462 WMI_SERVICE_IRAM_TIDS, len);
463 SVCMAP(WMI_10X_SERVICE_BURST,
464 WMI_SERVICE_BURST, len);
465 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
466 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
467 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
468 WMI_SERVICE_FORCE_FW_HANG, len);
469 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
470 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
471 SVCMAP(WMI_10X_SERVICE_ATF,
472 WMI_SERVICE_ATF, len);
473 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
474 WMI_SERVICE_COEX_GPIO, len);
475 SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
476 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
477 SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
478 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
479 SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
480 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
481 SVCMAP(WMI_10X_SERVICE_MESH,
482 WMI_SERVICE_MESH_11S, len);
483 SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
484 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
485 SVCMAP(WMI_10X_SERVICE_PEER_STATS,
486 WMI_SERVICE_PEER_STATS, len);
487}
488
489static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
490 size_t len)
491{
492 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
493 WMI_SERVICE_BEACON_OFFLOAD, len);
494 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
495 WMI_SERVICE_SCAN_OFFLOAD, len);
496 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
497 WMI_SERVICE_ROAM_OFFLOAD, len);
498 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
499 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
500 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
501 WMI_SERVICE_STA_PWRSAVE, len);
502 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
503 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
504 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
505 WMI_SERVICE_AP_UAPSD, len);
506 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
507 WMI_SERVICE_AP_DFS, len);
508 SVCMAP(WMI_MAIN_SERVICE_11AC,
509 WMI_SERVICE_11AC, len);
510 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
511 WMI_SERVICE_BLOCKACK, len);
512 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
513 WMI_SERVICE_PHYERR, len);
514 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
515 WMI_SERVICE_BCN_FILTER, len);
516 SVCMAP(WMI_MAIN_SERVICE_RTT,
517 WMI_SERVICE_RTT, len);
518 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
519 WMI_SERVICE_RATECTRL, len);
520 SVCMAP(WMI_MAIN_SERVICE_WOW,
521 WMI_SERVICE_WOW, len);
522 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
523 WMI_SERVICE_RATECTRL_CACHE, len);
524 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
525 WMI_SERVICE_IRAM_TIDS, len);
526 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
527 WMI_SERVICE_ARPNS_OFFLOAD, len);
528 SVCMAP(WMI_MAIN_SERVICE_NLO,
529 WMI_SERVICE_NLO, len);
530 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
531 WMI_SERVICE_GTK_OFFLOAD, len);
532 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
533 WMI_SERVICE_SCAN_SCH, len);
534 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
535 WMI_SERVICE_CSA_OFFLOAD, len);
536 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
537 WMI_SERVICE_CHATTER, len);
538 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
539 WMI_SERVICE_COEX_FREQAVOID, len);
540 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
541 WMI_SERVICE_PACKET_POWER_SAVE, len);
542 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
543 WMI_SERVICE_FORCE_FW_HANG, len);
544 SVCMAP(WMI_MAIN_SERVICE_GPIO,
545 WMI_SERVICE_GPIO, len);
546 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
547 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
548 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
549 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
550 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
551 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
552 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
553 WMI_SERVICE_STA_KEEP_ALIVE, len);
554 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
555 WMI_SERVICE_TX_ENCAP, len);
556}
557
558static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
559 size_t len)
560{
561 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
562 WMI_SERVICE_BEACON_OFFLOAD, len);
563 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
564 WMI_SERVICE_SCAN_OFFLOAD, len);
565 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
566 WMI_SERVICE_ROAM_OFFLOAD, len);
567 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
568 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
569 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
570 WMI_SERVICE_STA_PWRSAVE, len);
571 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
572 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
573 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
574 WMI_SERVICE_AP_UAPSD, len);
575 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
576 WMI_SERVICE_AP_DFS, len);
577 SVCMAP(WMI_10_4_SERVICE_11AC,
578 WMI_SERVICE_11AC, len);
579 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
580 WMI_SERVICE_BLOCKACK, len);
581 SVCMAP(WMI_10_4_SERVICE_PHYERR,
582 WMI_SERVICE_PHYERR, len);
583 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
584 WMI_SERVICE_BCN_FILTER, len);
585 SVCMAP(WMI_10_4_SERVICE_RTT,
586 WMI_SERVICE_RTT, len);
587 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
588 WMI_SERVICE_RATECTRL, len);
589 SVCMAP(WMI_10_4_SERVICE_WOW,
590 WMI_SERVICE_WOW, len);
591 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
592 WMI_SERVICE_RATECTRL_CACHE, len);
593 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
594 WMI_SERVICE_IRAM_TIDS, len);
595 SVCMAP(WMI_10_4_SERVICE_BURST,
596 WMI_SERVICE_BURST, len);
597 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
598 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
599 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
600 WMI_SERVICE_GTK_OFFLOAD, len);
601 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
602 WMI_SERVICE_SCAN_SCH, len);
603 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
604 WMI_SERVICE_CSA_OFFLOAD, len);
605 SVCMAP(WMI_10_4_SERVICE_CHATTER,
606 WMI_SERVICE_CHATTER, len);
607 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
608 WMI_SERVICE_COEX_FREQAVOID, len);
609 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
610 WMI_SERVICE_PACKET_POWER_SAVE, len);
611 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
612 WMI_SERVICE_FORCE_FW_HANG, len);
613 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
614 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
615 SVCMAP(WMI_10_4_SERVICE_GPIO,
616 WMI_SERVICE_GPIO, len);
617 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
618 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
619 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
620 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
621 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
622 WMI_SERVICE_STA_KEEP_ALIVE, len);
623 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
624 WMI_SERVICE_TX_ENCAP, len);
625 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
626 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
627 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
628 WMI_SERVICE_EARLY_RX, len);
629 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
630 WMI_SERVICE_ENHANCED_PROXY_STA, len);
631 SVCMAP(WMI_10_4_SERVICE_TT,
632 WMI_SERVICE_TT, len);
633 SVCMAP(WMI_10_4_SERVICE_ATF,
634 WMI_SERVICE_ATF, len);
635 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
636 WMI_SERVICE_PEER_CACHING, len);
637 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
638 WMI_SERVICE_COEX_GPIO, len);
639 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
640 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
641 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
642 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
643 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
644 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
645 SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
646 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
647 SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
648 WMI_SERVICE_MESH_NON_11S, len);
649 SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
650 WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
651 SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
652 WMI_SERVICE_PEER_STATS, len);
653 SVCMAP(WMI_10_4_SERVICE_MESH_11S,
654 WMI_SERVICE_MESH_11S, len);
655 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
656 WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
657 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
658 WMI_SERVICE_TX_MODE_PUSH_PULL, len);
659 SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
660 WMI_SERVICE_TX_MODE_DYNAMIC, len);
661}
662
663#undef SVCMAP
664
665
666struct wmi_mac_addr {
667 union {
668 u8 addr[6];
669 struct {
670 u32 word0;
671 u32 word1;
672 } __packed;
673 } __packed;
674} __packed;
675
676struct wmi_cmd_map {
677 u32 init_cmdid;
678 u32 start_scan_cmdid;
679 u32 stop_scan_cmdid;
680 u32 scan_chan_list_cmdid;
681 u32 scan_sch_prio_tbl_cmdid;
682 u32 pdev_set_regdomain_cmdid;
683 u32 pdev_set_channel_cmdid;
684 u32 pdev_set_param_cmdid;
685 u32 pdev_pktlog_enable_cmdid;
686 u32 pdev_pktlog_disable_cmdid;
687 u32 pdev_set_wmm_params_cmdid;
688 u32 pdev_set_ht_cap_ie_cmdid;
689 u32 pdev_set_vht_cap_ie_cmdid;
690 u32 pdev_set_dscp_tid_map_cmdid;
691 u32 pdev_set_quiet_mode_cmdid;
692 u32 pdev_green_ap_ps_enable_cmdid;
693 u32 pdev_get_tpc_config_cmdid;
694 u32 pdev_set_base_macaddr_cmdid;
695 u32 vdev_create_cmdid;
696 u32 vdev_delete_cmdid;
697 u32 vdev_start_request_cmdid;
698 u32 vdev_restart_request_cmdid;
699 u32 vdev_up_cmdid;
700 u32 vdev_stop_cmdid;
701 u32 vdev_down_cmdid;
702 u32 vdev_set_param_cmdid;
703 u32 vdev_install_key_cmdid;
704 u32 peer_create_cmdid;
705 u32 peer_delete_cmdid;
706 u32 peer_flush_tids_cmdid;
707 u32 peer_set_param_cmdid;
708 u32 peer_assoc_cmdid;
709 u32 peer_add_wds_entry_cmdid;
710 u32 peer_remove_wds_entry_cmdid;
711 u32 peer_mcast_group_cmdid;
712 u32 bcn_tx_cmdid;
713 u32 pdev_send_bcn_cmdid;
714 u32 bcn_tmpl_cmdid;
715 u32 bcn_filter_rx_cmdid;
716 u32 prb_req_filter_rx_cmdid;
717 u32 mgmt_tx_cmdid;
718 u32 prb_tmpl_cmdid;
719 u32 addba_clear_resp_cmdid;
720 u32 addba_send_cmdid;
721 u32 addba_status_cmdid;
722 u32 delba_send_cmdid;
723 u32 addba_set_resp_cmdid;
724 u32 send_singleamsdu_cmdid;
725 u32 sta_powersave_mode_cmdid;
726 u32 sta_powersave_param_cmdid;
727 u32 sta_mimo_ps_mode_cmdid;
728 u32 pdev_dfs_enable_cmdid;
729 u32 pdev_dfs_disable_cmdid;
730 u32 roam_scan_mode;
731 u32 roam_scan_rssi_threshold;
732 u32 roam_scan_period;
733 u32 roam_scan_rssi_change_threshold;
734 u32 roam_ap_profile;
735 u32 ofl_scan_add_ap_profile;
736 u32 ofl_scan_remove_ap_profile;
737 u32 ofl_scan_period;
738 u32 p2p_dev_set_device_info;
739 u32 p2p_dev_set_discoverability;
740 u32 p2p_go_set_beacon_ie;
741 u32 p2p_go_set_probe_resp_ie;
742 u32 p2p_set_vendor_ie_data_cmdid;
743 u32 ap_ps_peer_param_cmdid;
744 u32 ap_ps_peer_uapsd_coex_cmdid;
745 u32 peer_rate_retry_sched_cmdid;
746 u32 wlan_profile_trigger_cmdid;
747 u32 wlan_profile_set_hist_intvl_cmdid;
748 u32 wlan_profile_get_profile_data_cmdid;
749 u32 wlan_profile_enable_profile_id_cmdid;
750 u32 wlan_profile_list_profile_id_cmdid;
751 u32 pdev_suspend_cmdid;
752 u32 pdev_resume_cmdid;
753 u32 add_bcn_filter_cmdid;
754 u32 rmv_bcn_filter_cmdid;
755 u32 wow_add_wake_pattern_cmdid;
756 u32 wow_del_wake_pattern_cmdid;
757 u32 wow_enable_disable_wake_event_cmdid;
758 u32 wow_enable_cmdid;
759 u32 wow_hostwakeup_from_sleep_cmdid;
760 u32 rtt_measreq_cmdid;
761 u32 rtt_tsf_cmdid;
762 u32 vdev_spectral_scan_configure_cmdid;
763 u32 vdev_spectral_scan_enable_cmdid;
764 u32 request_stats_cmdid;
765 u32 set_arp_ns_offload_cmdid;
766 u32 network_list_offload_config_cmdid;
767 u32 gtk_offload_cmdid;
768 u32 csa_offload_enable_cmdid;
769 u32 csa_offload_chanswitch_cmdid;
770 u32 chatter_set_mode_cmdid;
771 u32 peer_tid_addba_cmdid;
772 u32 peer_tid_delba_cmdid;
773 u32 sta_dtim_ps_method_cmdid;
774 u32 sta_uapsd_auto_trig_cmdid;
775 u32 sta_keepalive_cmd;
776 u32 echo_cmdid;
777 u32 pdev_utf_cmdid;
778 u32 dbglog_cfg_cmdid;
779 u32 pdev_qvit_cmdid;
780 u32 pdev_ftm_intg_cmdid;
781 u32 vdev_set_keepalive_cmdid;
782 u32 vdev_get_keepalive_cmdid;
783 u32 force_fw_hang_cmdid;
784 u32 gpio_config_cmdid;
785 u32 gpio_output_cmdid;
786 u32 pdev_get_temperature_cmdid;
787 u32 vdev_set_wmm_params_cmdid;
788 u32 tdls_set_state_cmdid;
789 u32 tdls_peer_update_cmdid;
790 u32 adaptive_qcs_cmdid;
791 u32 scan_update_request_cmdid;
792 u32 vdev_standby_response_cmdid;
793 u32 vdev_resume_response_cmdid;
794 u32 wlan_peer_caching_add_peer_cmdid;
795 u32 wlan_peer_caching_evict_peer_cmdid;
796 u32 wlan_peer_caching_restore_peer_cmdid;
797 u32 wlan_peer_caching_print_all_peers_info_cmdid;
798 u32 peer_update_wds_entry_cmdid;
799 u32 peer_add_proxy_sta_entry_cmdid;
800 u32 rtt_keepalive_cmdid;
801 u32 oem_req_cmdid;
802 u32 nan_cmdid;
803 u32 vdev_ratemask_cmdid;
804 u32 qboost_cfg_cmdid;
805 u32 pdev_smart_ant_enable_cmdid;
806 u32 pdev_smart_ant_set_rx_antenna_cmdid;
807 u32 peer_smart_ant_set_tx_antenna_cmdid;
808 u32 peer_smart_ant_set_train_info_cmdid;
809 u32 peer_smart_ant_set_node_config_ops_cmdid;
810 u32 pdev_set_antenna_switch_table_cmdid;
811 u32 pdev_set_ctl_table_cmdid;
812 u32 pdev_set_mimogain_table_cmdid;
813 u32 pdev_ratepwr_table_cmdid;
814 u32 pdev_ratepwr_chainmsk_table_cmdid;
815 u32 pdev_fips_cmdid;
816 u32 tt_set_conf_cmdid;
817 u32 fwtest_cmdid;
818 u32 vdev_atf_request_cmdid;
819 u32 peer_atf_request_cmdid;
820 u32 pdev_get_ani_cck_config_cmdid;
821 u32 pdev_get_ani_ofdm_config_cmdid;
822 u32 pdev_reserve_ast_entry_cmdid;
823 u32 pdev_get_nfcal_power_cmdid;
824 u32 pdev_get_tpc_cmdid;
825 u32 pdev_get_ast_info_cmdid;
826 u32 vdev_set_dscp_tid_map_cmdid;
827 u32 pdev_get_info_cmdid;
828 u32 vdev_get_info_cmdid;
829 u32 vdev_filter_neighbor_rx_packets_cmdid;
830 u32 mu_cal_start_cmdid;
831 u32 set_cca_params_cmdid;
832 u32 pdev_bss_chan_info_request_cmdid;
833 u32 pdev_enable_adaptive_cca_cmdid;
834 u32 ext_resource_cfg_cmdid;
835};
836
837
838
839
840enum wmi_cmd_group {
841
842 WMI_GRP_START = 0x3,
843 WMI_GRP_SCAN = WMI_GRP_START,
844 WMI_GRP_PDEV,
845 WMI_GRP_VDEV,
846 WMI_GRP_PEER,
847 WMI_GRP_MGMT,
848 WMI_GRP_BA_NEG,
849 WMI_GRP_STA_PS,
850 WMI_GRP_DFS,
851 WMI_GRP_ROAM,
852 WMI_GRP_OFL_SCAN,
853 WMI_GRP_P2P,
854 WMI_GRP_AP_PS,
855 WMI_GRP_RATE_CTRL,
856 WMI_GRP_PROFILE,
857 WMI_GRP_SUSPEND,
858 WMI_GRP_BCN_FILTER,
859 WMI_GRP_WOW,
860 WMI_GRP_RTT,
861 WMI_GRP_SPECTRAL,
862 WMI_GRP_STATS,
863 WMI_GRP_ARP_NS_OFL,
864 WMI_GRP_NLO_OFL,
865 WMI_GRP_GTK_OFL,
866 WMI_GRP_CSA_OFL,
867 WMI_GRP_CHATTER,
868 WMI_GRP_TID_ADDBA,
869 WMI_GRP_MISC,
870 WMI_GRP_GPIO,
871};
872
873#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
874#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
875
876#define WMI_CMD_UNSUPPORTED 0
877
878
879enum wmi_cmd_id {
880 WMI_INIT_CMDID = 0x1,
881
882
883 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
884 WMI_STOP_SCAN_CMDID,
885 WMI_SCAN_CHAN_LIST_CMDID,
886 WMI_SCAN_SCH_PRIO_TBL_CMDID,
887
888
889 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
890 WMI_PDEV_SET_CHANNEL_CMDID,
891 WMI_PDEV_SET_PARAM_CMDID,
892 WMI_PDEV_PKTLOG_ENABLE_CMDID,
893 WMI_PDEV_PKTLOG_DISABLE_CMDID,
894 WMI_PDEV_SET_WMM_PARAMS_CMDID,
895 WMI_PDEV_SET_HT_CAP_IE_CMDID,
896 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
897 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
898 WMI_PDEV_SET_QUIET_MODE_CMDID,
899 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
900 WMI_PDEV_GET_TPC_CONFIG_CMDID,
901 WMI_PDEV_SET_BASE_MACADDR_CMDID,
902
903
904 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
905 WMI_VDEV_DELETE_CMDID,
906 WMI_VDEV_START_REQUEST_CMDID,
907 WMI_VDEV_RESTART_REQUEST_CMDID,
908 WMI_VDEV_UP_CMDID,
909 WMI_VDEV_STOP_CMDID,
910 WMI_VDEV_DOWN_CMDID,
911 WMI_VDEV_SET_PARAM_CMDID,
912 WMI_VDEV_INSTALL_KEY_CMDID,
913
914
915 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
916 WMI_PEER_DELETE_CMDID,
917 WMI_PEER_FLUSH_TIDS_CMDID,
918 WMI_PEER_SET_PARAM_CMDID,
919 WMI_PEER_ASSOC_CMDID,
920 WMI_PEER_ADD_WDS_ENTRY_CMDID,
921 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
922 WMI_PEER_MCAST_GROUP_CMDID,
923
924
925 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
926 WMI_PDEV_SEND_BCN_CMDID,
927 WMI_BCN_TMPL_CMDID,
928 WMI_BCN_FILTER_RX_CMDID,
929 WMI_PRB_REQ_FILTER_RX_CMDID,
930 WMI_MGMT_TX_CMDID,
931 WMI_PRB_TMPL_CMDID,
932
933
934 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
935 WMI_ADDBA_SEND_CMDID,
936 WMI_ADDBA_STATUS_CMDID,
937 WMI_DELBA_SEND_CMDID,
938 WMI_ADDBA_SET_RESP_CMDID,
939 WMI_SEND_SINGLEAMSDU_CMDID,
940
941
942 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
943 WMI_STA_POWERSAVE_PARAM_CMDID,
944 WMI_STA_MIMO_PS_MODE_CMDID,
945
946
947 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
948 WMI_PDEV_DFS_DISABLE_CMDID,
949
950
951 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
952 WMI_ROAM_SCAN_RSSI_THRESHOLD,
953 WMI_ROAM_SCAN_PERIOD,
954 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
955 WMI_ROAM_AP_PROFILE,
956
957
958 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
959 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
960 WMI_OFL_SCAN_PERIOD,
961
962
963 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
964 WMI_P2P_DEV_SET_DISCOVERABILITY,
965 WMI_P2P_GO_SET_BEACON_IE,
966 WMI_P2P_GO_SET_PROBE_RESP_IE,
967 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
968
969
970 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
971 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
972
973
974 WMI_PEER_RATE_RETRY_SCHED_CMDID =
975 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
976
977
978 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
979 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
980 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
981 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
982 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
983
984
985 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
986 WMI_PDEV_RESUME_CMDID,
987
988
989 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
990 WMI_RMV_BCN_FILTER_CMDID,
991
992
993 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
994 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
995 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
996 WMI_WOW_ENABLE_CMDID,
997 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
998
999
1000 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
1001 WMI_RTT_TSF_CMDID,
1002
1003
1004 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
1005 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1006
1007
1008 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
1009
1010
1011 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
1012
1013
1014 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
1015
1016
1017 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
1018
1019
1020 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
1021 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
1022
1023
1024 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
1025
1026
1027 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
1028 WMI_PEER_TID_DELBA_CMDID,
1029
1030
1031 WMI_STA_DTIM_PS_METHOD_CMDID,
1032
1033 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
1034
1035
1036
1037 WMI_STA_KEEPALIVE_CMD,
1038
1039
1040 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
1041 WMI_PDEV_UTF_CMDID,
1042 WMI_DBGLOG_CFG_CMDID,
1043 WMI_PDEV_QVIT_CMDID,
1044 WMI_PDEV_FTM_INTG_CMDID,
1045 WMI_VDEV_SET_KEEPALIVE_CMDID,
1046 WMI_VDEV_GET_KEEPALIVE_CMDID,
1047 WMI_FORCE_FW_HANG_CMDID,
1048
1049
1050 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
1051 WMI_GPIO_OUTPUT_CMDID,
1052};
1053
1054enum wmi_event_id {
1055 WMI_SERVICE_READY_EVENTID = 0x1,
1056 WMI_READY_EVENTID,
1057
1058
1059 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1060
1061
1062 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1063 WMI_CHAN_INFO_EVENTID,
1064 WMI_PHYERR_EVENTID,
1065
1066
1067 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1068 WMI_VDEV_STOPPED_EVENTID,
1069 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1070
1071
1072 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1073
1074
1075 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1076 WMI_HOST_SWBA_EVENTID,
1077 WMI_TBTTOFFSET_UPDATE_EVENTID,
1078
1079
1080 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1081 WMI_TX_ADDBA_COMPLETE_EVENTID,
1082
1083
1084 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1085 WMI_PROFILE_MATCH,
1086
1087
1088 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1089
1090
1091 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1092 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1093 WMI_RTT_ERROR_REPORT_EVENTID,
1094
1095
1096 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1097 WMI_GTK_REKEY_FAIL_EVENTID,
1098
1099
1100 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1101
1102
1103 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1104 WMI_PDEV_UTF_EVENTID,
1105 WMI_DEBUG_MESG_EVENTID,
1106 WMI_UPDATE_STATS_EVENTID,
1107 WMI_DEBUG_PRINT_EVENTID,
1108 WMI_DCS_INTERFERENCE_EVENTID,
1109 WMI_PDEV_QVIT_EVENTID,
1110 WMI_WLAN_PROFILE_DATA_EVENTID,
1111 WMI_PDEV_FTM_INTG_EVENTID,
1112 WMI_WLAN_FREQ_AVOID_EVENTID,
1113 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1114
1115
1116 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1117};
1118
1119
1120enum wmi_10x_cmd_id {
1121 WMI_10X_START_CMDID = 0x9000,
1122 WMI_10X_END_CMDID = 0x9FFF,
1123
1124
1125 WMI_10X_INIT_CMDID,
1126
1127
1128
1129 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1130 WMI_10X_STOP_SCAN_CMDID,
1131 WMI_10X_SCAN_CHAN_LIST_CMDID,
1132 WMI_10X_ECHO_CMDID,
1133
1134
1135 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1136 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1137 WMI_10X_PDEV_SET_PARAM_CMDID,
1138 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1139 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1140 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1141 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1142 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1143 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1144 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1145 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1146 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1147 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1148
1149
1150 WMI_10X_VDEV_CREATE_CMDID,
1151 WMI_10X_VDEV_DELETE_CMDID,
1152 WMI_10X_VDEV_START_REQUEST_CMDID,
1153 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1154 WMI_10X_VDEV_UP_CMDID,
1155 WMI_10X_VDEV_STOP_CMDID,
1156 WMI_10X_VDEV_DOWN_CMDID,
1157 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1158 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1159 WMI_10X_VDEV_SET_PARAM_CMDID,
1160 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1161
1162
1163 WMI_10X_PEER_CREATE_CMDID,
1164 WMI_10X_PEER_DELETE_CMDID,
1165 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1166 WMI_10X_PEER_SET_PARAM_CMDID,
1167 WMI_10X_PEER_ASSOC_CMDID,
1168 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1169 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1170 WMI_10X_PEER_MCAST_GROUP_CMDID,
1171
1172
1173
1174 WMI_10X_BCN_TX_CMDID,
1175 WMI_10X_BCN_PRB_TMPL_CMDID,
1176 WMI_10X_BCN_FILTER_RX_CMDID,
1177 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1178 WMI_10X_MGMT_TX_CMDID,
1179
1180
1181 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1182 WMI_10X_ADDBA_SEND_CMDID,
1183 WMI_10X_ADDBA_STATUS_CMDID,
1184 WMI_10X_DELBA_SEND_CMDID,
1185 WMI_10X_ADDBA_SET_RESP_CMDID,
1186 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1187
1188
1189 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1190 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1191 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1192
1193
1194 WMI_10X_DBGLOG_CFG_CMDID,
1195
1196
1197 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1198 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1199
1200
1201 WMI_10X_PDEV_QVIT_CMDID,
1202
1203
1204 WMI_10X_ROAM_SCAN_MODE,
1205 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1206 WMI_10X_ROAM_SCAN_PERIOD,
1207 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1208 WMI_10X_ROAM_AP_PROFILE,
1209 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1210 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1211 WMI_10X_OFL_SCAN_PERIOD,
1212
1213
1214 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1215 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1216 WMI_10X_P2P_GO_SET_BEACON_IE,
1217 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1218
1219
1220 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1221 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1222
1223
1224 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1225
1226
1227 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1228 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1229 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1230 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1231 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1232
1233
1234 WMI_10X_PDEV_SUSPEND_CMDID,
1235 WMI_10X_PDEV_RESUME_CMDID,
1236
1237
1238 WMI_10X_ADD_BCN_FILTER_CMDID,
1239 WMI_10X_RMV_BCN_FILTER_CMDID,
1240
1241
1242 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1243 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1244 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1245 WMI_10X_WOW_ENABLE_CMDID,
1246 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1247
1248
1249 WMI_10X_RTT_MEASREQ_CMDID,
1250 WMI_10X_RTT_TSF_CMDID,
1251
1252
1253 WMI_10X_PDEV_SEND_BCN_CMDID,
1254
1255
1256 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1257 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1258 WMI_10X_REQUEST_STATS_CMDID,
1259
1260
1261 WMI_10X_GPIO_CONFIG_CMDID,
1262 WMI_10X_GPIO_OUTPUT_CMDID,
1263
1264 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1265};
1266
1267enum wmi_10x_event_id {
1268 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1269 WMI_10X_READY_EVENTID,
1270 WMI_10X_START_EVENTID = 0x9000,
1271 WMI_10X_END_EVENTID = 0x9FFF,
1272
1273
1274 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1275 WMI_10X_ECHO_EVENTID,
1276 WMI_10X_DEBUG_MESG_EVENTID,
1277 WMI_10X_UPDATE_STATS_EVENTID,
1278
1279
1280 WMI_10X_INST_RSSI_STATS_EVENTID,
1281
1282
1283 WMI_10X_VDEV_START_RESP_EVENTID,
1284 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1285 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1286 WMI_10X_VDEV_STOPPED_EVENTID,
1287
1288
1289 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1290
1291
1292 WMI_10X_HOST_SWBA_EVENTID,
1293 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1294 WMI_10X_MGMT_RX_EVENTID,
1295
1296
1297 WMI_10X_CHAN_INFO_EVENTID,
1298
1299
1300 WMI_10X_PHYERR_EVENTID,
1301
1302
1303 WMI_10X_ROAM_EVENTID,
1304
1305
1306 WMI_10X_PROFILE_MATCH,
1307
1308
1309 WMI_10X_DEBUG_PRINT_EVENTID,
1310
1311 WMI_10X_PDEV_QVIT_EVENTID,
1312
1313 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1314
1315
1316 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1317 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1318 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1319
1320 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1321 WMI_10X_DCS_INTERFERENCE_EVENTID,
1322
1323
1324 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1325
1326 WMI_10X_GPIO_INPUT_EVENTID,
1327 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1328};
1329
1330enum wmi_10_2_cmd_id {
1331 WMI_10_2_START_CMDID = 0x9000,
1332 WMI_10_2_END_CMDID = 0x9FFF,
1333 WMI_10_2_INIT_CMDID,
1334 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1335 WMI_10_2_STOP_SCAN_CMDID,
1336 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1337 WMI_10_2_ECHO_CMDID,
1338 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1339 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1340 WMI_10_2_PDEV_SET_PARAM_CMDID,
1341 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1342 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1343 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1344 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1345 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1346 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1347 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1348 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1349 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1350 WMI_10_2_VDEV_CREATE_CMDID,
1351 WMI_10_2_VDEV_DELETE_CMDID,
1352 WMI_10_2_VDEV_START_REQUEST_CMDID,
1353 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1354 WMI_10_2_VDEV_UP_CMDID,
1355 WMI_10_2_VDEV_STOP_CMDID,
1356 WMI_10_2_VDEV_DOWN_CMDID,
1357 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1358 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1359 WMI_10_2_VDEV_SET_PARAM_CMDID,
1360 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1361 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1362 WMI_10_2_PEER_CREATE_CMDID,
1363 WMI_10_2_PEER_DELETE_CMDID,
1364 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1365 WMI_10_2_PEER_SET_PARAM_CMDID,
1366 WMI_10_2_PEER_ASSOC_CMDID,
1367 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1368 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1369 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1370 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1371 WMI_10_2_BCN_TX_CMDID,
1372 WMI_10_2_BCN_PRB_TMPL_CMDID,
1373 WMI_10_2_BCN_FILTER_RX_CMDID,
1374 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1375 WMI_10_2_MGMT_TX_CMDID,
1376 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1377 WMI_10_2_ADDBA_SEND_CMDID,
1378 WMI_10_2_ADDBA_STATUS_CMDID,
1379 WMI_10_2_DELBA_SEND_CMDID,
1380 WMI_10_2_ADDBA_SET_RESP_CMDID,
1381 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1382 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1383 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1384 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1385 WMI_10_2_DBGLOG_CFG_CMDID,
1386 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1387 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1388 WMI_10_2_PDEV_QVIT_CMDID,
1389 WMI_10_2_ROAM_SCAN_MODE,
1390 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1391 WMI_10_2_ROAM_SCAN_PERIOD,
1392 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1393 WMI_10_2_ROAM_AP_PROFILE,
1394 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1395 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1396 WMI_10_2_OFL_SCAN_PERIOD,
1397 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1398 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1399 WMI_10_2_P2P_GO_SET_BEACON_IE,
1400 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1401 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1402 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1403 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1404 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1405 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1406 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1407 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1408 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1409 WMI_10_2_PDEV_SUSPEND_CMDID,
1410 WMI_10_2_PDEV_RESUME_CMDID,
1411 WMI_10_2_ADD_BCN_FILTER_CMDID,
1412 WMI_10_2_RMV_BCN_FILTER_CMDID,
1413 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1414 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1415 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1416 WMI_10_2_WOW_ENABLE_CMDID,
1417 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1418 WMI_10_2_RTT_MEASREQ_CMDID,
1419 WMI_10_2_RTT_TSF_CMDID,
1420 WMI_10_2_RTT_KEEPALIVE_CMDID,
1421 WMI_10_2_PDEV_SEND_BCN_CMDID,
1422 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1423 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1424 WMI_10_2_REQUEST_STATS_CMDID,
1425 WMI_10_2_GPIO_CONFIG_CMDID,
1426 WMI_10_2_GPIO_OUTPUT_CMDID,
1427 WMI_10_2_VDEV_RATEMASK_CMDID,
1428 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1429 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1430 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1431 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1432 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1433 WMI_10_2_FORCE_FW_HANG_CMDID,
1434 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1435 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1436 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1437 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1438 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1439 WMI_10_2_PDEV_GET_INFO,
1440 WMI_10_2_VDEV_GET_INFO,
1441 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1442 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1443 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1444 WMI_10_2_MU_CAL_START_CMDID,
1445 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1446 WMI_10_2_SET_CCA_PARAMS,
1447 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1448 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1449};
1450
1451enum wmi_10_2_event_id {
1452 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1453 WMI_10_2_READY_EVENTID,
1454 WMI_10_2_DEBUG_MESG_EVENTID,
1455 WMI_10_2_START_EVENTID = 0x9000,
1456 WMI_10_2_END_EVENTID = 0x9FFF,
1457 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1458 WMI_10_2_ECHO_EVENTID,
1459 WMI_10_2_UPDATE_STATS_EVENTID,
1460 WMI_10_2_INST_RSSI_STATS_EVENTID,
1461 WMI_10_2_VDEV_START_RESP_EVENTID,
1462 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1463 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1464 WMI_10_2_VDEV_STOPPED_EVENTID,
1465 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1466 WMI_10_2_HOST_SWBA_EVENTID,
1467 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1468 WMI_10_2_MGMT_RX_EVENTID,
1469 WMI_10_2_CHAN_INFO_EVENTID,
1470 WMI_10_2_PHYERR_EVENTID,
1471 WMI_10_2_ROAM_EVENTID,
1472 WMI_10_2_PROFILE_MATCH,
1473 WMI_10_2_DEBUG_PRINT_EVENTID,
1474 WMI_10_2_PDEV_QVIT_EVENTID,
1475 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1476 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1477 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1478 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1479 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1480 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1481 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1482 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1483 WMI_10_2_GPIO_INPUT_EVENTID,
1484 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1485 WMI_10_2_GENERIC_BUFFER_EVENTID,
1486 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1487 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1488 WMI_10_2_WDS_PEER_EVENTID,
1489 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1490 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1491 WMI_10_2_MU_REPORT_EVENTID,
1492 WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
1493 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1494};
1495
1496enum wmi_10_4_cmd_id {
1497 WMI_10_4_START_CMDID = 0x9000,
1498 WMI_10_4_END_CMDID = 0x9FFF,
1499 WMI_10_4_INIT_CMDID,
1500 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1501 WMI_10_4_STOP_SCAN_CMDID,
1502 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1503 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1504 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1505 WMI_10_4_ECHO_CMDID,
1506 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1507 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1508 WMI_10_4_PDEV_SET_PARAM_CMDID,
1509 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1510 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1511 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1512 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1513 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1514 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1515 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1516 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1517 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1518 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1519 WMI_10_4_VDEV_CREATE_CMDID,
1520 WMI_10_4_VDEV_DELETE_CMDID,
1521 WMI_10_4_VDEV_START_REQUEST_CMDID,
1522 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1523 WMI_10_4_VDEV_UP_CMDID,
1524 WMI_10_4_VDEV_STOP_CMDID,
1525 WMI_10_4_VDEV_DOWN_CMDID,
1526 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1527 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1528 WMI_10_4_VDEV_SET_PARAM_CMDID,
1529 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1530 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1531 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1532 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1533 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1534 WMI_10_4_PEER_CREATE_CMDID,
1535 WMI_10_4_PEER_DELETE_CMDID,
1536 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1537 WMI_10_4_PEER_SET_PARAM_CMDID,
1538 WMI_10_4_PEER_ASSOC_CMDID,
1539 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1540 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1541 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1542 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1543 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1544 WMI_10_4_BCN_TX_CMDID,
1545 WMI_10_4_PDEV_SEND_BCN_CMDID,
1546 WMI_10_4_BCN_PRB_TMPL_CMDID,
1547 WMI_10_4_BCN_FILTER_RX_CMDID,
1548 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1549 WMI_10_4_MGMT_TX_CMDID,
1550 WMI_10_4_PRB_TMPL_CMDID,
1551 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1552 WMI_10_4_ADDBA_SEND_CMDID,
1553 WMI_10_4_ADDBA_STATUS_CMDID,
1554 WMI_10_4_DELBA_SEND_CMDID,
1555 WMI_10_4_ADDBA_SET_RESP_CMDID,
1556 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1557 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1558 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1559 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1560 WMI_10_4_DBGLOG_CFG_CMDID,
1561 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1562 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1563 WMI_10_4_PDEV_QVIT_CMDID,
1564 WMI_10_4_ROAM_SCAN_MODE,
1565 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1566 WMI_10_4_ROAM_SCAN_PERIOD,
1567 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1568 WMI_10_4_ROAM_AP_PROFILE,
1569 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1570 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1571 WMI_10_4_OFL_SCAN_PERIOD,
1572 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1573 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1574 WMI_10_4_P2P_GO_SET_BEACON_IE,
1575 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1576 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1577 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1578 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1579 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1580 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1581 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1582 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1583 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1584 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1585 WMI_10_4_PDEV_SUSPEND_CMDID,
1586 WMI_10_4_PDEV_RESUME_CMDID,
1587 WMI_10_4_ADD_BCN_FILTER_CMDID,
1588 WMI_10_4_RMV_BCN_FILTER_CMDID,
1589 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1590 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1591 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1592 WMI_10_4_WOW_ENABLE_CMDID,
1593 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1594 WMI_10_4_RTT_MEASREQ_CMDID,
1595 WMI_10_4_RTT_TSF_CMDID,
1596 WMI_10_4_RTT_KEEPALIVE_CMDID,
1597 WMI_10_4_OEM_REQ_CMDID,
1598 WMI_10_4_NAN_CMDID,
1599 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1600 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1601 WMI_10_4_REQUEST_STATS_CMDID,
1602 WMI_10_4_GPIO_CONFIG_CMDID,
1603 WMI_10_4_GPIO_OUTPUT_CMDID,
1604 WMI_10_4_VDEV_RATEMASK_CMDID,
1605 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1606 WMI_10_4_GTK_OFFLOAD_CMDID,
1607 WMI_10_4_QBOOST_CFG_CMDID,
1608 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1609 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1610 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1611 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1612 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1613 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1614 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1615 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1616 WMI_10_4_FORCE_FW_HANG_CMDID,
1617 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1618 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1619 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1620 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1621 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1622 WMI_10_4_PDEV_FIPS_CMDID,
1623 WMI_10_4_TT_SET_CONF_CMDID,
1624 WMI_10_4_FWTEST_CMDID,
1625 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1626 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1627 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1628 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1629 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1630 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1631 WMI_10_4_PDEV_GET_TPC_CMDID,
1632 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1633 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1634 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1635 WMI_10_4_PDEV_GET_INFO_CMDID,
1636 WMI_10_4_VDEV_GET_INFO_CMDID,
1637 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1638 WMI_10_4_MU_CAL_START_CMDID,
1639 WMI_10_4_SET_CCA_PARAMS_CMDID,
1640 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1641 WMI_10_4_EXT_RESOURCE_CFG_CMDID,
1642 WMI_10_4_VDEV_SET_IE_CMDID,
1643 WMI_10_4_SET_LTEU_CONFIG_CMDID,
1644 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1645};
1646
1647enum wmi_10_4_event_id {
1648 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1649 WMI_10_4_READY_EVENTID,
1650 WMI_10_4_DEBUG_MESG_EVENTID,
1651 WMI_10_4_START_EVENTID = 0x9000,
1652 WMI_10_4_END_EVENTID = 0x9FFF,
1653 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1654 WMI_10_4_ECHO_EVENTID,
1655 WMI_10_4_UPDATE_STATS_EVENTID,
1656 WMI_10_4_INST_RSSI_STATS_EVENTID,
1657 WMI_10_4_VDEV_START_RESP_EVENTID,
1658 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1659 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1660 WMI_10_4_VDEV_STOPPED_EVENTID,
1661 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1662 WMI_10_4_HOST_SWBA_EVENTID,
1663 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1664 WMI_10_4_MGMT_RX_EVENTID,
1665 WMI_10_4_CHAN_INFO_EVENTID,
1666 WMI_10_4_PHYERR_EVENTID,
1667 WMI_10_4_ROAM_EVENTID,
1668 WMI_10_4_PROFILE_MATCH,
1669 WMI_10_4_DEBUG_PRINT_EVENTID,
1670 WMI_10_4_PDEV_QVIT_EVENTID,
1671 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1672 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1673 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1674 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1675 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1676 WMI_10_4_OEM_CAPABILITY_EVENTID,
1677 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1678 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1679 WMI_10_4_NAN_EVENTID,
1680 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1681 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1682 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1683 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1684 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1685 WMI_10_4_CSA_HANDLING_EVENTID,
1686 WMI_10_4_GPIO_INPUT_EVENTID,
1687 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1688 WMI_10_4_GENERIC_BUFFER_EVENTID,
1689 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1690 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1691 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1692 WMI_10_4_WDS_PEER_EVENTID,
1693 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1694 WMI_10_4_PDEV_FIPS_EVENTID,
1695 WMI_10_4_TT_STATS_EVENTID,
1696 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1697 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1698 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1699 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1700 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1701 WMI_10_4_PDEV_TPC_EVENTID,
1702 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1703 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1704 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1705 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1706 WMI_10_4_MU_REPORT_EVENTID,
1707 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1708};
1709
1710enum wmi_phy_mode {
1711 MODE_11A = 0,
1712 MODE_11G = 1,
1713 MODE_11B = 2,
1714 MODE_11GONLY = 3,
1715 MODE_11NA_HT20 = 4,
1716 MODE_11NG_HT20 = 5,
1717 MODE_11NA_HT40 = 6,
1718 MODE_11NG_HT40 = 7,
1719 MODE_11AC_VHT20 = 8,
1720 MODE_11AC_VHT40 = 9,
1721 MODE_11AC_VHT80 = 10,
1722
1723 MODE_11AC_VHT20_2G = 11,
1724 MODE_11AC_VHT40_2G = 12,
1725 MODE_11AC_VHT80_2G = 13,
1726 MODE_UNKNOWN = 14,
1727 MODE_MAX = 14
1728};
1729
1730static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1731{
1732 switch (mode) {
1733 case MODE_11A:
1734 return "11a";
1735 case MODE_11G:
1736 return "11g";
1737 case MODE_11B:
1738 return "11b";
1739 case MODE_11GONLY:
1740 return "11gonly";
1741 case MODE_11NA_HT20:
1742 return "11na-ht20";
1743 case MODE_11NG_HT20:
1744 return "11ng-ht20";
1745 case MODE_11NA_HT40:
1746 return "11na-ht40";
1747 case MODE_11NG_HT40:
1748 return "11ng-ht40";
1749 case MODE_11AC_VHT20:
1750 return "11ac-vht20";
1751 case MODE_11AC_VHT40:
1752 return "11ac-vht40";
1753 case MODE_11AC_VHT80:
1754 return "11ac-vht80";
1755 case MODE_11AC_VHT20_2G:
1756 return "11ac-vht20-2g";
1757 case MODE_11AC_VHT40_2G:
1758 return "11ac-vht40-2g";
1759 case MODE_11AC_VHT80_2G:
1760 return "11ac-vht80-2g";
1761 case MODE_UNKNOWN:
1762
1763 break;
1764
1765
1766
1767 };
1768
1769 return "<unknown>";
1770}
1771
1772#define WMI_CHAN_LIST_TAG 0x1
1773#define WMI_SSID_LIST_TAG 0x2
1774#define WMI_BSSID_LIST_TAG 0x3
1775#define WMI_IE_TAG 0x4
1776
1777struct wmi_channel {
1778 __le32 mhz;
1779 __le32 band_center_freq1;
1780 __le32 band_center_freq2;
1781 union {
1782 __le32 flags;
1783 struct {
1784 u8 mode;
1785 } __packed;
1786 } __packed;
1787 union {
1788 __le32 reginfo0;
1789 struct {
1790
1791 u8 min_power;
1792 u8 max_power;
1793 u8 reg_power;
1794 u8 reg_classid;
1795 } __packed;
1796 } __packed;
1797 union {
1798 __le32 reginfo1;
1799 struct {
1800 u8 antenna_max;
1801 u8 max_tx_power;
1802 } __packed;
1803 } __packed;
1804} __packed;
1805
1806struct wmi_channel_arg {
1807 u32 freq;
1808 u32 band_center_freq1;
1809 bool passive;
1810 bool allow_ibss;
1811 bool allow_ht;
1812 bool allow_vht;
1813 bool ht40plus;
1814 bool chan_radar;
1815
1816 u32 min_power;
1817 u32 max_power;
1818 u32 max_reg_power;
1819 u32 max_antenna_gain;
1820 u32 reg_class_id;
1821 enum wmi_phy_mode mode;
1822};
1823
1824enum wmi_channel_change_cause {
1825 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
1826 WMI_CHANNEL_CHANGE_CAUSE_CSA,
1827};
1828
1829#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
1830#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
1831#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
1832#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
1833#define WMI_CHAN_FLAG_DFS (1 << 10)
1834#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
1835#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
1836
1837
1838#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
1839
1840#define WMI_MAX_SPATIAL_STREAM 3
1841
1842
1843#define WMI_HT_CAP_ENABLED 0x0001
1844#define WMI_HT_CAP_HT20_SGI 0x0002
1845#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
1846#define WMI_HT_CAP_TX_STBC 0x0008
1847#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
1848#define WMI_HT_CAP_RX_STBC 0x0030
1849#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
1850#define WMI_HT_CAP_LDPC 0x0040
1851#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
1852#define WMI_HT_CAP_MPDU_DENSITY 0x0700
1853#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
1854#define WMI_HT_CAP_HT40_SGI 0x0800
1855
1856#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
1857 WMI_HT_CAP_HT20_SGI | \
1858 WMI_HT_CAP_HT40_SGI | \
1859 WMI_HT_CAP_TX_STBC | \
1860 WMI_HT_CAP_RX_STBC | \
1861 WMI_HT_CAP_LDPC)
1862
1863
1864
1865
1866
1867
1868
1869
1870#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
1871#define WMI_VHT_CAP_RX_LDPC 0x00000010
1872#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
1873#define WMI_VHT_CAP_TX_STBC 0x00000080
1874#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
1875#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
1876#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
1877#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
1878#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
1879#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
1880
1881
1882#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
1883#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
1884#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
1885
1886#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
1887 WMI_VHT_CAP_RX_LDPC | \
1888 WMI_VHT_CAP_SGI_80MHZ | \
1889 WMI_VHT_CAP_TX_STBC | \
1890 WMI_VHT_CAP_RX_STBC_MASK | \
1891 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
1892 WMI_VHT_CAP_RX_FIXED_ANT | \
1893 WMI_VHT_CAP_TX_FIXED_ANT)
1894
1895
1896
1897
1898
1899#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
1900#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
1901#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
1902
1903enum {
1904 REGDMN_MODE_11A = 0x00001,
1905 REGDMN_MODE_TURBO = 0x00002,
1906 REGDMN_MODE_11B = 0x00004,
1907 REGDMN_MODE_PUREG = 0x00008,
1908 REGDMN_MODE_11G = 0x00008,
1909 REGDMN_MODE_108G = 0x00020,
1910 REGDMN_MODE_108A = 0x00040,
1911 REGDMN_MODE_XR = 0x00100,
1912 REGDMN_MODE_11A_HALF_RATE = 0x00200,
1913 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
1914 REGDMN_MODE_11NG_HT20 = 0x00800,
1915 REGDMN_MODE_11NA_HT20 = 0x01000,
1916 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
1917 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
1918 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
1919 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
1920 REGDMN_MODE_11AC_VHT20 = 0x20000,
1921 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
1922 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
1923 REGDMN_MODE_11AC_VHT80 = 0x100000,
1924 REGDMN_MODE_ALL = 0xffffffff
1925};
1926
1927#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
1928#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
1929#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
1930
1931
1932#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
1933#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
1934#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
1935#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
1936#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
1937#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
1938
1939struct hal_reg_capabilities {
1940
1941 __le32 eeprom_rd;
1942
1943 __le32 eeprom_rd_ext;
1944
1945 __le32 regcap1;
1946
1947 __le32 regcap2;
1948
1949 __le32 wireless_modes;
1950 __le32 low_2ghz_chan;
1951 __le32 high_2ghz_chan;
1952 __le32 low_5ghz_chan;
1953 __le32 high_5ghz_chan;
1954} __packed;
1955
1956enum wlan_mode_capability {
1957 WHAL_WLAN_11A_CAPABILITY = 0x1,
1958 WHAL_WLAN_11G_CAPABILITY = 0x2,
1959 WHAL_WLAN_11AG_CAPABILITY = 0x3,
1960};
1961
1962
1963struct wlan_host_mem_req {
1964
1965 __le32 req_id;
1966
1967 __le32 unit_size;
1968
1969
1970
1971
1972 __le32 num_unit_info;
1973
1974
1975
1976
1977
1978
1979
1980 __le32 num_units;
1981} __packed;
1982
1983
1984
1985
1986
1987
1988struct wmi_service_ready_event {
1989 __le32 sw_version;
1990 __le32 sw_version_1;
1991 __le32 abi_version;
1992
1993 __le32 phy_capability;
1994
1995 __le32 max_frag_entry;
1996 __le32 wmi_service_bitmap[16];
1997 __le32 num_rf_chains;
1998
1999
2000
2001
2002 __le32 ht_cap_info;
2003 __le32 vht_cap_info;
2004 __le32 vht_supp_mcs;
2005 __le32 hw_min_tx_power;
2006 __le32 hw_max_tx_power;
2007 struct hal_reg_capabilities hal_reg_capabilities;
2008 __le32 sys_cap_info;
2009 __le32 min_pkt_size_enable;
2010
2011
2012
2013
2014 __le32 max_bcn_ie_size;
2015
2016
2017
2018
2019
2020
2021 __le32 num_mem_reqs;
2022 struct wlan_host_mem_req mem_reqs[0];
2023} __packed;
2024
2025
2026struct wmi_10x_service_ready_event {
2027 __le32 sw_version;
2028 __le32 abi_version;
2029
2030
2031 __le32 phy_capability;
2032
2033
2034 __le32 max_frag_entry;
2035 __le32 wmi_service_bitmap[16];
2036 __le32 num_rf_chains;
2037
2038
2039
2040
2041
2042 __le32 ht_cap_info;
2043 __le32 vht_cap_info;
2044 __le32 vht_supp_mcs;
2045 __le32 hw_min_tx_power;
2046 __le32 hw_max_tx_power;
2047
2048 struct hal_reg_capabilities hal_reg_capabilities;
2049
2050 __le32 sys_cap_info;
2051 __le32 min_pkt_size_enable;
2052
2053
2054
2055
2056
2057
2058
2059 __le32 num_mem_reqs;
2060
2061 struct wlan_host_mem_req mem_reqs[0];
2062} __packed;
2063
2064#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
2065#define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
2066
2067struct wmi_ready_event {
2068 __le32 sw_version;
2069 __le32 abi_version;
2070 struct wmi_mac_addr mac_addr;
2071 __le32 status;
2072} __packed;
2073
2074struct wmi_resource_config {
2075
2076 __le32 num_vdevs;
2077
2078
2079 __le32 num_peers;
2080
2081
2082
2083
2084
2085
2086
2087
2088 __le32 num_offload_peers;
2089
2090
2091 __le32 num_offload_reorder_bufs;
2092
2093
2094 __le32 num_peer_keys;
2095
2096
2097 __le32 num_tids;
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109 __le32 ast_skid_limit;
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119 __le32 tx_chain_mask;
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131 __le32 rx_chain_mask;
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143 __le32 rx_timeout_pri_vi;
2144 __le32 rx_timeout_pri_vo;
2145 __le32 rx_timeout_pri_be;
2146 __le32 rx_timeout_pri_bk;
2147
2148
2149
2150
2151
2152
2153
2154
2155 __le32 rx_decap_mode;
2156
2157
2158 __le32 scan_max_pending_reqs;
2159
2160
2161 __le32 bmiss_offload_max_vdev;
2162
2163
2164 __le32 roam_offload_max_vdev;
2165
2166
2167 __le32 roam_offload_max_ap_profiles;
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181 __le32 num_mcast_groups;
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192 __le32 num_mcast_table_elems;
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212 __le32 mcast2ucast_mode;
2213
2214
2215
2216
2217
2218
2219
2220
2221 __le32 tx_dbg_log_size;
2222
2223
2224 __le32 num_wds_entries;
2225
2226
2227
2228
2229
2230 __le32 dma_burst_size;
2231
2232
2233
2234
2235
2236 __le32 mac_aggr_delim;
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247 __le32 rx_skip_defrag_timeout_dup_detection_check;
2248
2249
2250
2251
2252
2253
2254 __le32 vow_config;
2255
2256
2257 __le32 gtk_offload_max_vdev;
2258
2259
2260 __le32 num_msdu_desc;
2261
2262
2263
2264
2265
2266
2267
2268 __le32 max_frag_entries;
2269} __packed;
2270
2271struct wmi_resource_config_10x {
2272
2273 __le32 num_vdevs;
2274
2275
2276 __le32 num_peers;
2277
2278
2279 __le32 num_peer_keys;
2280
2281
2282 __le32 num_tids;
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294 __le32 ast_skid_limit;
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304 __le32 tx_chain_mask;
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316 __le32 rx_chain_mask;
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328 __le32 rx_timeout_pri_vi;
2329 __le32 rx_timeout_pri_vo;
2330 __le32 rx_timeout_pri_be;
2331 __le32 rx_timeout_pri_bk;
2332
2333
2334
2335
2336
2337
2338
2339
2340 __le32 rx_decap_mode;
2341
2342
2343 __le32 scan_max_pending_reqs;
2344
2345
2346 __le32 bmiss_offload_max_vdev;
2347
2348
2349 __le32 roam_offload_max_vdev;
2350
2351
2352 __le32 roam_offload_max_ap_profiles;
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366 __le32 num_mcast_groups;
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377 __le32 num_mcast_table_elems;
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397 __le32 mcast2ucast_mode;
2398
2399
2400
2401
2402
2403
2404
2405
2406 __le32 tx_dbg_log_size;
2407
2408
2409 __le32 num_wds_entries;
2410
2411
2412
2413
2414
2415 __le32 dma_burst_size;
2416
2417
2418
2419
2420
2421 __le32 mac_aggr_delim;
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432 __le32 rx_skip_defrag_timeout_dup_detection_check;
2433
2434
2435
2436
2437
2438
2439 __le32 vow_config;
2440
2441
2442 __le32 num_msdu_desc;
2443
2444
2445
2446
2447
2448
2449
2450 __le32 max_frag_entries;
2451} __packed;
2452
2453enum wmi_10_2_feature_mask {
2454 WMI_10_2_RX_BATCH_MODE = BIT(0),
2455 WMI_10_2_ATF_CONFIG = BIT(1),
2456 WMI_10_2_COEX_GPIO = BIT(3),
2457 WMI_10_2_BSS_CHAN_INFO = BIT(6),
2458 WMI_10_2_PEER_STATS = BIT(7),
2459};
2460
2461struct wmi_resource_config_10_2 {
2462 struct wmi_resource_config_10x common;
2463 __le32 max_peer_ext_stats;
2464 __le32 smart_ant_cap;
2465 __le32 bk_min_free;
2466 __le32 be_min_free;
2467 __le32 vi_min_free;
2468 __le32 vo_min_free;
2469 __le32 feature_mask;
2470} __packed;
2471
2472#define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2473#define NUM_UNITS_IS_NUM_PEERS BIT(1)
2474#define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2475
2476struct wmi_resource_config_10_4 {
2477
2478 __le32 num_vdevs;
2479
2480
2481 __le32 num_peers;
2482
2483
2484 __le32 num_active_peers;
2485
2486
2487
2488
2489
2490
2491
2492 __le32 num_offload_peers;
2493
2494
2495
2496
2497 __le32 num_offload_reorder_buffs;
2498
2499
2500 __le32 num_peer_keys;
2501
2502
2503 __le32 num_tids;
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513 __le32 ast_skid_limit;
2514
2515
2516
2517
2518
2519
2520
2521 __le32 tx_chain_mask;
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531 __le32 rx_chain_mask;
2532
2533
2534
2535
2536
2537
2538
2539
2540 __le32 rx_timeout_pri[4];
2541
2542
2543
2544
2545
2546
2547 __le32 rx_decap_mode;
2548
2549 __le32 scan_max_pending_req;
2550
2551 __le32 bmiss_offload_max_vdev;
2552
2553 __le32 roam_offload_max_vdev;
2554
2555 __le32 roam_offload_max_ap_profiles;
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566 __le32 num_mcast_groups;
2567
2568
2569
2570
2571
2572
2573
2574
2575 __le32 num_mcast_table_elems;
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592 __le32 mcast2ucast_mode;
2593
2594
2595
2596
2597
2598
2599 __le32 tx_dbg_log_size;
2600
2601
2602 __le32 num_wds_entries;
2603
2604
2605 __le32 dma_burst_size;
2606
2607
2608
2609
2610 __le32 mac_aggr_delim;
2611
2612
2613
2614
2615
2616
2617
2618
2619 __le32 rx_skip_defrag_timeout_dup_detection_check;
2620
2621
2622
2623
2624 __le32 vow_config;
2625
2626
2627 __le32 gtk_offload_max_vdev;
2628
2629
2630 __le32 num_msdu_desc;
2631
2632
2633
2634
2635
2636
2637 __le32 max_frag_entries;
2638
2639
2640
2641
2642
2643 __le32 max_peer_ext_stats;
2644
2645
2646
2647
2648
2649
2650 __le32 smart_ant_cap;
2651
2652
2653
2654
2655 __le32 bk_minfree;
2656 __le32 be_minfree;
2657 __le32 vi_minfree;
2658 __le32 vo_minfree;
2659
2660
2661
2662
2663
2664 __le32 rx_batchmode;
2665
2666
2667
2668
2669
2670 __le32 tt_support;
2671
2672
2673
2674
2675
2676 __le32 atf_config;
2677
2678
2679
2680
2681
2682 __le32 iphdr_pad_config;
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693 __le32 qwrap_config;
2694} __packed;
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705enum wmi_10_4_feature_mask {
2706 WMI_10_4_LTEU_SUPPORT = BIT(0),
2707 WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
2708 WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
2709 WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
2710 WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
2711 WMI_10_4_PEER_STATS = BIT(5),
2712};
2713
2714struct wmi_ext_resource_config_10_4_cmd {
2715
2716 __le32 host_platform_config;
2717
2718 __le32 fw_feature_bitmap;
2719};
2720
2721
2722struct host_memory_chunk {
2723
2724 __le32 req_id;
2725
2726 __le32 ptr;
2727
2728 __le32 size;
2729} __packed;
2730
2731struct wmi_host_mem_chunks {
2732 __le32 count;
2733
2734 struct host_memory_chunk items[1];
2735} __packed;
2736
2737struct wmi_init_cmd {
2738 struct wmi_resource_config resource_config;
2739 struct wmi_host_mem_chunks mem_chunks;
2740} __packed;
2741
2742
2743struct wmi_init_cmd_10x {
2744 struct wmi_resource_config_10x resource_config;
2745 struct wmi_host_mem_chunks mem_chunks;
2746} __packed;
2747
2748struct wmi_init_cmd_10_2 {
2749 struct wmi_resource_config_10_2 resource_config;
2750 struct wmi_host_mem_chunks mem_chunks;
2751} __packed;
2752
2753struct wmi_init_cmd_10_4 {
2754 struct wmi_resource_config_10_4 resource_config;
2755 struct wmi_host_mem_chunks mem_chunks;
2756} __packed;
2757
2758struct wmi_chan_list_entry {
2759 __le16 freq;
2760 u8 phy_mode;
2761 u8 reserved;
2762} __packed;
2763
2764
2765struct wmi_chan_list {
2766 __le32 tag;
2767 __le32 num_chan;
2768 struct wmi_chan_list_entry channel_list[0];
2769} __packed;
2770
2771struct wmi_bssid_list {
2772 __le32 tag;
2773 __le32 num_bssid;
2774 struct wmi_mac_addr bssid_list[0];
2775} __packed;
2776
2777struct wmi_ie_data {
2778 __le32 tag;
2779 __le32 ie_len;
2780 u8 ie_data[0];
2781} __packed;
2782
2783struct wmi_ssid {
2784 __le32 ssid_len;
2785 u8 ssid[32];
2786} __packed;
2787
2788struct wmi_ssid_list {
2789 __le32 tag;
2790 __le32 num_ssids;
2791 struct wmi_ssid ssids[0];
2792} __packed;
2793
2794
2795#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
2796
2797
2798
2799#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
2800
2801#define WLAN_SCAN_PARAMS_MAX_SSID 16
2802#define WLAN_SCAN_PARAMS_MAX_BSSID 4
2803#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
2804
2805
2806
2807
2808#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
2809
2810
2811enum wmi_scan_priority {
2812 WMI_SCAN_PRIORITY_VERY_LOW = 0,
2813 WMI_SCAN_PRIORITY_LOW,
2814 WMI_SCAN_PRIORITY_MEDIUM,
2815 WMI_SCAN_PRIORITY_HIGH,
2816 WMI_SCAN_PRIORITY_VERY_HIGH,
2817 WMI_SCAN_PRIORITY_COUNT
2818};
2819
2820struct wmi_start_scan_common {
2821
2822 __le32 scan_id;
2823
2824 __le32 scan_req_id;
2825
2826 __le32 vdev_id;
2827
2828 __le32 scan_priority;
2829
2830 __le32 notify_scan_events;
2831
2832 __le32 dwell_time_active;
2833
2834 __le32 dwell_time_passive;
2835
2836
2837
2838
2839 __le32 min_rest_time;
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853 __le32 max_rest_time;
2854
2855
2856
2857
2858
2859
2860
2861 __le32 repeat_probe_time;
2862
2863 __le32 probe_spacing_time;
2864
2865
2866
2867
2868 __le32 idle_time;
2869
2870 __le32 max_scan_time;
2871
2872
2873
2874
2875 __le32 probe_delay;
2876
2877 __le32 scan_ctrl_flags;
2878} __packed;
2879
2880struct wmi_start_scan_tlvs {
2881
2882
2883
2884 u8 tlvs[0];
2885} __packed;
2886
2887struct wmi_start_scan_cmd {
2888 struct wmi_start_scan_common common;
2889 __le32 burst_duration_ms;
2890 struct wmi_start_scan_tlvs tlvs;
2891} __packed;
2892
2893
2894struct wmi_10x_start_scan_cmd {
2895 struct wmi_start_scan_common common;
2896 struct wmi_start_scan_tlvs tlvs;
2897} __packed;
2898
2899struct wmi_ssid_arg {
2900 int len;
2901 const u8 *ssid;
2902};
2903
2904struct wmi_bssid_arg {
2905 const u8 *bssid;
2906};
2907
2908struct wmi_start_scan_arg {
2909 u32 scan_id;
2910 u32 scan_req_id;
2911 u32 vdev_id;
2912 u32 scan_priority;
2913 u32 notify_scan_events;
2914 u32 dwell_time_active;
2915 u32 dwell_time_passive;
2916 u32 min_rest_time;
2917 u32 max_rest_time;
2918 u32 repeat_probe_time;
2919 u32 probe_spacing_time;
2920 u32 idle_time;
2921 u32 max_scan_time;
2922 u32 probe_delay;
2923 u32 scan_ctrl_flags;
2924 u32 burst_duration_ms;
2925
2926 u32 ie_len;
2927 u32 n_channels;
2928 u32 n_ssids;
2929 u32 n_bssids;
2930
2931 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
2932 u16 channels[64];
2933 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
2934 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
2935};
2936
2937
2938
2939
2940#define WMI_SCAN_FLAG_PASSIVE 0x1
2941
2942#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
2943
2944#define WMI_SCAN_ADD_CCK_RATES 0x4
2945
2946#define WMI_SCAN_ADD_OFDM_RATES 0x8
2947
2948#define WMI_SCAN_CHAN_STAT_EVENT 0x10
2949
2950#define WMI_SCAN_FILTER_PROBE_REQ 0x20
2951
2952#define WMI_SCAN_BYPASS_DFS_CHN 0x40
2953
2954
2955#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
2956
2957
2958#define WMI_SCAN_CLASS_MASK 0xFF000000
2959
2960enum wmi_stop_scan_type {
2961 WMI_SCAN_STOP_ONE = 0x00000000,
2962 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
2963 WMI_SCAN_STOP_ALL = 0x04000000,
2964};
2965
2966struct wmi_stop_scan_cmd {
2967 __le32 scan_req_id;
2968 __le32 scan_id;
2969 __le32 req_type;
2970 __le32 vdev_id;
2971} __packed;
2972
2973struct wmi_stop_scan_arg {
2974 u32 req_id;
2975 enum wmi_stop_scan_type req_type;
2976 union {
2977 u32 scan_id;
2978 u32 vdev_id;
2979 } u;
2980};
2981
2982struct wmi_scan_chan_list_cmd {
2983 __le32 num_scan_chans;
2984 struct wmi_channel chan_info[0];
2985} __packed;
2986
2987struct wmi_scan_chan_list_arg {
2988 u32 n_channels;
2989 struct wmi_channel_arg *channels;
2990};
2991
2992enum wmi_bss_filter {
2993 WMI_BSS_FILTER_NONE = 0,
2994 WMI_BSS_FILTER_ALL,
2995 WMI_BSS_FILTER_PROFILE,
2996 WMI_BSS_FILTER_ALL_BUT_PROFILE,
2997 WMI_BSS_FILTER_CURRENT_BSS,
2998 WMI_BSS_FILTER_ALL_BUT_BSS,
2999 WMI_BSS_FILTER_PROBED_SSID,
3000 WMI_BSS_FILTER_LAST_BSS,
3001};
3002
3003enum wmi_scan_event_type {
3004 WMI_SCAN_EVENT_STARTED = BIT(0),
3005 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3006 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3007 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
3008 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3009
3010 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3011 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3012 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3013 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3014 WMI_SCAN_EVENT_MAX = BIT(15),
3015};
3016
3017enum wmi_scan_completion_reason {
3018 WMI_SCAN_REASON_COMPLETED,
3019 WMI_SCAN_REASON_CANCELLED,
3020 WMI_SCAN_REASON_PREEMPTED,
3021 WMI_SCAN_REASON_TIMEDOUT,
3022 WMI_SCAN_REASON_INTERNAL_FAILURE,
3023 WMI_SCAN_REASON_MAX,
3024};
3025
3026struct wmi_scan_event {
3027 __le32 event_type;
3028 __le32 reason;
3029 __le32 channel_freq;
3030 __le32 scan_req_id;
3031 __le32 scan_id;
3032 __le32 vdev_id;
3033} __packed;
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043#define WMI_MGMT_RX_HDR_HEADROOM 52
3044
3045
3046
3047
3048
3049
3050
3051
3052struct wmi_mgmt_rx_hdr_v1 {
3053 __le32 channel;
3054 __le32 snr;
3055 __le32 rate;
3056 __le32 phy_mode;
3057 __le32 buf_len;
3058 __le32 status;
3059} __packed;
3060
3061struct wmi_mgmt_rx_hdr_v2 {
3062 struct wmi_mgmt_rx_hdr_v1 v1;
3063 __le32 rssi_ctl[4];
3064} __packed;
3065
3066struct wmi_mgmt_rx_event_v1 {
3067 struct wmi_mgmt_rx_hdr_v1 hdr;
3068 u8 buf[0];
3069} __packed;
3070
3071struct wmi_mgmt_rx_event_v2 {
3072 struct wmi_mgmt_rx_hdr_v2 hdr;
3073 u8 buf[0];
3074} __packed;
3075
3076struct wmi_10_4_mgmt_rx_hdr {
3077 __le32 channel;
3078 __le32 snr;
3079 u8 rssi_ctl[4];
3080 __le32 rate;
3081 __le32 phy_mode;
3082 __le32 buf_len;
3083 __le32 status;
3084} __packed;
3085
3086struct wmi_10_4_mgmt_rx_event {
3087 struct wmi_10_4_mgmt_rx_hdr hdr;
3088 u8 buf[0];
3089} __packed;
3090
3091struct wmi_mgmt_rx_ext_info {
3092 __le64 rx_mac_timestamp;
3093} __packed __aligned(4);
3094
3095#define WMI_RX_STATUS_OK 0x00
3096#define WMI_RX_STATUS_ERR_CRC 0x01
3097#define WMI_RX_STATUS_ERR_DECRYPT 0x08
3098#define WMI_RX_STATUS_ERR_MIC 0x10
3099#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
3100
3101#define WMI_RX_STATUS_EXT_INFO 0x40
3102
3103#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3104#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3105#define PHY_ERROR_GEN_RADAR 0x05
3106
3107#define PHY_ERROR_10_4_RADAR_MASK 0x4
3108#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3109
3110enum phy_err_type {
3111 PHY_ERROR_UNKNOWN,
3112 PHY_ERROR_SPECTRAL_SCAN,
3113 PHY_ERROR_FALSE_RADAR_EXT,
3114 PHY_ERROR_RADAR
3115};
3116
3117struct wmi_phyerr {
3118 __le32 tsf_timestamp;
3119 __le16 freq1;
3120 __le16 freq2;
3121 u8 rssi_combined;
3122 u8 chan_width_mhz;
3123 u8 phy_err_code;
3124 u8 rsvd0;
3125 __le32 rssi_chains[4];
3126 __le16 nf_chains[4];
3127 __le32 buf_len;
3128 u8 buf[0];
3129} __packed;
3130
3131struct wmi_phyerr_event {
3132 __le32 num_phyerrs;
3133 __le32 tsf_l32;
3134 __le32 tsf_u32;
3135 struct wmi_phyerr phyerrs[0];
3136} __packed;
3137
3138struct wmi_10_4_phyerr_event {
3139 __le32 tsf_l32;
3140 __le32 tsf_u32;
3141 __le16 freq1;
3142 __le16 freq2;
3143 u8 rssi_combined;
3144 u8 chan_width_mhz;
3145 u8 phy_err_code;
3146 u8 rsvd0;
3147 __le32 rssi_chains[4];
3148 __le16 nf_chains[4];
3149 __le32 phy_err_mask[2];
3150 __le32 tsf_timestamp;
3151 __le32 buf_len;
3152 u8 buf[0];
3153} __packed;
3154
3155#define PHYERR_TLV_SIG 0xBB
3156#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3157#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3158#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3159
3160struct phyerr_radar_report {
3161 __le32 reg0;
3162 __le32 reg1;
3163} __packed;
3164
3165#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3166#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3167
3168#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3169#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3170
3171#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3172#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3173
3174#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3175#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3176
3177#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3178#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3179
3180#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3181#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3182
3183#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3184#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3185
3186#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3187#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3188
3189#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3190#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3191
3192#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3193#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3194
3195#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3196#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3197
3198struct phyerr_fft_report {
3199 __le32 reg0;
3200 __le32 reg1;
3201} __packed;
3202
3203#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3204#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3205
3206#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3207#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3208
3209#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3210#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3211
3212#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3213#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3214
3215#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3216#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3217
3218#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3219#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3220
3221#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3222#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3223
3224#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3225#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3226
3227struct phyerr_tlv {
3228 __le16 len;
3229 u8 tag;
3230 u8 sig;
3231} __packed;
3232
3233#define DFS_RSSI_POSSIBLY_FALSE 50
3234#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3235
3236struct wmi_mgmt_tx_hdr {
3237 __le32 vdev_id;
3238 struct wmi_mac_addr peer_macaddr;
3239 __le32 tx_rate;
3240 __le32 tx_power;
3241 __le32 buf_len;
3242} __packed;
3243
3244struct wmi_mgmt_tx_cmd {
3245 struct wmi_mgmt_tx_hdr hdr;
3246 u8 buf[0];
3247} __packed;
3248
3249struct wmi_echo_event {
3250 __le32 value;
3251} __packed;
3252
3253struct wmi_echo_cmd {
3254 __le32 value;
3255} __packed;
3256
3257struct wmi_pdev_set_regdomain_cmd {
3258 __le32 reg_domain;
3259 __le32 reg_domain_2G;
3260 __le32 reg_domain_5G;
3261 __le32 conformance_test_limit_2G;
3262 __le32 conformance_test_limit_5G;
3263} __packed;
3264
3265enum wmi_dfs_region {
3266
3267 WMI_UNINIT_DFS_DOMAIN = 0,
3268
3269
3270 WMI_FCC_DFS_DOMAIN = 1,
3271
3272
3273 WMI_ETSI_DFS_DOMAIN = 2,
3274
3275
3276 WMI_MKK4_DFS_DOMAIN = 3,
3277};
3278
3279struct wmi_pdev_set_regdomain_cmd_10x {
3280 __le32 reg_domain;
3281 __le32 reg_domain_2G;
3282 __le32 reg_domain_5G;
3283 __le32 conformance_test_limit_2G;
3284 __le32 conformance_test_limit_5G;
3285
3286
3287 __le32 dfs_domain;
3288} __packed;
3289
3290
3291struct wmi_pdev_set_quiet_cmd {
3292
3293 __le32 period;
3294
3295
3296 __le32 duration;
3297
3298
3299 __le32 next_start;
3300
3301
3302 __le32 enabled;
3303} __packed;
3304
3305
3306
3307
3308enum ath10k_protmode {
3309 ATH10K_PROT_NONE = 0,
3310 ATH10K_PROT_CTSONLY = 1,
3311 ATH10K_PROT_RTSCTS = 2,
3312};
3313
3314enum wmi_rtscts_profile {
3315 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3316 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3317 WMI_RTSCTS_ACROSS_SW_RETRIES
3318};
3319
3320#define WMI_RTSCTS_ENABLED 1
3321#define WMI_RTSCTS_SET_MASK 0x0f
3322#define WMI_RTSCTS_SET_LSB 0
3323
3324#define WMI_RTSCTS_PROFILE_MASK 0xf0
3325#define WMI_RTSCTS_PROFILE_LSB 4
3326
3327enum wmi_beacon_gen_mode {
3328 WMI_BEACON_STAGGERED_MODE = 0,
3329 WMI_BEACON_BURST_MODE = 1
3330};
3331
3332enum wmi_csa_event_ies_present_flag {
3333 WMI_CSA_IE_PRESENT = 0x00000001,
3334 WMI_XCSA_IE_PRESENT = 0x00000002,
3335 WMI_WBW_IE_PRESENT = 0x00000004,
3336 WMI_CSWARP_IE_PRESENT = 0x00000008,
3337};
3338
3339
3340struct wmi_csa_event {
3341 __le32 i_fc_dur;
3342
3343
3344 struct wmi_mac_addr i_addr1;
3345 struct wmi_mac_addr i_addr2;
3346 __le32 csa_ie[2];
3347 __le32 xcsa_ie[2];
3348 __le32 wb_ie[2];
3349 __le32 cswarp_ie;
3350 __le32 ies_present_flag;
3351} __packed;
3352
3353
3354#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3355#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3356#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3357
3358struct wmi_pdev_param_map {
3359 u32 tx_chain_mask;
3360 u32 rx_chain_mask;
3361 u32 txpower_limit2g;
3362 u32 txpower_limit5g;
3363 u32 txpower_scale;
3364 u32 beacon_gen_mode;
3365 u32 beacon_tx_mode;
3366 u32 resmgr_offchan_mode;
3367 u32 protection_mode;
3368 u32 dynamic_bw;
3369 u32 non_agg_sw_retry_th;
3370 u32 agg_sw_retry_th;
3371 u32 sta_kickout_th;
3372 u32 ac_aggrsize_scaling;
3373 u32 ltr_enable;
3374 u32 ltr_ac_latency_be;
3375 u32 ltr_ac_latency_bk;
3376 u32 ltr_ac_latency_vi;
3377 u32 ltr_ac_latency_vo;
3378 u32 ltr_ac_latency_timeout;
3379 u32 ltr_sleep_override;
3380 u32 ltr_rx_override;
3381 u32 ltr_tx_activity_timeout;
3382 u32 l1ss_enable;
3383 u32 dsleep_enable;
3384 u32 pcielp_txbuf_flush;
3385 u32 pcielp_txbuf_watermark;
3386 u32 pcielp_txbuf_tmo_en;
3387 u32 pcielp_txbuf_tmo_value;
3388 u32 pdev_stats_update_period;
3389 u32 vdev_stats_update_period;
3390 u32 peer_stats_update_period;
3391 u32 bcnflt_stats_update_period;
3392 u32 pmf_qos;
3393 u32 arp_ac_override;
3394 u32 dcs;
3395 u32 ani_enable;
3396 u32 ani_poll_period;
3397 u32 ani_listen_period;
3398 u32 ani_ofdm_level;
3399 u32 ani_cck_level;
3400 u32 dyntxchain;
3401 u32 proxy_sta;
3402 u32 idle_ps_config;
3403 u32 power_gating_sleep;
3404 u32 fast_channel_reset;
3405 u32 burst_dur;
3406 u32 burst_enable;
3407 u32 cal_period;
3408 u32 aggr_burst;
3409 u32 rx_decap_mode;
3410 u32 smart_antenna_default_antenna;
3411 u32 igmpmld_override;
3412 u32 igmpmld_tid;
3413 u32 antenna_gain;
3414 u32 rx_filter;
3415 u32 set_mcast_to_ucast_tid;
3416 u32 proxy_sta_mode;
3417 u32 set_mcast2ucast_mode;
3418 u32 set_mcast2ucast_buffer;
3419 u32 remove_mcast2ucast_buffer;
3420 u32 peer_sta_ps_statechg_enable;
3421 u32 igmpmld_ac_override;
3422 u32 block_interbss;
3423 u32 set_disable_reset_cmdid;
3424 u32 set_msdu_ttl_cmdid;
3425 u32 set_ppdu_duration_cmdid;
3426 u32 txbf_sound_period_cmdid;
3427 u32 set_promisc_mode_cmdid;
3428 u32 set_burst_mode_cmdid;
3429 u32 en_stats;
3430 u32 mu_group_policy;
3431 u32 noise_detection;
3432 u32 noise_threshold;
3433 u32 dpd_enable;
3434 u32 set_mcast_bcast_echo;
3435 u32 atf_strict_sch;
3436 u32 atf_sched_duration;
3437 u32 ant_plzn;
3438 u32 mgmt_retry_limit;
3439 u32 sensitivity_level;
3440 u32 signed_txpower_2g;
3441 u32 signed_txpower_5g;
3442 u32 enable_per_tid_amsdu;
3443 u32 enable_per_tid_ampdu;
3444 u32 cca_threshold;
3445 u32 rts_fixed_rate;
3446 u32 pdev_reset;
3447 u32 wapi_mbssid_offset;
3448 u32 arp_srcaddr;
3449 u32 arp_dstaddr;
3450 u32 enable_btcoex;
3451};
3452
3453#define WMI_PDEV_PARAM_UNSUPPORTED 0
3454
3455enum wmi_pdev_param {
3456
3457 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3458
3459 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3460
3461 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3462
3463 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3464
3465 WMI_PDEV_PARAM_TXPOWER_SCALE,
3466
3467 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3468
3469 WMI_PDEV_PARAM_BEACON_TX_MODE,
3470
3471
3472
3473
3474 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3475
3476
3477
3478
3479 WMI_PDEV_PARAM_PROTECTION_MODE,
3480
3481
3482
3483
3484
3485
3486 WMI_PDEV_PARAM_DYNAMIC_BW,
3487
3488 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3489
3490 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3491
3492 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3493
3494 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3495
3496 WMI_PDEV_PARAM_LTR_ENABLE,
3497
3498 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3499
3500 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3501
3502 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3503
3504 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3505
3506 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3507
3508 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3509
3510 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3511
3512 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3513
3514 WMI_PDEV_PARAM_L1SS_ENABLE,
3515
3516 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3517
3518 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3519
3520 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3521
3522 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3523
3524 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3525
3526 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3527
3528 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3529
3530 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3531
3532 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3533
3534 WMI_PDEV_PARAM_PMF_QOS,
3535
3536 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3537
3538 WMI_PDEV_PARAM_DCS,
3539
3540 WMI_PDEV_PARAM_ANI_ENABLE,
3541
3542 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3543
3544 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3545
3546 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3547
3548 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3549
3550 WMI_PDEV_PARAM_DYNTXCHAIN,
3551
3552 WMI_PDEV_PARAM_PROXY_STA,
3553
3554 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3555
3556 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3557};
3558
3559enum wmi_10x_pdev_param {
3560
3561 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3562
3563 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3564
3565 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3566
3567 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3568
3569 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3570
3571 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3572
3573 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3574
3575
3576
3577
3578 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3579
3580
3581
3582
3583 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3584
3585 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3586
3587 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3588
3589 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3590
3591 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3592
3593 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3594
3595 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3596
3597 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3598
3599 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3600
3601 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3602
3603 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3604
3605 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3606
3607 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3608
3609 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3610
3611 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3612
3613 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3614
3615 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3616
3617 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3618
3619 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3620
3621 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3622
3623 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3624
3625 WMI_10X_PDEV_PARAM_PMF_QOS,
3626
3627 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3628
3629 WMI_10X_PDEV_PARAM_DCS,
3630
3631 WMI_10X_PDEV_PARAM_ANI_ENABLE,
3632
3633 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3634
3635 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3636
3637 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3638
3639 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3640
3641 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3642
3643 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3644
3645 WMI_10X_PDEV_PARAM_BURST_DUR,
3646
3647 WMI_10X_PDEV_PARAM_BURST_ENABLE,
3648
3649
3650 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3651 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
3652 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
3653 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
3654 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
3655 WMI_10X_PDEV_PARAM_RX_FILTER,
3656 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
3657 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
3658 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3659 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3660 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3661 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
3662 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
3663 WMI_10X_PDEV_PARAM_CAL_PERIOD
3664};
3665
3666enum wmi_10_4_pdev_param {
3667 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3668 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
3669 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
3670 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
3671 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
3672 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
3673 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
3674 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3675 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
3676 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
3677 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3678 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
3679 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
3680 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3681 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
3682 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
3683 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
3684 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
3685 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
3686 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3687 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3688 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
3689 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3690 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
3691 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
3692 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3693 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3694 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3695 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3696 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3697 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3698 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3699 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3700 WMI_10_4_PDEV_PARAM_PMF_QOS,
3701 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
3702 WMI_10_4_PDEV_PARAM_DCS,
3703 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
3704 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
3705 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
3706 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
3707 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
3708 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
3709 WMI_10_4_PDEV_PARAM_PROXY_STA,
3710 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
3711 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
3712 WMI_10_4_PDEV_PARAM_AGGR_BURST,
3713 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
3714 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
3715 WMI_10_4_PDEV_PARAM_BURST_DUR,
3716 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
3717 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3718 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
3719 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
3720 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
3721 WMI_10_4_PDEV_PARAM_RX_FILTER,
3722 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
3723 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
3724 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3725 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3726 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3727 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
3728 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
3729 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
3730 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
3731 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
3732 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
3733 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
3734 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
3735 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
3736 WMI_10_4_PDEV_PARAM_EN_STATS,
3737 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
3738 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
3739 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
3740 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
3741 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
3742 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
3743 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
3744 WMI_10_4_PDEV_PARAM_ANT_PLZN,
3745 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
3746 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
3747 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
3748 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
3749 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
3750 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
3751 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
3752 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
3753 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
3754 WMI_10_4_PDEV_PARAM_PDEV_RESET,
3755 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
3756 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
3757 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
3758 WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
3759 WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
3760 WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
3761 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
3762 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
3763 WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
3764 WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
3765 WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
3766 WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
3767};
3768
3769struct wmi_pdev_set_param_cmd {
3770 __le32 param_id;
3771 __le32 param_value;
3772} __packed;
3773
3774
3775#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
3776
3777struct wmi_pdev_get_tpc_config_cmd {
3778
3779 __le32 param;
3780} __packed;
3781
3782#define WMI_TPC_CONFIG_PARAM 1
3783#define WMI_TPC_RATE_MAX 160
3784#define WMI_TPC_TX_N_CHAIN 4
3785#define WMI_TPC_PREAM_TABLE_MAX 10
3786#define WMI_TPC_FLAG 3
3787#define WMI_TPC_BUF_SIZE 10
3788
3789enum wmi_tpc_table_type {
3790 WMI_TPC_TABLE_TYPE_CDD = 0,
3791 WMI_TPC_TABLE_TYPE_STBC = 1,
3792 WMI_TPC_TABLE_TYPE_TXBF = 2,
3793};
3794
3795enum wmi_tpc_config_event_flag {
3796 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
3797 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
3798 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
3799};
3800
3801struct wmi_pdev_tpc_config_event {
3802 __le32 reg_domain;
3803 __le32 chan_freq;
3804 __le32 phy_mode;
3805 __le32 twice_antenna_reduction;
3806 __le32 twice_max_rd_power;
3807 a_sle32 twice_antenna_gain;
3808 __le32 power_limit;
3809 __le32 rate_max;
3810 __le32 num_tx_chain;
3811 __le32 ctl;
3812 __le32 flags;
3813 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
3814 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3815 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3816 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3817 u8 rates_array[WMI_TPC_RATE_MAX];
3818} __packed;
3819
3820
3821enum wmi_tp_scale {
3822 WMI_TP_SCALE_MAX = 0,
3823 WMI_TP_SCALE_50 = 1,
3824 WMI_TP_SCALE_25 = 2,
3825 WMI_TP_SCALE_12 = 3,
3826 WMI_TP_SCALE_MIN = 4,
3827 WMI_TP_SCALE_SIZE = 5,
3828};
3829
3830struct wmi_pdev_chanlist_update_event {
3831
3832 __le32 num_chan;
3833
3834 struct wmi_channel channel_list[1];
3835} __packed;
3836
3837#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
3838
3839struct wmi_debug_mesg_event {
3840
3841 char bufp[WMI_MAX_DEBUG_MESG];
3842} __packed;
3843
3844enum {
3845
3846 VDEV_SUBTYPE_P2PDEV = 0,
3847
3848 VDEV_SUBTYPE_P2PCLI,
3849
3850 VDEV_SUBTYPE_P2PGO,
3851
3852 VDEV_SUBTYPE_BT,
3853};
3854
3855struct wmi_pdev_set_channel_cmd {
3856
3857 struct wmi_channel chan;
3858} __packed;
3859
3860struct wmi_pdev_pktlog_enable_cmd {
3861 __le32 ev_bitmap;
3862} __packed;
3863
3864
3865#define WMI_DSCP_MAP_MAX (64)
3866struct wmi_pdev_set_dscp_tid_map_cmd {
3867
3868 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
3869} __packed;
3870
3871enum mcast_bcast_rate_id {
3872 WMI_SET_MCAST_RATE,
3873 WMI_SET_BCAST_RATE
3874};
3875
3876struct mcast_bcast_rate {
3877 enum mcast_bcast_rate_id rate_id;
3878 __le32 rate;
3879} __packed;
3880
3881struct wmi_wmm_params {
3882 __le32 cwmin;
3883 __le32 cwmax;
3884 __le32 aifs;
3885 __le32 txop;
3886 __le32 acm;
3887 __le32 no_ack;
3888} __packed;
3889
3890struct wmi_pdev_set_wmm_params {
3891 struct wmi_wmm_params ac_be;
3892 struct wmi_wmm_params ac_bk;
3893 struct wmi_wmm_params ac_vi;
3894 struct wmi_wmm_params ac_vo;
3895} __packed;
3896
3897struct wmi_wmm_params_arg {
3898 u32 cwmin;
3899 u32 cwmax;
3900 u32 aifs;
3901 u32 txop;
3902 u32 acm;
3903 u32 no_ack;
3904};
3905
3906struct wmi_wmm_params_all_arg {
3907 struct wmi_wmm_params_arg ac_be;
3908 struct wmi_wmm_params_arg ac_bk;
3909 struct wmi_wmm_params_arg ac_vi;
3910 struct wmi_wmm_params_arg ac_vo;
3911};
3912
3913struct wmi_pdev_stats_tx {
3914
3915 __le32 comp_queued;
3916
3917
3918 __le32 comp_delivered;
3919
3920
3921 __le32 msdu_enqued;
3922
3923
3924 __le32 mpdu_enqued;
3925
3926
3927 __le32 wmm_drop;
3928
3929
3930 __le32 local_enqued;
3931
3932
3933 __le32 local_freed;
3934
3935
3936 __le32 hw_queued;
3937
3938
3939 __le32 hw_reaped;
3940
3941
3942 __le32 underrun;
3943
3944
3945 __le32 tx_abort;
3946
3947
3948 __le32 mpdus_requed;
3949
3950
3951 __le32 tx_ko;
3952
3953
3954 __le32 data_rc;
3955
3956
3957 __le32 self_triggers;
3958
3959
3960 __le32 sw_retry_failure;
3961
3962
3963 __le32 illgl_rate_phy_err;
3964
3965
3966 __le32 pdev_cont_xretry;
3967
3968
3969 __le32 pdev_tx_timeout;
3970
3971
3972 __le32 pdev_resets;
3973
3974
3975 __le32 stateless_tid_alloc_failure;
3976
3977 __le32 phy_underrun;
3978
3979
3980 __le32 txop_ovf;
3981} __packed;
3982
3983struct wmi_10_4_pdev_stats_tx {
3984
3985 __le32 comp_queued;
3986
3987
3988 __le32 comp_delivered;
3989
3990
3991 __le32 msdu_enqued;
3992
3993
3994 __le32 mpdu_enqued;
3995
3996
3997 __le32 wmm_drop;
3998
3999
4000 __le32 local_enqued;
4001
4002
4003 __le32 local_freed;
4004
4005
4006 __le32 hw_queued;
4007
4008
4009 __le32 hw_reaped;
4010
4011
4012 __le32 underrun;
4013
4014
4015 __le32 hw_paused;
4016
4017
4018 __le32 tx_abort;
4019
4020
4021 __le32 mpdus_requed;
4022
4023
4024 __le32 tx_ko;
4025
4026
4027 __le32 data_rc;
4028
4029
4030 __le32 self_triggers;
4031
4032
4033 __le32 sw_retry_failure;
4034
4035
4036 __le32 illgl_rate_phy_err;
4037
4038
4039 __le32 pdev_cont_xretry;
4040
4041
4042 __le32 pdev_tx_timeout;
4043
4044
4045 __le32 pdev_resets;
4046
4047
4048 __le32 stateless_tid_alloc_failure;
4049
4050 __le32 phy_underrun;
4051
4052
4053 __le32 txop_ovf;
4054
4055
4056 __le32 seq_posted;
4057
4058
4059 __le32 seq_failed_queueing;
4060
4061
4062 __le32 seq_completed;
4063
4064
4065 __le32 seq_restarted;
4066
4067
4068 __le32 mu_seq_posted;
4069
4070
4071 __le32 mpdus_sw_flush;
4072
4073
4074 __le32 mpdus_hw_filter;
4075
4076
4077
4078
4079 __le32 mpdus_truncated;
4080
4081
4082 __le32 mpdus_ack_failed;
4083
4084
4085 __le32 mpdus_expired;
4086} __packed;
4087
4088struct wmi_pdev_stats_rx {
4089
4090 __le32 mid_ppdu_route_change;
4091
4092
4093 __le32 status_rcvd;
4094
4095
4096 __le32 r0_frags;
4097 __le32 r1_frags;
4098 __le32 r2_frags;
4099 __le32 r3_frags;
4100
4101
4102 __le32 htt_msdus;
4103 __le32 htt_mpdus;
4104
4105
4106 __le32 loc_msdus;
4107 __le32 loc_mpdus;
4108
4109
4110 __le32 oversize_amsdu;
4111
4112
4113 __le32 phy_errs;
4114
4115
4116 __le32 phy_err_drop;
4117
4118
4119 __le32 mpdu_errs;
4120} __packed;
4121
4122struct wmi_pdev_stats_peer {
4123
4124 __le32 dummy;
4125} __packed;
4126
4127enum wmi_stats_id {
4128 WMI_STAT_PEER = BIT(0),
4129 WMI_STAT_AP = BIT(1),
4130 WMI_STAT_PDEV = BIT(2),
4131 WMI_STAT_VDEV = BIT(3),
4132 WMI_STAT_BCNFLT = BIT(4),
4133 WMI_STAT_VDEV_RATE = BIT(5),
4134};
4135
4136enum wmi_10_4_stats_id {
4137 WMI_10_4_STAT_PEER = BIT(0),
4138 WMI_10_4_STAT_AP = BIT(1),
4139 WMI_10_4_STAT_INST = BIT(2),
4140 WMI_10_4_STAT_PEER_EXTD = BIT(3),
4141};
4142
4143struct wlan_inst_rssi_args {
4144 __le16 cfg_retry_count;
4145 __le16 retry_count;
4146};
4147
4148struct wmi_request_stats_cmd {
4149 __le32 stats_id;
4150
4151 __le32 vdev_id;
4152
4153
4154 struct wmi_mac_addr peer_macaddr;
4155
4156
4157 struct wlan_inst_rssi_args inst_rssi_args;
4158} __packed;
4159
4160
4161enum {
4162
4163 WMI_PDEV_SUSPEND,
4164
4165
4166 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4167};
4168
4169struct wmi_pdev_suspend_cmd {
4170
4171 __le32 suspend_opt;
4172} __packed;
4173
4174struct wmi_stats_event {
4175 __le32 stats_id;
4176
4177
4178
4179
4180 __le32 num_pdev_stats;
4181
4182
4183
4184
4185 __le32 num_vdev_stats;
4186
4187
4188
4189
4190 __le32 num_peer_stats;
4191 __le32 num_bcnflt_stats;
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201 u8 data[0];
4202} __packed;
4203
4204struct wmi_10_2_stats_event {
4205 __le32 stats_id;
4206 __le32 num_pdev_stats;
4207 __le32 num_pdev_ext_stats;
4208 __le32 num_vdev_stats;
4209 __le32 num_peer_stats;
4210 __le32 num_bcnflt_stats;
4211 u8 data[0];
4212} __packed;
4213
4214
4215
4216
4217
4218struct wmi_pdev_stats_base {
4219 __le32 chan_nf;
4220 __le32 tx_frame_count;
4221 __le32 rx_frame_count;
4222 __le32 rx_clear_count;
4223 __le32 cycle_count;
4224 __le32 phy_err_count;
4225 __le32 chan_tx_pwr;
4226} __packed;
4227
4228struct wmi_pdev_stats {
4229 struct wmi_pdev_stats_base base;
4230 struct wmi_pdev_stats_tx tx;
4231 struct wmi_pdev_stats_rx rx;
4232 struct wmi_pdev_stats_peer peer;
4233} __packed;
4234
4235struct wmi_pdev_stats_extra {
4236 __le32 ack_rx_bad;
4237 __le32 rts_bad;
4238 __le32 rts_good;
4239 __le32 fcs_bad;
4240 __le32 no_beacons;
4241 __le32 mib_int_count;
4242} __packed;
4243
4244struct wmi_10x_pdev_stats {
4245 struct wmi_pdev_stats_base base;
4246 struct wmi_pdev_stats_tx tx;
4247 struct wmi_pdev_stats_rx rx;
4248 struct wmi_pdev_stats_peer peer;
4249 struct wmi_pdev_stats_extra extra;
4250} __packed;
4251
4252struct wmi_pdev_stats_mem {
4253 __le32 dram_free;
4254 __le32 iram_free;
4255} __packed;
4256
4257struct wmi_10_2_pdev_stats {
4258 struct wmi_pdev_stats_base base;
4259 struct wmi_pdev_stats_tx tx;
4260 __le32 mc_drop;
4261 struct wmi_pdev_stats_rx rx;
4262 __le32 pdev_rx_timeout;
4263 struct wmi_pdev_stats_mem mem;
4264 struct wmi_pdev_stats_peer peer;
4265 struct wmi_pdev_stats_extra extra;
4266} __packed;
4267
4268struct wmi_10_4_pdev_stats {
4269 struct wmi_pdev_stats_base base;
4270 struct wmi_10_4_pdev_stats_tx tx;
4271 struct wmi_pdev_stats_rx rx;
4272 __le32 rx_ovfl_errs;
4273 struct wmi_pdev_stats_mem mem;
4274 __le32 sram_free_size;
4275 struct wmi_pdev_stats_extra extra;
4276} __packed;
4277
4278
4279
4280
4281
4282struct wmi_vdev_stats {
4283 __le32 vdev_id;
4284} __packed;
4285
4286
4287
4288
4289
4290struct wmi_peer_stats {
4291 struct wmi_mac_addr peer_macaddr;
4292 __le32 peer_rssi;
4293 __le32 peer_tx_rate;
4294} __packed;
4295
4296struct wmi_10x_peer_stats {
4297 struct wmi_peer_stats old;
4298 __le32 peer_rx_rate;
4299} __packed;
4300
4301struct wmi_10_2_peer_stats {
4302 struct wmi_peer_stats old;
4303 __le32 peer_rx_rate;
4304 __le32 current_per;
4305 __le32 retries;
4306 __le32 tx_rate_count;
4307 __le32 max_4ms_frame_len;
4308 __le32 total_sub_frames;
4309 __le32 tx_bytes;
4310 __le32 num_pkt_loss_overflow[4];
4311 __le32 num_pkt_loss_excess_retry[4];
4312} __packed;
4313
4314struct wmi_10_2_4_peer_stats {
4315 struct wmi_10_2_peer_stats common;
4316 __le32 peer_rssi_changed;
4317} __packed;
4318
4319struct wmi_10_2_4_ext_peer_stats {
4320 struct wmi_10_2_peer_stats common;
4321 __le32 peer_rssi_changed;
4322 __le32 rx_duration;
4323} __packed;
4324
4325struct wmi_10_4_peer_stats {
4326 struct wmi_mac_addr peer_macaddr;
4327 __le32 peer_rssi;
4328 __le32 peer_rssi_seq_num;
4329 __le32 peer_tx_rate;
4330 __le32 peer_rx_rate;
4331 __le32 current_per;
4332 __le32 retries;
4333 __le32 tx_rate_count;
4334 __le32 max_4ms_frame_len;
4335 __le32 total_sub_frames;
4336 __le32 tx_bytes;
4337 __le32 num_pkt_loss_overflow[4];
4338 __le32 num_pkt_loss_excess_retry[4];
4339 __le32 peer_rssi_changed;
4340} __packed;
4341
4342struct wmi_10_4_peer_extd_stats {
4343 struct wmi_mac_addr peer_macaddr;
4344 __le32 inactive_time;
4345 __le32 peer_chain_rssi;
4346 __le32 rx_duration;
4347 __le32 reserved[10];
4348} __packed;
4349
4350struct wmi_10_4_bss_bcn_stats {
4351 __le32 vdev_id;
4352 __le32 bss_bcns_dropped;
4353 __le32 bss_bcn_delivered;
4354} __packed;
4355
4356struct wmi_10_4_bss_bcn_filter_stats {
4357 __le32 bcns_dropped;
4358 __le32 bcns_delivered;
4359 __le32 active_filters;
4360 struct wmi_10_4_bss_bcn_stats bss_stats;
4361} __packed;
4362
4363struct wmi_10_2_pdev_ext_stats {
4364 __le32 rx_rssi_comb;
4365 __le32 rx_rssi[4];
4366 __le32 rx_mcs[10];
4367 __le32 tx_mcs[10];
4368 __le32 ack_rssi;
4369} __packed;
4370
4371struct wmi_vdev_create_cmd {
4372 __le32 vdev_id;
4373 __le32 vdev_type;
4374 __le32 vdev_subtype;
4375 struct wmi_mac_addr vdev_macaddr;
4376} __packed;
4377
4378enum wmi_vdev_type {
4379 WMI_VDEV_TYPE_AP = 1,
4380 WMI_VDEV_TYPE_STA = 2,
4381 WMI_VDEV_TYPE_IBSS = 3,
4382 WMI_VDEV_TYPE_MONITOR = 4,
4383};
4384
4385enum wmi_vdev_subtype {
4386 WMI_VDEV_SUBTYPE_NONE,
4387 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4388 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4389 WMI_VDEV_SUBTYPE_P2P_GO,
4390 WMI_VDEV_SUBTYPE_PROXY_STA,
4391 WMI_VDEV_SUBTYPE_MESH_11S,
4392 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4393};
4394
4395enum wmi_vdev_subtype_legacy {
4396 WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
4397 WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
4398 WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
4399 WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
4400 WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
4401};
4402
4403enum wmi_vdev_subtype_10_2_4 {
4404 WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
4405 WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
4406 WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
4407 WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
4408 WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
4409 WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
4410};
4411
4412enum wmi_vdev_subtype_10_4 {
4413 WMI_VDEV_SUBTYPE_10_4_NONE = 0,
4414 WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
4415 WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
4416 WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
4417 WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
4418 WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
4419 WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
4420};
4421
4422
4423
4424
4425
4426
4427
4428#define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
4429
4430
4431
4432
4433
4434
4435#define WMI_VDEV_START_PMF_ENABLED (1 << 1)
4436
4437struct wmi_p2p_noa_descriptor {
4438 __le32 type_count;
4439 __le32 duration;
4440 __le32 interval;
4441 __le32 start_time;
4442} __packed;
4443
4444struct wmi_vdev_start_request_cmd {
4445
4446 struct wmi_channel chan;
4447
4448 __le32 vdev_id;
4449
4450 __le32 requestor_id;
4451
4452 __le32 beacon_interval;
4453
4454 __le32 dtim_period;
4455
4456 __le32 flags;
4457
4458 struct wmi_ssid ssid;
4459
4460 __le32 bcn_tx_rate;
4461
4462 __le32 bcn_tx_power;
4463
4464 __le32 num_noa_descriptors;
4465
4466
4467
4468
4469 __le32 disable_hw_ack;
4470
4471 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4472} __packed;
4473
4474struct wmi_vdev_restart_request_cmd {
4475 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4476} __packed;
4477
4478struct wmi_vdev_start_request_arg {
4479 u32 vdev_id;
4480 struct wmi_channel_arg channel;
4481 u32 bcn_intval;
4482 u32 dtim_period;
4483 u8 *ssid;
4484 u32 ssid_len;
4485 u32 bcn_tx_rate;
4486 u32 bcn_tx_power;
4487 bool disable_hw_ack;
4488 bool hidden_ssid;
4489 bool pmf_enabled;
4490};
4491
4492struct wmi_vdev_delete_cmd {
4493
4494 __le32 vdev_id;
4495} __packed;
4496
4497struct wmi_vdev_up_cmd {
4498 __le32 vdev_id;
4499 __le32 vdev_assoc_id;
4500 struct wmi_mac_addr vdev_bssid;
4501} __packed;
4502
4503struct wmi_vdev_stop_cmd {
4504 __le32 vdev_id;
4505} __packed;
4506
4507struct wmi_vdev_down_cmd {
4508 __le32 vdev_id;
4509} __packed;
4510
4511struct wmi_vdev_standby_response_cmd {
4512
4513 __le32 vdev_id;
4514} __packed;
4515
4516struct wmi_vdev_resume_response_cmd {
4517
4518 __le32 vdev_id;
4519} __packed;
4520
4521struct wmi_vdev_set_param_cmd {
4522 __le32 vdev_id;
4523 __le32 param_id;
4524 __le32 param_value;
4525} __packed;
4526
4527#define WMI_MAX_KEY_INDEX 3
4528#define WMI_MAX_KEY_LEN 32
4529
4530#define WMI_KEY_PAIRWISE 0x00
4531#define WMI_KEY_GROUP 0x01
4532#define WMI_KEY_TX_USAGE 0x02
4533
4534struct wmi_key_seq_counter {
4535 __le32 key_seq_counter_l;
4536 __le32 key_seq_counter_h;
4537} __packed;
4538
4539#define WMI_CIPHER_NONE 0x0
4540#define WMI_CIPHER_WEP 0x1
4541#define WMI_CIPHER_TKIP 0x2
4542#define WMI_CIPHER_AES_OCB 0x3
4543#define WMI_CIPHER_AES_CCM 0x4
4544#define WMI_CIPHER_WAPI 0x5
4545#define WMI_CIPHER_CKIP 0x6
4546#define WMI_CIPHER_AES_CMAC 0x7
4547
4548struct wmi_vdev_install_key_cmd {
4549 __le32 vdev_id;
4550 struct wmi_mac_addr peer_macaddr;
4551 __le32 key_idx;
4552 __le32 key_flags;
4553 __le32 key_cipher;
4554 struct wmi_key_seq_counter key_rsc_counter;
4555 struct wmi_key_seq_counter key_global_rsc_counter;
4556 struct wmi_key_seq_counter key_tsc_counter;
4557 u8 wpi_key_rsc_counter[16];
4558 u8 wpi_key_tsc_counter[16];
4559 __le32 key_len;
4560 __le32 key_txmic_len;
4561 __le32 key_rxmic_len;
4562
4563
4564 u8 key_data[0];
4565} __packed;
4566
4567struct wmi_vdev_install_key_arg {
4568 u32 vdev_id;
4569 const u8 *macaddr;
4570 u32 key_idx;
4571 u32 key_flags;
4572 u32 key_cipher;
4573 u32 key_len;
4574 u32 key_txmic_len;
4575 u32 key_rxmic_len;
4576 const void *key_data;
4577};
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592enum wmi_rate_preamble {
4593 WMI_RATE_PREAMBLE_OFDM,
4594 WMI_RATE_PREAMBLE_CCK,
4595 WMI_RATE_PREAMBLE_HT,
4596 WMI_RATE_PREAMBLE_VHT,
4597};
4598
4599#define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
4600#define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
4601#define ATH10K_HW_RATECODE(rate, nss, preamble) \
4602 (((preamble) << 6) | ((nss) << 4) | (rate))
4603
4604
4605#define WMI_FIXED_RATE_NONE (0xff)
4606
4607struct wmi_vdev_param_map {
4608 u32 rts_threshold;
4609 u32 fragmentation_threshold;
4610 u32 beacon_interval;
4611 u32 listen_interval;
4612 u32 multicast_rate;
4613 u32 mgmt_tx_rate;
4614 u32 slot_time;
4615 u32 preamble;
4616 u32 swba_time;
4617 u32 wmi_vdev_stats_update_period;
4618 u32 wmi_vdev_pwrsave_ageout_time;
4619 u32 wmi_vdev_host_swba_interval;
4620 u32 dtim_period;
4621 u32 wmi_vdev_oc_scheduler_air_time_limit;
4622 u32 wds;
4623 u32 atim_window;
4624 u32 bmiss_count_max;
4625 u32 bmiss_first_bcnt;
4626 u32 bmiss_final_bcnt;
4627 u32 feature_wmm;
4628 u32 chwidth;
4629 u32 chextoffset;
4630 u32 disable_htprotection;
4631 u32 sta_quickkickout;
4632 u32 mgmt_rate;
4633 u32 protection_mode;
4634 u32 fixed_rate;
4635 u32 sgi;
4636 u32 ldpc;
4637 u32 tx_stbc;
4638 u32 rx_stbc;
4639 u32 intra_bss_fwd;
4640 u32 def_keyid;
4641 u32 nss;
4642 u32 bcast_data_rate;
4643 u32 mcast_data_rate;
4644 u32 mcast_indicate;
4645 u32 dhcp_indicate;
4646 u32 unknown_dest_indicate;
4647 u32 ap_keepalive_min_idle_inactive_time_secs;
4648 u32 ap_keepalive_max_idle_inactive_time_secs;
4649 u32 ap_keepalive_max_unresponsive_time_secs;
4650 u32 ap_enable_nawds;
4651 u32 mcast2ucast_set;
4652 u32 enable_rtscts;
4653 u32 txbf;
4654 u32 packet_powersave;
4655 u32 drop_unencry;
4656 u32 tx_encap_type;
4657 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
4658 u32 rc_num_retries;
4659 u32 cabq_maxdur;
4660 u32 mfptest_set;
4661 u32 rts_fixed_rate;
4662 u32 vht_sgimask;
4663 u32 vht80_ratemask;
4664 u32 early_rx_adjust_enable;
4665 u32 early_rx_tgt_bmiss_num;
4666 u32 early_rx_bmiss_sample_cycle;
4667 u32 early_rx_slop_step;
4668 u32 early_rx_init_slop;
4669 u32 early_rx_adjust_pause;
4670 u32 proxy_sta;
4671 u32 meru_vc;
4672 u32 rx_decap_type;
4673 u32 bw_nss_ratemask;
4674 u32 set_tsf;
4675};
4676
4677#define WMI_VDEV_PARAM_UNSUPPORTED 0
4678
4679
4680enum wmi_vdev_param {
4681
4682 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4683
4684 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4685
4686 WMI_VDEV_PARAM_BEACON_INTERVAL,
4687
4688 WMI_VDEV_PARAM_LISTEN_INTERVAL,
4689
4690 WMI_VDEV_PARAM_MULTICAST_RATE,
4691
4692 WMI_VDEV_PARAM_MGMT_TX_RATE,
4693
4694 WMI_VDEV_PARAM_SLOT_TIME,
4695
4696 WMI_VDEV_PARAM_PREAMBLE,
4697
4698 WMI_VDEV_PARAM_SWBA_TIME,
4699
4700 WMI_VDEV_STATS_UPDATE_PERIOD,
4701
4702 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
4703
4704
4705
4706
4707 WMI_VDEV_HOST_SWBA_INTERVAL,
4708
4709 WMI_VDEV_PARAM_DTIM_PERIOD,
4710
4711
4712
4713
4714 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4715
4716 WMI_VDEV_PARAM_WDS,
4717
4718 WMI_VDEV_PARAM_ATIM_WINDOW,
4719
4720 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
4721
4722 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
4723
4724 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
4725
4726 WMI_VDEV_PARAM_FEATURE_WMM,
4727
4728 WMI_VDEV_PARAM_CHWIDTH,
4729
4730 WMI_VDEV_PARAM_CHEXTOFFSET,
4731
4732 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
4733
4734 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
4735
4736 WMI_VDEV_PARAM_MGMT_RATE,
4737
4738 WMI_VDEV_PARAM_PROTECTION_MODE,
4739
4740 WMI_VDEV_PARAM_FIXED_RATE,
4741
4742 WMI_VDEV_PARAM_SGI,
4743
4744 WMI_VDEV_PARAM_LDPC,
4745
4746 WMI_VDEV_PARAM_TX_STBC,
4747
4748 WMI_VDEV_PARAM_RX_STBC,
4749
4750 WMI_VDEV_PARAM_INTRA_BSS_FWD,
4751
4752 WMI_VDEV_PARAM_DEF_KEYID,
4753
4754 WMI_VDEV_PARAM_NSS,
4755
4756 WMI_VDEV_PARAM_BCAST_DATA_RATE,
4757
4758 WMI_VDEV_PARAM_MCAST_DATA_RATE,
4759
4760 WMI_VDEV_PARAM_MCAST_INDICATE,
4761
4762 WMI_VDEV_PARAM_DHCP_INDICATE,
4763
4764 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4765
4766
4767 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777
4778
4779 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4780
4781
4782
4783
4784
4785
4786 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4787
4788
4789 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
4790
4791 WMI_VDEV_PARAM_ENABLE_RTSCTS,
4792
4793 WMI_VDEV_PARAM_TXBF,
4794
4795
4796 WMI_VDEV_PARAM_PACKET_POWERSAVE,
4797
4798
4799
4800
4801
4802 WMI_VDEV_PARAM_DROP_UNENCRY,
4803
4804
4805
4806
4807 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
4808};
4809
4810
4811enum wmi_10x_vdev_param {
4812
4813 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4814
4815 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4816
4817 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
4818
4819 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
4820
4821 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
4822
4823 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
4824
4825 WMI_10X_VDEV_PARAM_SLOT_TIME,
4826
4827 WMI_10X_VDEV_PARAM_PREAMBLE,
4828
4829 WMI_10X_VDEV_PARAM_SWBA_TIME,
4830
4831 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
4832
4833 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
4834
4835
4836
4837
4838 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
4839
4840 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
4841
4842
4843
4844
4845 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4846
4847 WMI_10X_VDEV_PARAM_WDS,
4848
4849 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
4850
4851 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
4852
4853 WMI_10X_VDEV_PARAM_FEATURE_WMM,
4854
4855 WMI_10X_VDEV_PARAM_CHWIDTH,
4856
4857 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
4858
4859 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
4860
4861 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
4862
4863 WMI_10X_VDEV_PARAM_MGMT_RATE,
4864
4865 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
4866
4867 WMI_10X_VDEV_PARAM_FIXED_RATE,
4868
4869 WMI_10X_VDEV_PARAM_SGI,
4870
4871 WMI_10X_VDEV_PARAM_LDPC,
4872
4873 WMI_10X_VDEV_PARAM_TX_STBC,
4874
4875 WMI_10X_VDEV_PARAM_RX_STBC,
4876
4877 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
4878
4879 WMI_10X_VDEV_PARAM_DEF_KEYID,
4880
4881 WMI_10X_VDEV_PARAM_NSS,
4882
4883 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
4884
4885 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
4886
4887 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
4888
4889 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
4890
4891 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4892
4893
4894 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4895
4896
4897
4898
4899
4900
4901
4902
4903
4904
4905
4906 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4907
4908
4909
4910
4911
4912
4913 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4914
4915
4916 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
4917
4918 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
4919
4920 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
4921
4922 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
4923
4924
4925 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
4926 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
4927 WMI_10X_VDEV_PARAM_MFPTEST_SET,
4928 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
4929 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
4930 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
4931 WMI_10X_VDEV_PARAM_TSF_INCREMENT,
4932};
4933
4934enum wmi_10_4_vdev_param {
4935 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4936 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4937 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
4938 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
4939 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
4940 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
4941 WMI_10_4_VDEV_PARAM_SLOT_TIME,
4942 WMI_10_4_VDEV_PARAM_PREAMBLE,
4943 WMI_10_4_VDEV_PARAM_SWBA_TIME,
4944 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
4945 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
4946 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
4947 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
4948 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4949 WMI_10_4_VDEV_PARAM_WDS,
4950 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
4951 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
4952 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
4953 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
4954 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
4955 WMI_10_4_VDEV_PARAM_CHWIDTH,
4956 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
4957 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
4958 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
4959 WMI_10_4_VDEV_PARAM_MGMT_RATE,
4960 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
4961 WMI_10_4_VDEV_PARAM_FIXED_RATE,
4962 WMI_10_4_VDEV_PARAM_SGI,
4963 WMI_10_4_VDEV_PARAM_LDPC,
4964 WMI_10_4_VDEV_PARAM_TX_STBC,
4965 WMI_10_4_VDEV_PARAM_RX_STBC,
4966 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
4967 WMI_10_4_VDEV_PARAM_DEF_KEYID,
4968 WMI_10_4_VDEV_PARAM_NSS,
4969 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
4970 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
4971 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
4972 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
4973 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4974 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4975 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4976 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4977 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
4978 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
4979 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
4980 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
4981 WMI_10_4_VDEV_PARAM_TXBF,
4982 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
4983 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
4984 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
4985 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
4986 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
4987 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
4988 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
4989 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
4990 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
4991 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
4992 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
4993 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
4994 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
4995 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
4996 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
4997 WMI_10_4_VDEV_PARAM_PROXY_STA,
4998 WMI_10_4_VDEV_PARAM_MERU_VC,
4999 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
5000 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
5001 WMI_10_4_VDEV_PARAM_SENSOR_AP,
5002 WMI_10_4_VDEV_PARAM_BEACON_RATE,
5003 WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
5004 WMI_10_4_VDEV_PARAM_STA_KICKOUT,
5005 WMI_10_4_VDEV_PARAM_CAPABILITIES,
5006 WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5007};
5008
5009#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5010#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5011#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5012#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5013
5014#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
5015#define WMI_TXBF_STS_CAP_OFFSET_MASK 0xf0
5016#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
5017#define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
5018
5019
5020#define WMI_VDEV_SLOT_TIME_LONG 0x1
5021
5022#define WMI_VDEV_SLOT_TIME_SHORT 0x2
5023
5024#define WMI_VDEV_PREAMBLE_LONG 0x1
5025
5026#define WMI_VDEV_PREAMBLE_SHORT 0x2
5027
5028enum wmi_start_event_param {
5029 WMI_VDEV_RESP_START_EVENT = 0,
5030 WMI_VDEV_RESP_RESTART_EVENT,
5031};
5032
5033struct wmi_vdev_start_response_event {
5034 __le32 vdev_id;
5035 __le32 req_id;
5036 __le32 resp_type;
5037 __le32 status;
5038} __packed;
5039
5040struct wmi_vdev_standby_req_event {
5041
5042 __le32 vdev_id;
5043} __packed;
5044
5045struct wmi_vdev_resume_req_event {
5046
5047 __le32 vdev_id;
5048} __packed;
5049
5050struct wmi_vdev_stopped_event {
5051
5052 __le32 vdev_id;
5053} __packed;
5054
5055
5056
5057
5058
5059struct wmi_vdev_simple_event {
5060
5061 __le32 vdev_id;
5062} __packed;
5063
5064
5065
5066#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
5067
5068
5069#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
5070
5071
5072#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
5073
5074
5075struct wmi_vdev_spectral_conf_cmd {
5076 __le32 vdev_id;
5077
5078
5079 __le32 scan_count;
5080 __le32 scan_period;
5081 __le32 scan_priority;
5082
5083
5084 __le32 scan_fft_size;
5085 __le32 scan_gc_ena;
5086 __le32 scan_restart_ena;
5087 __le32 scan_noise_floor_ref;
5088 __le32 scan_init_delay;
5089 __le32 scan_nb_tone_thr;
5090 __le32 scan_str_bin_thr;
5091 __le32 scan_wb_rpt_mode;
5092 __le32 scan_rssi_rpt_mode;
5093 __le32 scan_rssi_thr;
5094 __le32 scan_pwr_format;
5095
5096
5097
5098
5099
5100
5101
5102
5103
5104
5105
5106
5107 __le32 scan_rpt_mode;
5108 __le32 scan_bin_scale;
5109 __le32 scan_dbm_adj;
5110 __le32 scan_chn_mask;
5111} __packed;
5112
5113struct wmi_vdev_spectral_conf_arg {
5114 u32 vdev_id;
5115 u32 scan_count;
5116 u32 scan_period;
5117 u32 scan_priority;
5118 u32 scan_fft_size;
5119 u32 scan_gc_ena;
5120 u32 scan_restart_ena;
5121 u32 scan_noise_floor_ref;
5122 u32 scan_init_delay;
5123 u32 scan_nb_tone_thr;
5124 u32 scan_str_bin_thr;
5125 u32 scan_wb_rpt_mode;
5126 u32 scan_rssi_rpt_mode;
5127 u32 scan_rssi_thr;
5128 u32 scan_pwr_format;
5129 u32 scan_rpt_mode;
5130 u32 scan_bin_scale;
5131 u32 scan_dbm_adj;
5132 u32 scan_chn_mask;
5133};
5134
5135#define WMI_SPECTRAL_ENABLE_DEFAULT 0
5136#define WMI_SPECTRAL_COUNT_DEFAULT 0
5137#define WMI_SPECTRAL_PERIOD_DEFAULT 35
5138#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
5139#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5140#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
5141#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5142#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5143#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5144#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5145#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5146#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5147#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5148#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5149#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5150#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5151#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5152#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5153#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5154
5155struct wmi_vdev_spectral_enable_cmd {
5156 __le32 vdev_id;
5157 __le32 trigger_cmd;
5158 __le32 enable_cmd;
5159} __packed;
5160
5161#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5162#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5163#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5164#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5165
5166
5167struct wmi_bcn_tx_hdr {
5168 __le32 vdev_id;
5169 __le32 tx_rate;
5170 __le32 tx_power;
5171 __le32 bcn_len;
5172} __packed;
5173
5174struct wmi_bcn_tx_cmd {
5175 struct wmi_bcn_tx_hdr hdr;
5176 u8 *bcn[0];
5177} __packed;
5178
5179struct wmi_bcn_tx_arg {
5180 u32 vdev_id;
5181 u32 tx_rate;
5182 u32 tx_power;
5183 u32 bcn_len;
5184 const void *bcn;
5185};
5186
5187enum wmi_bcn_tx_ref_flags {
5188 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5189 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5190};
5191
5192
5193
5194
5195#define WMI_BCN_TX_REF_DEF_ANTENNA 0
5196
5197struct wmi_bcn_tx_ref_cmd {
5198 __le32 vdev_id;
5199 __le32 data_len;
5200
5201 __le32 data_ptr;
5202
5203 __le32 msdu_id;
5204
5205 __le32 frame_control;
5206
5207 __le32 flags;
5208
5209 __le32 antenna_mask;
5210} __packed;
5211
5212
5213#define WMI_BCN_FILTER_ALL 0
5214#define WMI_BCN_FILTER_NONE 1
5215#define WMI_BCN_FILTER_RSSI 2
5216#define WMI_BCN_FILTER_BSSID 3
5217#define WMI_BCN_FILTER_SSID 4
5218
5219struct wmi_bcn_filter_rx_cmd {
5220
5221 __le32 bcn_filter_id;
5222
5223 __le32 bcn_filter;
5224
5225 __le32 bcn_filter_len;
5226
5227 u8 *bcn_filter_buf;
5228} __packed;
5229
5230
5231struct wmi_bcn_prb_info {
5232
5233 __le32 caps;
5234
5235 __le32 erp;
5236
5237
5238
5239
5240
5241
5242
5243
5244
5245} __packed;
5246
5247struct wmi_bcn_tmpl_cmd {
5248
5249 __le32 vdev_id;
5250
5251 __le32 tim_ie_offset;
5252
5253 struct wmi_bcn_prb_info bcn_prb_info;
5254
5255 __le32 buf_len;
5256
5257 u8 data[1];
5258} __packed;
5259
5260struct wmi_prb_tmpl_cmd {
5261
5262 __le32 vdev_id;
5263
5264 struct wmi_bcn_prb_info bcn_prb_info;
5265
5266 __le32 buf_len;
5267
5268 u8 data[1];
5269} __packed;
5270
5271enum wmi_sta_ps_mode {
5272
5273 WMI_STA_PS_MODE_DISABLED = 0,
5274
5275 WMI_STA_PS_MODE_ENABLED = 1,
5276};
5277
5278struct wmi_sta_powersave_mode_cmd {
5279
5280 __le32 vdev_id;
5281
5282
5283
5284
5285
5286 __le32 sta_ps_mode;
5287} __packed;
5288
5289enum wmi_csa_offload_en {
5290 WMI_CSA_OFFLOAD_DISABLE = 0,
5291 WMI_CSA_OFFLOAD_ENABLE = 1,
5292};
5293
5294struct wmi_csa_offload_enable_cmd {
5295 __le32 vdev_id;
5296 __le32 csa_offload_enable;
5297} __packed;
5298
5299struct wmi_csa_offload_chanswitch_cmd {
5300 __le32 vdev_id;
5301 struct wmi_channel chan;
5302} __packed;
5303
5304
5305
5306
5307
5308
5309
5310enum wmi_sta_ps_param_rx_wake_policy {
5311
5312
5313
5314
5315
5316
5317 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5318
5319
5320
5321
5322
5323
5324
5325
5326 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5327};
5328
5329
5330
5331
5332
5333
5334
5335
5336
5337enum wmi_sta_ps_param_tx_wake_threshold {
5338 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5339 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5340
5341
5342
5343
5344
5345};
5346
5347
5348
5349
5350
5351
5352
5353
5354
5355
5356enum wmi_sta_ps_param_pspoll_count {
5357 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5358
5359
5360
5361
5362
5363
5364
5365
5366
5367
5368 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5369};
5370
5371
5372
5373
5374
5375
5376
5377#define WMI_UAPSD_AC_TYPE_DELI 0
5378#define WMI_UAPSD_AC_TYPE_TRIG 1
5379
5380#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5381 ((type == WMI_UAPSD_AC_TYPE_DELI) ? (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
5382
5383enum wmi_sta_ps_param_uapsd {
5384 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5385 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5386 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5387 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5388 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5389 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5390 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5391 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5392};
5393
5394#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5395
5396struct wmi_sta_uapsd_auto_trig_param {
5397 __le32 wmm_ac;
5398 __le32 user_priority;
5399 __le32 service_interval;
5400 __le32 suspend_interval;
5401 __le32 delay_interval;
5402};
5403
5404struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5405 __le32 vdev_id;
5406 struct wmi_mac_addr peer_macaddr;
5407 __le32 num_ac;
5408};
5409
5410struct wmi_sta_uapsd_auto_trig_arg {
5411 u32 wmm_ac;
5412 u32 user_priority;
5413 u32 service_interval;
5414 u32 suspend_interval;
5415 u32 delay_interval;
5416};
5417
5418enum wmi_sta_powersave_param {
5419
5420
5421
5422
5423
5424 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5425
5426
5427
5428
5429
5430
5431 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5432
5433
5434
5435
5436
5437
5438
5439 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5440
5441
5442
5443
5444
5445
5446
5447
5448 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5449
5450
5451
5452
5453
5454
5455 WMI_STA_PS_PARAM_UAPSD = 4,
5456};
5457
5458struct wmi_sta_powersave_param_cmd {
5459 __le32 vdev_id;
5460 __le32 param_id;
5461 __le32 param_value;
5462} __packed;
5463
5464
5465#define WMI_STA_MIMO_PS_MODE_DISABLE
5466
5467#define WMI_STA_MIMO_PS_MODE_STATIC
5468
5469#define WMI_STA_MIMO_PS_MODE_DYNAMIC
5470
5471struct wmi_sta_mimo_ps_mode_cmd {
5472
5473 __le32 vdev_id;
5474
5475 __le32 mimo_pwrsave_mode;
5476} __packed;
5477
5478
5479enum wmi_ap_ps_param_uapsd {
5480 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5481 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5482 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5483 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5484 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5485 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5486 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5487 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5488};
5489
5490
5491enum wmi_ap_ps_peer_param_max_sp {
5492 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5493 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5494 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5495 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5496 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5497};
5498
5499
5500
5501
5502
5503enum wmi_ap_ps_peer_param {
5504
5505
5506
5507
5508
5509
5510
5511
5512
5513
5514
5515 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
5516
5517
5518
5519
5520
5521
5522
5523
5524 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
5525
5526
5527 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
5528};
5529
5530struct wmi_ap_ps_peer_cmd {
5531
5532 __le32 vdev_id;
5533
5534
5535 struct wmi_mac_addr peer_macaddr;
5536
5537
5538 __le32 param_id;
5539
5540
5541 __le32 param_value;
5542} __packed;
5543
5544
5545#define WMI_TIM_BITMAP_ARRAY_SIZE 4
5546
5547struct wmi_tim_info {
5548 __le32 tim_len;
5549 __le32 tim_mcast;
5550 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
5551 __le32 tim_changed;
5552 __le32 tim_num_ps_pending;
5553} __packed;
5554
5555struct wmi_tim_info_arg {
5556 __le32 tim_len;
5557 __le32 tim_mcast;
5558 const __le32 *tim_bitmap;
5559 __le32 tim_changed;
5560 __le32 tim_num_ps_pending;
5561} __packed;
5562
5563
5564#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
5565#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
5566#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
5567#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
5568
5569struct wmi_p2p_noa_info {
5570
5571
5572 u8 changed;
5573
5574 u8 index;
5575
5576
5577 u8 ctwindow_oppps;
5578
5579 u8 num_descriptors;
5580
5581 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
5582} __packed;
5583
5584struct wmi_bcn_info {
5585 struct wmi_tim_info tim_info;
5586 struct wmi_p2p_noa_info p2p_noa_info;
5587} __packed;
5588
5589struct wmi_host_swba_event {
5590 __le32 vdev_map;
5591 struct wmi_bcn_info bcn_info[0];
5592} __packed;
5593
5594struct wmi_10_2_4_bcn_info {
5595 struct wmi_tim_info tim_info;
5596
5597} __packed;
5598
5599struct wmi_10_2_4_host_swba_event {
5600 __le32 vdev_map;
5601 struct wmi_10_2_4_bcn_info bcn_info[0];
5602} __packed;
5603
5604
5605#define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
5606
5607struct wmi_10_4_tim_info {
5608 __le32 tim_len;
5609 __le32 tim_mcast;
5610 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
5611 __le32 tim_changed;
5612 __le32 tim_num_ps_pending;
5613} __packed;
5614
5615#define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
5616
5617struct wmi_10_4_p2p_noa_info {
5618
5619
5620
5621 u8 changed;
5622
5623 u8 index;
5624
5625
5626
5627 u8 ctwindow_oppps;
5628
5629 u8 num_descriptors;
5630
5631 struct wmi_p2p_noa_descriptor
5632 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
5633} __packed;
5634
5635struct wmi_10_4_bcn_info {
5636 struct wmi_10_4_tim_info tim_info;
5637 struct wmi_10_4_p2p_noa_info p2p_noa_info;
5638} __packed;
5639
5640struct wmi_10_4_host_swba_event {
5641 __le32 vdev_map;
5642 struct wmi_10_4_bcn_info bcn_info[0];
5643} __packed;
5644
5645#define WMI_MAX_AP_VDEV 16
5646
5647struct wmi_tbtt_offset_event {
5648 __le32 vdev_map;
5649 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
5650} __packed;
5651
5652struct wmi_peer_create_cmd {
5653 __le32 vdev_id;
5654 struct wmi_mac_addr peer_macaddr;
5655} __packed;
5656
5657enum wmi_peer_type {
5658 WMI_PEER_TYPE_DEFAULT = 0,
5659 WMI_PEER_TYPE_BSS = 1,
5660 WMI_PEER_TYPE_TDLS = 2,
5661};
5662
5663struct wmi_peer_delete_cmd {
5664 __le32 vdev_id;
5665 struct wmi_mac_addr peer_macaddr;
5666} __packed;
5667
5668struct wmi_peer_flush_tids_cmd {
5669 __le32 vdev_id;
5670 struct wmi_mac_addr peer_macaddr;
5671 __le32 peer_tid_bitmap;
5672} __packed;
5673
5674struct wmi_fixed_rate {
5675
5676
5677
5678
5679
5680
5681 __le32 rate_mode;
5682
5683
5684
5685
5686 __le32 rate_series;
5687
5688
5689
5690
5691
5692 __le32 rate_retries;
5693} __packed;
5694
5695struct wmi_peer_fixed_rate_cmd {
5696
5697 __le32 vdev_id;
5698
5699 struct wmi_mac_addr peer_macaddr;
5700
5701 struct wmi_fixed_rate peer_fixed_rate;
5702} __packed;
5703
5704#define WMI_MGMT_TID 17
5705
5706struct wmi_addba_clear_resp_cmd {
5707
5708 __le32 vdev_id;
5709
5710 struct wmi_mac_addr peer_macaddr;
5711} __packed;
5712
5713struct wmi_addba_send_cmd {
5714
5715 __le32 vdev_id;
5716
5717 struct wmi_mac_addr peer_macaddr;
5718
5719 __le32 tid;
5720
5721 __le32 buffersize;
5722} __packed;
5723
5724struct wmi_delba_send_cmd {
5725
5726 __le32 vdev_id;
5727
5728 struct wmi_mac_addr peer_macaddr;
5729
5730 __le32 tid;
5731
5732 __le32 initiator;
5733
5734 __le32 reasoncode;
5735} __packed;
5736
5737struct wmi_addba_setresponse_cmd {
5738
5739 __le32 vdev_id;
5740
5741 struct wmi_mac_addr peer_macaddr;
5742
5743 __le32 tid;
5744
5745 __le32 statuscode;
5746} __packed;
5747
5748struct wmi_send_singleamsdu_cmd {
5749
5750 __le32 vdev_id;
5751
5752 struct wmi_mac_addr peer_macaddr;
5753
5754 __le32 tid;
5755} __packed;
5756
5757enum wmi_peer_smps_state {
5758 WMI_PEER_SMPS_PS_NONE = 0x0,
5759 WMI_PEER_SMPS_STATIC = 0x1,
5760 WMI_PEER_SMPS_DYNAMIC = 0x2
5761};
5762
5763enum wmi_peer_chwidth {
5764 WMI_PEER_CHWIDTH_20MHZ = 0,
5765 WMI_PEER_CHWIDTH_40MHZ = 1,
5766 WMI_PEER_CHWIDTH_80MHZ = 2,
5767};
5768
5769enum wmi_peer_param {
5770 WMI_PEER_SMPS_STATE = 0x1,
5771 WMI_PEER_AMPDU = 0x2,
5772 WMI_PEER_AUTHORIZE = 0x3,
5773 WMI_PEER_CHAN_WIDTH = 0x4,
5774 WMI_PEER_NSS = 0x5,
5775 WMI_PEER_USE_4ADDR = 0x6,
5776 WMI_PEER_DUMMY_VAR = 0xff,
5777};
5778
5779struct wmi_peer_set_param_cmd {
5780 __le32 vdev_id;
5781 struct wmi_mac_addr peer_macaddr;
5782 __le32 param_id;
5783 __le32 param_value;
5784} __packed;
5785
5786#define MAX_SUPPORTED_RATES 128
5787
5788struct wmi_rate_set {
5789
5790 __le32 num_rates;
5791
5792
5793
5794
5795
5796 __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
5797} __packed;
5798
5799struct wmi_rate_set_arg {
5800 unsigned int num_rates;
5801 u8 rates[MAX_SUPPORTED_RATES];
5802};
5803
5804
5805
5806
5807
5808
5809struct wmi_vht_rate_set {
5810 __le32 rx_max_rate;
5811 __le32 rx_mcs_set;
5812 __le32 tx_max_rate;
5813 __le32 tx_mcs_set;
5814} __packed;
5815
5816struct wmi_vht_rate_set_arg {
5817 u32 rx_max_rate;
5818 u32 rx_mcs_set;
5819 u32 tx_max_rate;
5820 u32 tx_mcs_set;
5821};
5822
5823struct wmi_peer_set_rates_cmd {
5824
5825 struct wmi_mac_addr peer_macaddr;
5826
5827 struct wmi_rate_set peer_legacy_rates;
5828
5829 struct wmi_rate_set peer_ht_rates;
5830} __packed;
5831
5832struct wmi_peer_set_q_empty_callback_cmd {
5833
5834 __le32 vdev_id;
5835
5836 struct wmi_mac_addr peer_macaddr;
5837 __le32 callback_enable;
5838} __packed;
5839
5840struct wmi_peer_flags_map {
5841 u32 auth;
5842 u32 qos;
5843 u32 need_ptk_4_way;
5844 u32 need_gtk_2_way;
5845 u32 apsd;
5846 u32 ht;
5847 u32 bw40;
5848 u32 stbc;
5849 u32 ldbc;
5850 u32 dyn_mimops;
5851 u32 static_mimops;
5852 u32 spatial_mux;
5853 u32 vht;
5854 u32 bw80;
5855 u32 vht_2g;
5856 u32 pmf;
5857};
5858
5859enum wmi_peer_flags {
5860 WMI_PEER_AUTH = 0x00000001,
5861 WMI_PEER_QOS = 0x00000002,
5862 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
5863 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
5864 WMI_PEER_APSD = 0x00000800,
5865 WMI_PEER_HT = 0x00001000,
5866 WMI_PEER_40MHZ = 0x00002000,
5867 WMI_PEER_STBC = 0x00008000,
5868 WMI_PEER_LDPC = 0x00010000,
5869 WMI_PEER_DYN_MIMOPS = 0x00020000,
5870 WMI_PEER_STATIC_MIMOPS = 0x00040000,
5871 WMI_PEER_SPATIAL_MUX = 0x00200000,
5872 WMI_PEER_VHT = 0x02000000,
5873 WMI_PEER_80MHZ = 0x04000000,
5874 WMI_PEER_VHT_2G = 0x08000000,
5875 WMI_PEER_PMF = 0x10000000,
5876};
5877
5878enum wmi_10x_peer_flags {
5879 WMI_10X_PEER_AUTH = 0x00000001,
5880 WMI_10X_PEER_QOS = 0x00000002,
5881 WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
5882 WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
5883 WMI_10X_PEER_APSD = 0x00000800,
5884 WMI_10X_PEER_HT = 0x00001000,
5885 WMI_10X_PEER_40MHZ = 0x00002000,
5886 WMI_10X_PEER_STBC = 0x00008000,
5887 WMI_10X_PEER_LDPC = 0x00010000,
5888 WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
5889 WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
5890 WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
5891 WMI_10X_PEER_VHT = 0x02000000,
5892 WMI_10X_PEER_80MHZ = 0x04000000,
5893};
5894
5895enum wmi_10_2_peer_flags {
5896 WMI_10_2_PEER_AUTH = 0x00000001,
5897 WMI_10_2_PEER_QOS = 0x00000002,
5898 WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
5899 WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
5900 WMI_10_2_PEER_APSD = 0x00000800,
5901 WMI_10_2_PEER_HT = 0x00001000,
5902 WMI_10_2_PEER_40MHZ = 0x00002000,
5903 WMI_10_2_PEER_STBC = 0x00008000,
5904 WMI_10_2_PEER_LDPC = 0x00010000,
5905 WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
5906 WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
5907 WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
5908 WMI_10_2_PEER_VHT = 0x02000000,
5909 WMI_10_2_PEER_80MHZ = 0x04000000,
5910 WMI_10_2_PEER_VHT_2G = 0x08000000,
5911 WMI_10_2_PEER_PMF = 0x10000000,
5912};
5913
5914
5915
5916
5917
5918
5919
5920
5921#define WMI_RC_DS_FLAG 0x01
5922#define WMI_RC_CW40_FLAG 0x02
5923#define WMI_RC_SGI_FLAG 0x04
5924#define WMI_RC_HT_FLAG 0x08
5925#define WMI_RC_RTSCTS_FLAG 0x10
5926#define WMI_RC_TX_STBC_FLAG 0x20
5927#define WMI_RC_RX_STBC_FLAG 0xC0
5928#define WMI_RC_RX_STBC_FLAG_S 6
5929#define WMI_RC_WEP_TKIP_FLAG 0x100
5930#define WMI_RC_TS_FLAG 0x200
5931#define WMI_RC_UAPSD_FLAG 0x400
5932
5933
5934#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
5935
5936struct wmi_common_peer_assoc_complete_cmd {
5937 struct wmi_mac_addr peer_macaddr;
5938 __le32 vdev_id;
5939 __le32 peer_new_assoc;
5940 __le32 peer_associd;
5941 __le32 peer_flags;
5942 __le32 peer_caps;
5943 __le32 peer_listen_intval;
5944 __le32 peer_ht_caps;
5945 __le32 peer_max_mpdu;
5946 __le32 peer_mpdu_density;
5947 __le32 peer_rate_caps;
5948 struct wmi_rate_set peer_legacy_rates;
5949 struct wmi_rate_set peer_ht_rates;
5950 __le32 peer_nss;
5951 __le32 peer_vht_caps;
5952 __le32 peer_phymode;
5953 struct wmi_vht_rate_set peer_vht_rates;
5954};
5955
5956struct wmi_main_peer_assoc_complete_cmd {
5957 struct wmi_common_peer_assoc_complete_cmd cmd;
5958
5959
5960
5961 __le32 peer_ht_info[2];
5962} __packed;
5963
5964struct wmi_10_1_peer_assoc_complete_cmd {
5965 struct wmi_common_peer_assoc_complete_cmd cmd;
5966} __packed;
5967
5968#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
5969#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
5970#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
5971#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
5972
5973struct wmi_10_2_peer_assoc_complete_cmd {
5974 struct wmi_common_peer_assoc_complete_cmd cmd;
5975 __le32 info0;
5976} __packed;
5977
5978struct wmi_10_4_peer_assoc_complete_cmd {
5979 struct wmi_10_2_peer_assoc_complete_cmd cmd;
5980 __le32 peer_bw_rxnss_override;
5981} __packed;
5982
5983struct wmi_peer_assoc_complete_arg {
5984 u8 addr[ETH_ALEN];
5985 u32 vdev_id;
5986 bool peer_reassoc;
5987 u16 peer_aid;
5988 u32 peer_flags;
5989 u16 peer_caps;
5990 u32 peer_listen_intval;
5991 u32 peer_ht_caps;
5992 u32 peer_max_mpdu;
5993 u32 peer_mpdu_density;
5994 u32 peer_rate_caps;
5995 struct wmi_rate_set_arg peer_legacy_rates;
5996 struct wmi_rate_set_arg peer_ht_rates;
5997 u32 peer_num_spatial_streams;
5998 u32 peer_vht_caps;
5999 enum wmi_phy_mode peer_phymode;
6000 struct wmi_vht_rate_set_arg peer_vht_rates;
6001};
6002
6003struct wmi_peer_add_wds_entry_cmd {
6004
6005 struct wmi_mac_addr peer_macaddr;
6006
6007 struct wmi_mac_addr wds_macaddr;
6008} __packed;
6009
6010struct wmi_peer_remove_wds_entry_cmd {
6011
6012 struct wmi_mac_addr wds_macaddr;
6013} __packed;
6014
6015struct wmi_peer_q_empty_callback_event {
6016
6017 struct wmi_mac_addr peer_macaddr;
6018} __packed;
6019
6020
6021
6022
6023struct wmi_chan_info_event {
6024 __le32 err_code;
6025 __le32 freq;
6026 __le32 cmd_flags;
6027 __le32 noise_floor;
6028 __le32 rx_clear_count;
6029 __le32 cycle_count;
6030} __packed;
6031
6032struct wmi_10_4_chan_info_event {
6033 __le32 err_code;
6034 __le32 freq;
6035 __le32 cmd_flags;
6036 __le32 noise_floor;
6037 __le32 rx_clear_count;
6038 __le32 cycle_count;
6039 __le32 chan_tx_pwr_range;
6040 __le32 chan_tx_pwr_tp;
6041 __le32 rx_frame_count;
6042} __packed;
6043
6044struct wmi_peer_sta_kickout_event {
6045 struct wmi_mac_addr peer_macaddr;
6046} __packed;
6047
6048#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
6049#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
6050
6051
6052#define BCN_FLT_MAX_SUPPORTED_IES 256
6053#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
6054
6055struct bss_bcn_stats {
6056 __le32 vdev_id;
6057 __le32 bss_bcnsdropped;
6058 __le32 bss_bcnsdelivered;
6059} __packed;
6060
6061struct bcn_filter_stats {
6062 __le32 bcns_dropped;
6063 __le32 bcns_delivered;
6064 __le32 activefilters;
6065 struct bss_bcn_stats bss_stats;
6066} __packed;
6067
6068struct wmi_add_bcn_filter_cmd {
6069 u32 vdev_id;
6070 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
6071} __packed;
6072
6073enum wmi_sta_keepalive_method {
6074 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6075 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
6076};
6077
6078#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6079
6080
6081#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
6082
6083
6084struct wmi_sta_keepalive_arp_resp {
6085 __be32 src_ip4_addr;
6086 __be32 dest_ip4_addr;
6087 struct wmi_mac_addr dest_mac_addr;
6088} __packed;
6089
6090struct wmi_sta_keepalive_cmd {
6091 __le32 vdev_id;
6092 __le32 enabled;
6093 __le32 method;
6094 __le32 interval;
6095 struct wmi_sta_keepalive_arp_resp arp_resp;
6096} __packed;
6097
6098struct wmi_sta_keepalive_arg {
6099 u32 vdev_id;
6100 u32 enabled;
6101 u32 method;
6102 u32 interval;
6103 __be32 src_ip4_addr;
6104 __be32 dest_ip4_addr;
6105 const u8 dest_mac_addr[ETH_ALEN];
6106};
6107
6108enum wmi_force_fw_hang_type {
6109 WMI_FORCE_FW_HANG_ASSERT = 1,
6110 WMI_FORCE_FW_HANG_NO_DETECT,
6111 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
6112 WMI_FORCE_FW_HANG_EMPTY_POINT,
6113 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
6114 WMI_FORCE_FW_HANG_INFINITE_LOOP,
6115};
6116
6117#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
6118
6119struct wmi_force_fw_hang_cmd {
6120 __le32 type;
6121 __le32 delay_ms;
6122} __packed;
6123
6124enum ath10k_dbglog_level {
6125 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6126 ATH10K_DBGLOG_LEVEL_INFO = 1,
6127 ATH10K_DBGLOG_LEVEL_WARN = 2,
6128 ATH10K_DBGLOG_LEVEL_ERR = 3,
6129};
6130
6131
6132#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
6133#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
6134
6135
6136#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
6137#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
6138
6139
6140#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
6141#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
6142
6143
6144#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
6145#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
6146
6147
6148
6149
6150
6151#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
6152#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
6153
6154
6155
6156
6157
6158struct wmi_dbglog_cfg_cmd {
6159
6160 __le32 module_enable;
6161
6162
6163 __le32 config_enable;
6164
6165
6166 __le32 module_valid;
6167
6168
6169 __le32 config_valid;
6170} __packed;
6171
6172enum wmi_roam_reason {
6173 WMI_ROAM_REASON_BETTER_AP = 1,
6174 WMI_ROAM_REASON_BEACON_MISS = 2,
6175 WMI_ROAM_REASON_LOW_RSSI = 3,
6176 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6177 WMI_ROAM_REASON_HO_FAILED = 5,
6178
6179
6180 WMI_ROAM_REASON_MAX,
6181};
6182
6183struct wmi_roam_ev {
6184 __le32 vdev_id;
6185 __le32 reason;
6186} __packed;
6187
6188#define ATH10K_FRAGMT_THRESHOLD_MIN 540
6189#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
6190
6191#define WMI_MAX_EVENT 0x1000
6192
6193#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
6194
6195
6196#define ATH10K_DEFAULT_ATIM 0
6197
6198#define WMI_MAX_MEM_REQS 16
6199
6200struct wmi_scan_ev_arg {
6201 __le32 event_type;
6202 __le32 reason;
6203 __le32 channel_freq;
6204 __le32 scan_req_id;
6205 __le32 scan_id;
6206 __le32 vdev_id;
6207};
6208
6209struct wmi_mgmt_rx_ev_arg {
6210 __le32 channel;
6211 __le32 snr;
6212 __le32 rate;
6213 __le32 phy_mode;
6214 __le32 buf_len;
6215 __le32 status;
6216 struct wmi_mgmt_rx_ext_info ext_info;
6217};
6218
6219struct wmi_ch_info_ev_arg {
6220 __le32 err_code;
6221 __le32 freq;
6222 __le32 cmd_flags;
6223 __le32 noise_floor;
6224 __le32 rx_clear_count;
6225 __le32 cycle_count;
6226 __le32 chan_tx_pwr_range;
6227 __le32 chan_tx_pwr_tp;
6228 __le32 rx_frame_count;
6229};
6230
6231struct wmi_vdev_start_ev_arg {
6232 __le32 vdev_id;
6233 __le32 req_id;
6234 __le32 resp_type;
6235 __le32 status;
6236};
6237
6238struct wmi_peer_kick_ev_arg {
6239 const u8 *mac_addr;
6240};
6241
6242struct wmi_swba_ev_arg {
6243 __le32 vdev_map;
6244 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
6245 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
6246};
6247
6248struct wmi_phyerr_ev_arg {
6249 u32 tsf_timestamp;
6250 u16 freq1;
6251 u16 freq2;
6252 u8 rssi_combined;
6253 u8 chan_width_mhz;
6254 u8 phy_err_code;
6255 u16 nf_chains[4];
6256 u32 buf_len;
6257 const u8 *buf;
6258 u8 hdr_len;
6259};
6260
6261struct wmi_phyerr_hdr_arg {
6262 u32 num_phyerrs;
6263 u32 tsf_l32;
6264 u32 tsf_u32;
6265 u32 buf_len;
6266 const void *phyerrs;
6267};
6268
6269struct wmi_svc_rdy_ev_arg {
6270 __le32 min_tx_power;
6271 __le32 max_tx_power;
6272 __le32 ht_cap;
6273 __le32 vht_cap;
6274 __le32 sw_ver0;
6275 __le32 sw_ver1;
6276 __le32 fw_build;
6277 __le32 phy_capab;
6278 __le32 num_rf_chains;
6279 __le32 eeprom_rd;
6280 __le32 num_mem_reqs;
6281 const __le32 *service_map;
6282 size_t service_map_len;
6283 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6284};
6285
6286struct wmi_rdy_ev_arg {
6287 __le32 sw_version;
6288 __le32 abi_version;
6289 __le32 status;
6290 const u8 *mac_addr;
6291};
6292
6293struct wmi_roam_ev_arg {
6294 __le32 vdev_id;
6295 __le32 reason;
6296 __le32 rssi;
6297};
6298
6299struct wmi_pdev_temperature_event {
6300
6301 __le32 temperature;
6302} __packed;
6303
6304struct wmi_pdev_bss_chan_info_event {
6305 __le32 freq;
6306 __le32 noise_floor;
6307 __le64 cycle_busy;
6308 __le64 cycle_total;
6309 __le64 cycle_tx;
6310 __le64 cycle_rx;
6311 __le64 cycle_rx_bss;
6312 __le32 reserved;
6313} __packed;
6314
6315
6316enum wmi_wow_wakeup_event {
6317 WOW_BMISS_EVENT = 0,
6318 WOW_BETTER_AP_EVENT,
6319 WOW_DEAUTH_RECVD_EVENT,
6320 WOW_MAGIC_PKT_RECVD_EVENT,
6321 WOW_GTK_ERR_EVENT,
6322 WOW_FOURWAY_HSHAKE_EVENT,
6323 WOW_EAPOL_RECVD_EVENT,
6324 WOW_NLO_DETECTED_EVENT,
6325 WOW_DISASSOC_RECVD_EVENT,
6326 WOW_PATTERN_MATCH_EVENT,
6327 WOW_CSA_IE_EVENT,
6328 WOW_PROBE_REQ_WPS_IE_EVENT,
6329 WOW_AUTH_REQ_EVENT,
6330 WOW_ASSOC_REQ_EVENT,
6331 WOW_HTT_EVENT,
6332 WOW_RA_MATCH_EVENT,
6333 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6334 WOW_IOAC_MAGIC_EVENT,
6335 WOW_IOAC_SHORT_EVENT,
6336 WOW_IOAC_EXTEND_EVENT,
6337 WOW_IOAC_TIMER_EVENT,
6338 WOW_DFS_PHYERR_RADAR_EVENT,
6339 WOW_BEACON_EVENT,
6340 WOW_CLIENT_KICKOUT_EVENT,
6341 WOW_EVENT_MAX,
6342};
6343
6344#define C2S(x) case x: return #x
6345
6346static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6347{
6348 switch (ev) {
6349 C2S(WOW_BMISS_EVENT);
6350 C2S(WOW_BETTER_AP_EVENT);
6351 C2S(WOW_DEAUTH_RECVD_EVENT);
6352 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6353 C2S(WOW_GTK_ERR_EVENT);
6354 C2S(WOW_FOURWAY_HSHAKE_EVENT);
6355 C2S(WOW_EAPOL_RECVD_EVENT);
6356 C2S(WOW_NLO_DETECTED_EVENT);
6357 C2S(WOW_DISASSOC_RECVD_EVENT);
6358 C2S(WOW_PATTERN_MATCH_EVENT);
6359 C2S(WOW_CSA_IE_EVENT);
6360 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6361 C2S(WOW_AUTH_REQ_EVENT);
6362 C2S(WOW_ASSOC_REQ_EVENT);
6363 C2S(WOW_HTT_EVENT);
6364 C2S(WOW_RA_MATCH_EVENT);
6365 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6366 C2S(WOW_IOAC_MAGIC_EVENT);
6367 C2S(WOW_IOAC_SHORT_EVENT);
6368 C2S(WOW_IOAC_EXTEND_EVENT);
6369 C2S(WOW_IOAC_TIMER_EVENT);
6370 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6371 C2S(WOW_BEACON_EVENT);
6372 C2S(WOW_CLIENT_KICKOUT_EVENT);
6373 C2S(WOW_EVENT_MAX);
6374 default:
6375 return NULL;
6376 }
6377}
6378
6379enum wmi_wow_wake_reason {
6380 WOW_REASON_UNSPECIFIED = -1,
6381 WOW_REASON_NLOD = 0,
6382 WOW_REASON_AP_ASSOC_LOST,
6383 WOW_REASON_LOW_RSSI,
6384 WOW_REASON_DEAUTH_RECVD,
6385 WOW_REASON_DISASSOC_RECVD,
6386 WOW_REASON_GTK_HS_ERR,
6387 WOW_REASON_EAP_REQ,
6388 WOW_REASON_FOURWAY_HS_RECV,
6389 WOW_REASON_TIMER_INTR_RECV,
6390 WOW_REASON_PATTERN_MATCH_FOUND,
6391 WOW_REASON_RECV_MAGIC_PATTERN,
6392 WOW_REASON_P2P_DISC,
6393 WOW_REASON_WLAN_HB,
6394 WOW_REASON_CSA_EVENT,
6395 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
6396 WOW_REASON_AUTH_REQ_RECV,
6397 WOW_REASON_ASSOC_REQ_RECV,
6398 WOW_REASON_HTT_EVENT,
6399 WOW_REASON_RA_MATCH,
6400 WOW_REASON_HOST_AUTO_SHUTDOWN,
6401 WOW_REASON_IOAC_MAGIC_EVENT,
6402 WOW_REASON_IOAC_SHORT_EVENT,
6403 WOW_REASON_IOAC_EXTEND_EVENT,
6404 WOW_REASON_IOAC_TIMER_EVENT,
6405 WOW_REASON_ROAM_HO,
6406 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
6407 WOW_REASON_BEACON_RECV,
6408 WOW_REASON_CLIENT_KICKOUT_EVENT,
6409 WOW_REASON_DEBUG_TEST = 0xFF,
6410};
6411
6412static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
6413{
6414 switch (reason) {
6415 C2S(WOW_REASON_UNSPECIFIED);
6416 C2S(WOW_REASON_NLOD);
6417 C2S(WOW_REASON_AP_ASSOC_LOST);
6418 C2S(WOW_REASON_LOW_RSSI);
6419 C2S(WOW_REASON_DEAUTH_RECVD);
6420 C2S(WOW_REASON_DISASSOC_RECVD);
6421 C2S(WOW_REASON_GTK_HS_ERR);
6422 C2S(WOW_REASON_EAP_REQ);
6423 C2S(WOW_REASON_FOURWAY_HS_RECV);
6424 C2S(WOW_REASON_TIMER_INTR_RECV);
6425 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
6426 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
6427 C2S(WOW_REASON_P2P_DISC);
6428 C2S(WOW_REASON_WLAN_HB);
6429 C2S(WOW_REASON_CSA_EVENT);
6430 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
6431 C2S(WOW_REASON_AUTH_REQ_RECV);
6432 C2S(WOW_REASON_ASSOC_REQ_RECV);
6433 C2S(WOW_REASON_HTT_EVENT);
6434 C2S(WOW_REASON_RA_MATCH);
6435 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
6436 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
6437 C2S(WOW_REASON_IOAC_SHORT_EVENT);
6438 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
6439 C2S(WOW_REASON_IOAC_TIMER_EVENT);
6440 C2S(WOW_REASON_ROAM_HO);
6441 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
6442 C2S(WOW_REASON_BEACON_RECV);
6443 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
6444 C2S(WOW_REASON_DEBUG_TEST);
6445 default:
6446 return NULL;
6447 }
6448}
6449
6450#undef C2S
6451
6452struct wmi_wow_ev_arg {
6453 u32 vdev_id;
6454 u32 flag;
6455 enum wmi_wow_wake_reason wake_reason;
6456 u32 data_len;
6457};
6458
6459#define WOW_MIN_PATTERN_SIZE 1
6460#define WOW_MAX_PATTERN_SIZE 148
6461#define WOW_MAX_PKT_OFFSET 128
6462
6463enum wmi_tdls_state {
6464 WMI_TDLS_DISABLE,
6465 WMI_TDLS_ENABLE_PASSIVE,
6466 WMI_TDLS_ENABLE_ACTIVE,
6467};
6468
6469enum wmi_tdls_peer_state {
6470 WMI_TDLS_PEER_STATE_PEERING,
6471 WMI_TDLS_PEER_STATE_CONNECTED,
6472 WMI_TDLS_PEER_STATE_TEARDOWN,
6473};
6474
6475struct wmi_tdls_peer_update_cmd_arg {
6476 u32 vdev_id;
6477 enum wmi_tdls_peer_state peer_state;
6478 u8 addr[ETH_ALEN];
6479};
6480
6481#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
6482
6483struct wmi_tdls_peer_capab_arg {
6484 u8 peer_uapsd_queues;
6485 u8 peer_max_sp;
6486 u32 buff_sta_support;
6487 u32 off_chan_support;
6488 u32 peer_curr_operclass;
6489 u32 self_curr_operclass;
6490 u32 peer_chan_len;
6491 u32 peer_operclass_len;
6492 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
6493 u32 is_peer_responder;
6494 u32 pref_offchan_num;
6495 u32 pref_offchan_bw;
6496};
6497
6498enum wmi_txbf_conf {
6499 WMI_TXBF_CONF_UNSUPPORTED,
6500 WMI_TXBF_CONF_BEFORE_ASSOC,
6501 WMI_TXBF_CONF_AFTER_ASSOC,
6502};
6503
6504#define WMI_CCA_DETECT_LEVEL_AUTO 0
6505#define WMI_CCA_DETECT_MARGIN_AUTO 0
6506
6507struct wmi_pdev_set_adaptive_cca_params {
6508 __le32 enable;
6509 __le32 cca_detect_level;
6510 __le32 cca_detect_margin;
6511} __packed;
6512
6513enum wmi_host_platform_type {
6514 WMI_HOST_PLATFORM_HIGH_PERF,
6515 WMI_HOST_PLATFORM_LOW_PERF,
6516};
6517
6518enum wmi_bss_survey_req_type {
6519 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
6520 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
6521};
6522
6523struct wmi_pdev_chan_info_req_cmd {
6524 __le32 type;
6525 __le32 reserved;
6526} __packed;
6527
6528struct ath10k;
6529struct ath10k_vif;
6530struct ath10k_fw_stats_pdev;
6531struct ath10k_fw_stats_peer;
6532struct ath10k_fw_stats;
6533
6534int ath10k_wmi_attach(struct ath10k *ar);
6535void ath10k_wmi_detach(struct ath10k *ar);
6536void ath10k_wmi_free_host_mem(struct ath10k *ar);
6537int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
6538int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
6539
6540struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
6541int ath10k_wmi_connect(struct ath10k *ar);
6542
6543struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
6544int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
6545int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
6546 u32 cmd_id);
6547void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *);
6548
6549void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
6550 struct ath10k_fw_stats_pdev *dst);
6551void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
6552 struct ath10k_fw_stats_pdev *dst);
6553void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
6554 struct ath10k_fw_stats_pdev *dst);
6555void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
6556 struct ath10k_fw_stats_pdev *dst);
6557void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
6558 struct ath10k_fw_stats_peer *dst);
6559void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6560 struct wmi_host_mem_chunks *chunks);
6561void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6562 const struct wmi_start_scan_arg *arg);
6563void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
6564 const struct wmi_wmm_params_arg *arg);
6565void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
6566 const struct wmi_channel_arg *arg);
6567int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
6568
6569int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
6570int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
6571void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
6572void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
6573int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
6574void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
6575void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
6576void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
6577void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
6578void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
6579void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
6580void ath10k_wmi_event_dfs(struct ath10k *ar,
6581 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
6582void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
6583 struct wmi_phyerr_ev_arg *phyerr,
6584 u64 tsf);
6585void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
6586void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
6587void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
6588void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
6589void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
6590void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
6591void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
6592 struct sk_buff *skb);
6593void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
6594 struct sk_buff *skb);
6595void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
6596void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
6597void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
6598void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
6599void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
6600void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
6601 struct sk_buff *skb);
6602void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
6603void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
6604void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
6605void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
6606 struct sk_buff *skb);
6607void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
6608void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
6609void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
6610void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
6611int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
6612int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
6613 int left_len, struct wmi_phyerr_ev_arg *arg);
6614void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
6615 struct ath10k_fw_stats *fw_stats,
6616 char *buf);
6617void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
6618 struct ath10k_fw_stats *fw_stats,
6619 char *buf);
6620size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
6621size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
6622void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
6623 struct ath10k_fw_stats *fw_stats,
6624 char *buf);
6625int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
6626 enum wmi_vdev_subtype subtype);
6627
6628#endif
6629