1
2
3
4
5
6
7
8
9
10
11
12#ifndef _HISI_SAS_H_
13#define _HISI_SAS_H_
14
15#include <linux/acpi.h>
16#include <linux/dmapool.h>
17#include <linux/mfd/syscon.h>
18#include <linux/module.h>
19#include <linux/of_address.h>
20#include <linux/platform_device.h>
21#include <linux/property.h>
22#include <linux/regmap.h>
23#include <scsi/sas_ata.h>
24#include <scsi/libsas.h>
25
26#define DRV_VERSION "v1.5"
27
28#define HISI_SAS_MAX_PHYS 9
29#define HISI_SAS_MAX_QUEUES 32
30#define HISI_SAS_QUEUE_SLOTS 512
31#define HISI_SAS_MAX_ITCT_ENTRIES 2048
32#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
33
34#define HISI_SAS_STATUS_BUF_SZ \
35 (sizeof(struct hisi_sas_err_record) + 1024)
36#define HISI_SAS_COMMAND_TABLE_SZ \
37 (((sizeof(union hisi_sas_command_table)+3)/4)*4)
38
39#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
40#define HISI_SAS_MAX_SMP_RESP_SZ 1028
41#define HISI_SAS_MAX_STP_RESP_SZ 28
42
43#define DEV_IS_EXPANDER(type) \
44 ((type == SAS_EDGE_EXPANDER_DEVICE) || \
45 (type == SAS_FANOUT_EXPANDER_DEVICE))
46
47struct hisi_hba;
48
49enum {
50 PORT_TYPE_SAS = (1U << 1),
51 PORT_TYPE_SATA = (1U << 0),
52};
53
54enum dev_status {
55 HISI_SAS_DEV_NORMAL,
56 HISI_SAS_DEV_EH,
57};
58
59enum hisi_sas_dev_type {
60 HISI_SAS_DEV_TYPE_STP = 0,
61 HISI_SAS_DEV_TYPE_SSP,
62 HISI_SAS_DEV_TYPE_SATA,
63};
64
65struct hisi_sas_phy {
66 struct hisi_hba *hisi_hba;
67 struct hisi_sas_port *port;
68 struct asd_sas_phy sas_phy;
69 struct sas_identify identify;
70 struct timer_list timer;
71 struct work_struct phyup_ws;
72 u64 port_id;
73 u64 dev_sas_addr;
74 u64 phy_type;
75 u64 frame_rcvd_size;
76 u8 frame_rcvd[32];
77 u8 phy_attached;
78 u8 reserved[3];
79 enum sas_linkrate minimum_linkrate;
80 enum sas_linkrate maximum_linkrate;
81};
82
83struct hisi_sas_port {
84 struct asd_sas_port sas_port;
85 u8 port_attached;
86 u8 id;
87 struct list_head list;
88};
89
90struct hisi_sas_cq {
91 struct hisi_hba *hisi_hba;
92 int id;
93};
94
95struct hisi_sas_device {
96 enum sas_device_type dev_type;
97 struct hisi_hba *hisi_hba;
98 struct domain_device *sas_device;
99 u64 attached_phy;
100 u64 device_id;
101 u64 running_req;
102 u8 dev_status;
103};
104
105struct hisi_sas_slot {
106 struct list_head entry;
107 struct sas_task *task;
108 struct hisi_sas_port *port;
109 u64 n_elem;
110 int dlvry_queue;
111 int dlvry_queue_slot;
112 int cmplt_queue;
113 int cmplt_queue_slot;
114 int idx;
115 int abort;
116 void *cmd_hdr;
117 dma_addr_t cmd_hdr_dma;
118 void *status_buffer;
119 dma_addr_t status_buffer_dma;
120 void *command_table;
121 dma_addr_t command_table_dma;
122 struct hisi_sas_sge_page *sge_page;
123 dma_addr_t sge_page_dma;
124 struct work_struct abort_slot;
125};
126
127struct hisi_sas_tmf_task {
128 u8 tmf;
129 u16 tag_of_task_to_be_managed;
130};
131
132struct hisi_sas_hw {
133 int (*hw_init)(struct hisi_hba *hisi_hba);
134 void (*setup_itct)(struct hisi_hba *hisi_hba,
135 struct hisi_sas_device *device);
136 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
137 struct domain_device *device);
138 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
139 void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
140 int (*get_free_slot)(struct hisi_hba *hisi_hba, int *q, int *s);
141 void (*start_delivery)(struct hisi_hba *hisi_hba);
142 int (*prep_ssp)(struct hisi_hba *hisi_hba,
143 struct hisi_sas_slot *slot, int is_tmf,
144 struct hisi_sas_tmf_task *tmf);
145 int (*prep_smp)(struct hisi_hba *hisi_hba,
146 struct hisi_sas_slot *slot);
147 int (*prep_stp)(struct hisi_hba *hisi_hba,
148 struct hisi_sas_slot *slot);
149 int (*slot_complete)(struct hisi_hba *hisi_hba,
150 struct hisi_sas_slot *slot, int abort);
151 void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
152 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
153 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
154 void (*free_device)(struct hisi_hba *hisi_hba,
155 struct hisi_sas_device *dev);
156 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
157 int max_command_entries;
158 int complete_hdr_size;
159};
160
161struct hisi_hba {
162
163 struct sas_ha_struct *p;
164
165 struct platform_device *pdev;
166 void __iomem *regs;
167 struct regmap *ctrl;
168 u32 ctrl_reset_reg;
169 u32 ctrl_reset_sts_reg;
170 u32 ctrl_clock_ena_reg;
171 u8 sas_addr[SAS_ADDR_SIZE];
172
173 int n_phy;
174 int scan_finished;
175 spinlock_t lock;
176
177 struct timer_list timer;
178 struct workqueue_struct *wq;
179
180 int slot_index_count;
181 unsigned long *slot_index_tags;
182
183
184 struct sas_ha_struct sha;
185 struct Scsi_Host *shost;
186
187 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
188 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
189 struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
190
191 int queue_count;
192 int queue;
193 struct hisi_sas_slot *slot_prep;
194
195 struct dma_pool *sge_page_pool;
196 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
197 struct dma_pool *command_table_pool;
198 struct dma_pool *status_buffer_pool;
199 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
200 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
201 void *complete_hdr[HISI_SAS_MAX_QUEUES];
202 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
203 struct hisi_sas_initial_fis *initial_fis;
204 dma_addr_t initial_fis_dma;
205 struct hisi_sas_itct *itct;
206 dma_addr_t itct_dma;
207 struct hisi_sas_iost *iost;
208 dma_addr_t iost_dma;
209 struct hisi_sas_breakpoint *breakpoint;
210 dma_addr_t breakpoint_dma;
211 struct hisi_sas_breakpoint *sata_breakpoint;
212 dma_addr_t sata_breakpoint_dma;
213 struct hisi_sas_slot *slot_info;
214 const struct hisi_sas_hw *hw;
215};
216
217
218
219struct hisi_sas_cmd_hdr {
220
221 __le32 dw0;
222
223
224 __le32 dw1;
225
226
227 __le32 dw2;
228
229
230 __le32 transfer_tags;
231
232
233 __le32 data_transfer_len;
234
235
236 __le32 first_burst_num;
237
238
239 __le32 sg_len;
240
241
242 __le32 dw7;
243
244
245 __le64 cmd_table_addr;
246
247
248 __le64 sts_buffer_addr;
249
250
251 __le64 prd_table_addr;
252
253
254 __le64 dif_prd_table_addr;
255};
256
257struct hisi_sas_itct {
258 __le64 qw0;
259 __le64 sas_addr;
260 __le64 qw2;
261 __le64 qw3;
262 __le64 qw4_15[12];
263};
264
265struct hisi_sas_iost {
266 __le64 qw0;
267 __le64 qw1;
268 __le64 qw2;
269 __le64 qw3;
270};
271
272struct hisi_sas_err_record {
273 u32 data[4];
274};
275
276struct hisi_sas_initial_fis {
277 struct hisi_sas_err_record err_record;
278 struct dev_to_host_fis fis;
279 u32 rsvd[3];
280};
281
282struct hisi_sas_breakpoint {
283 u8 data[128];
284};
285
286struct hisi_sas_sge {
287 __le64 addr;
288 __le32 page_ctrl_0;
289 __le32 page_ctrl_1;
290 __le32 data_len;
291 __le32 data_off;
292};
293
294struct hisi_sas_command_table_smp {
295 u8 bytes[44];
296};
297
298struct hisi_sas_command_table_stp {
299 struct host_to_dev_fis command_fis;
300 u8 dummy[12];
301 u8 atapi_cdb[ATAPI_CDB_LEN];
302};
303
304#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
305struct hisi_sas_sge_page {
306 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
307};
308
309struct hisi_sas_command_table_ssp {
310 struct ssp_frame_hdr hdr;
311 union {
312 struct {
313 struct ssp_command_iu task;
314 u32 prot[6];
315 };
316 struct ssp_tmf_iu ssp_task;
317 struct xfer_rdy_iu xfer_rdy;
318 struct ssp_response_iu ssp_res;
319 } u;
320};
321
322union hisi_sas_command_table {
323 struct hisi_sas_command_table_ssp ssp;
324 struct hisi_sas_command_table_smp smp;
325 struct hisi_sas_command_table_stp stp;
326};
327extern int hisi_sas_probe(struct platform_device *pdev,
328 const struct hisi_sas_hw *ops);
329extern int hisi_sas_remove(struct platform_device *pdev);
330
331extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
332extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
333 struct sas_task *task,
334 struct hisi_sas_slot *slot);
335#endif
336
