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60#ifndef MPI2_INIT_H
61#define MPI2_INIT_H
62
63
64
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70
71
72
73typedef struct _MPI2_SCSI_IO_CDB_EEDP32 {
74 U8 CDB[20];
75 U32 PrimaryReferenceTag;
76 U16 PrimaryApplicationTag;
77 U16 PrimaryApplicationTagMask;
78 U32 TransferLength;
79} MPI2_SCSI_IO_CDB_EEDP32, *PTR_MPI2_SCSI_IO_CDB_EEDP32,
80 Mpi2ScsiIoCdbEedp32_t, *pMpi2ScsiIoCdbEedp32_t;
81
82
83typedef union _MPI2_SCSI_IO_CDB_UNION {
84 U8 CDB32[32];
85 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
86 MPI2_SGE_SIMPLE_UNION SGE;
87} MPI2_SCSI_IO_CDB_UNION, *PTR_MPI2_SCSI_IO_CDB_UNION,
88 Mpi2ScsiIoCdb_t, *pMpi2ScsiIoCdb_t;
89
90
91typedef struct _MPI2_SCSI_IO_REQUEST {
92 U16 DevHandle;
93 U8 ChainOffset;
94 U8 Function;
95 U16 Reserved1;
96 U8 Reserved2;
97 U8 MsgFlags;
98 U8 VP_ID;
99 U8 VF_ID;
100 U16 Reserved3;
101 U32 SenseBufferLowAddress;
102 U16 SGLFlags;
103 U8 SenseBufferLength;
104 U8 Reserved4;
105 U8 SGLOffset0;
106 U8 SGLOffset1;
107 U8 SGLOffset2;
108 U8 SGLOffset3;
109 U32 SkipCount;
110 U32 DataLength;
111 U32 BidirectionalDataLength;
112 U16 IoFlags;
113 U16 EEDPFlags;
114 U32 EEDPBlockSize;
115 U32 SecondaryReferenceTag;
116 U16 SecondaryApplicationTag;
117 U16 ApplicationTagTranslationMask;
118 U8 LUN[8];
119 U32 Control;
120 MPI2_SCSI_IO_CDB_UNION CDB;
121
122#ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION
123 MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
124#endif
125
126 MPI2_SGE_IO_UNION SGL;
127
128} MPI2_SCSI_IO_REQUEST, *PTR_MPI2_SCSI_IO_REQUEST,
129 Mpi2SCSIIORequest_t, *pMpi2SCSIIORequest_t;
130
131
132
133
134#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
135#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
136#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
137#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
138#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
139#define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR (0x08)
140
141
142
143
144#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
145#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
146#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
147#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
148#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
149
150
151#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
152#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
153#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
154#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
155
156
157#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
158#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
159#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
160#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
161
162
163#define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
164
165
166
167
168#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
169#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
170#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
171#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
172#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
173
174#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
175#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
176#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
177#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
178#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
179
180
181
182#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
183#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
184#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
185#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
186
187#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
188#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
189#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
190
191#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
192
193#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
194#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
195#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
196#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
197#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
198#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
199#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
200#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
201
202
203
204
205#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
206#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
207
208#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
209#define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
210#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
211#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
212#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
213#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
214
215#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
216#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
217
218#define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800)
219#define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11)
220
221#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
222#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
223#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
224#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
225#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
226
227#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
228#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
229#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
230#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
231
232
233typedef union _MPI25_SCSI_IO_CDB_UNION {
234 U8 CDB32[32];
235 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
236 MPI2_IEEE_SGE_SIMPLE64 SGE;
237} MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION,
238 Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t;
239
240
241typedef struct _MPI25_SCSI_IO_REQUEST {
242 U16 DevHandle;
243 U8 ChainOffset;
244 U8 Function;
245 U16 Reserved1;
246 U8 Reserved2;
247 U8 MsgFlags;
248 U8 VP_ID;
249 U8 VF_ID;
250 U16 Reserved3;
251 U32 SenseBufferLowAddress;
252 U8 DMAFlags;
253 U8 Reserved5;
254 U8 SenseBufferLength;
255 U8 Reserved4;
256 U8 SGLOffset0;
257 U8 SGLOffset1;
258 U8 SGLOffset2;
259 U8 SGLOffset3;
260 U32 SkipCount;
261 U32 DataLength;
262 U32 BidirectionalDataLength;
263 U16 IoFlags;
264 U16 EEDPFlags;
265 U16 EEDPBlockSize;
266 U16 Reserved6;
267 U32 SecondaryReferenceTag;
268 U16 SecondaryApplicationTag;
269 U16 ApplicationTagTranslationMask;
270 U8 LUN[8];
271 U32 Control;
272 MPI25_SCSI_IO_CDB_UNION CDB;
273
274#ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION
275 MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion;
276#endif
277
278 MPI25_SGE_IO_UNION SGL;
279
280} MPI25_SCSI_IO_REQUEST, *PTR_MPI25_SCSI_IO_REQUEST,
281 Mpi25SCSIIORequest_t, *pMpi25SCSIIORequest_t;
282
283
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289
290
291
292#define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F)
293#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00)
294#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01)
295#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02)
296#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03)
297#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04)
298#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05)
299#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06)
300#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07)
301#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08)
302#define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09)
303#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A)
304#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B)
305#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C)
306#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D)
307#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E)
308#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F)
309
310
311#define MPI25_SCSIIO_NUM_SGLOFFSETS (4)
312
313
314#define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
315#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
316#define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
317
318#define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000)
319#define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
320#define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
321#define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST (0x0400)
322#define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
323
324
325
326#define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
327#define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
328#define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
329#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
330#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
331
332#define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
333#define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
334#define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
335
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340
341
342
343
344
345typedef struct _MPI2_SCSI_IO_REPLY {
346 U16 DevHandle;
347 U8 MsgLength;
348 U8 Function;
349 U16 Reserved1;
350 U8 Reserved2;
351 U8 MsgFlags;
352 U8 VP_ID;
353 U8 VF_ID;
354 U16 Reserved3;
355 U8 SCSIStatus;
356 U8 SCSIState;
357 U16 IOCStatus;
358 U32 IOCLogInfo;
359 U32 TransferCount;
360 U32 SenseCount;
361 U32 ResponseInfo;
362 U16 TaskTag;
363 U16 SCSIStatusQualifier;
364 U32 BidirectionalTransferCount;
365
366 U32 EEDPErrorOffset;
367
368 U16 EEDPObservedAppTag;
369
370 U16 EEDPObservedGuard;
371
372 U32 EEDPObservedRefTag;
373} MPI2_SCSI_IO_REPLY, *PTR_MPI2_SCSI_IO_REPLY,
374 Mpi2SCSIIOReply_t, *pMpi2SCSIIOReply_t;
375
376
377
378#define MPI2_SCSI_STATUS_GOOD (0x00)
379#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
380#define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
381#define MPI2_SCSI_STATUS_BUSY (0x08)
382#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
383#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
384#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
385#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22)
386#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
387#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
388#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
389
390
391
392#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
393#define MPI2_SCSI_STATE_TERMINATED (0x08)
394#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
395#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
396#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
397
398
399
400#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
401#define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
402
403#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
404
405
406
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408
409
410typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST {
411 U16 DevHandle;
412 U8 ChainOffset;
413 U8 Function;
414 U8 Reserved1;
415 U8 TaskType;
416 U8 Reserved2;
417 U8 MsgFlags;
418 U8 VP_ID;
419 U8 VF_ID;
420 U16 Reserved3;
421 U8 LUN[8];
422 U32 Reserved4[7];
423 U16 TaskMID;
424 U16 Reserved5;
425} MPI2_SCSI_TASK_MANAGE_REQUEST,
426 *PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
427 Mpi2SCSITaskManagementRequest_t,
428 *pMpi2SCSITaskManagementRequest_t;
429
430
431
432#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
433#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
434#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
435#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
436#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
437#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
438#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
439#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
440#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
441
442
443#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \
444 (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
445
446
447
448#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
449#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
450#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
451#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
452
453#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
454
455
456typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY {
457 U16 DevHandle;
458 U8 MsgLength;
459 U8 Function;
460 U8 ResponseCode;
461 U8 TaskType;
462 U8 Reserved1;
463 U8 MsgFlags;
464 U8 VP_ID;
465 U8 VF_ID;
466 U16 Reserved2;
467 U16 Reserved3;
468 U16 IOCStatus;
469 U32 IOCLogInfo;
470 U32 TerminationCount;
471 U32 ResponseInfo;
472} MPI2_SCSI_TASK_MANAGE_REPLY,
473 *PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
474 Mpi2SCSITaskManagementReply_t, *pMpi2SCSIManagementReply_t;
475
476
477
478#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
479#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
480#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
481#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
482#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
483#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
484#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
485#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
486
487
488
489#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
490#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
491#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
492#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
493#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
494#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
495#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
496#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
497
498
499
500
501
502
503typedef struct _MPI2_SEP_REQUEST {
504 U16 DevHandle;
505 U8 ChainOffset;
506 U8 Function;
507 U8 Action;
508 U8 Flags;
509 U8 Reserved1;
510 U8 MsgFlags;
511 U8 VP_ID;
512 U8 VF_ID;
513 U16 Reserved2;
514 U32 SlotStatus;
515 U32 Reserved3;
516 U32 Reserved4;
517 U32 Reserved5;
518 U16 Slot;
519 U16 EnclosureHandle;
520} MPI2_SEP_REQUEST, *PTR_MPI2_SEP_REQUEST,
521 Mpi2SepRequest_t, *pMpi2SepRequest_t;
522
523
524#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
525#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
526
527
528#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
529#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
530
531
532#define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF (0x00080000)
533#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
534#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
535#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
536#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
537#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
538#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
539#define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
540#define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
541#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
542#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
543#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
544
545
546typedef struct _MPI2_SEP_REPLY {
547 U16 DevHandle;
548 U8 MsgLength;
549 U8 Function;
550 U8 Action;
551 U8 Flags;
552 U8 Reserved1;
553 U8 MsgFlags;
554 U8 VP_ID;
555 U8 VF_ID;
556 U16 Reserved2;
557 U16 Reserved3;
558 U16 IOCStatus;
559 U32 IOCLogInfo;
560 U32 SlotStatus;
561 U32 Reserved4;
562 U16 Slot;
563 U16 EnclosureHandle;
564} MPI2_SEP_REPLY, *PTR_MPI2_SEP_REPLY,
565 Mpi2SepReply_t, *pMpi2SepReply_t;
566
567
568#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x00080000)
569#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
570#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
571#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
572#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
573#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
574#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
575#define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
576#define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
577#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
578#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
579#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
580
581#endif
582