/*
 * Universal Flash Storage Host controller driver Core
 *
 * This code is based on drivers/scsi/ufs/ufshcd.c
 * Copyright (C) 2011-2013 Samsung India Software Operations
 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
 *
 * Authors:
 *      Santosh Yaraganavi <santosh.sy@samsung.com>
 *      Vinayak Holikatti <h.vinayak@samsung.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * See the COPYING file in the top-level directory or visit
 * <http://www.gnu.org/licenses/gpl-2.0.html>
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * This program is provided "AS IS" and "WITH ALL FAULTS" and
 * without warranty of any kind. You are solely responsible for
 * determining the appropriateness of using and distributing
 * the program and assume all risks associated with your exercise
 * of rights with respect to the program, including but not limited
 * to infringement of third party rights, the risks and costs of
 * program errors, damage to or loss of data, programs or equipment,
 * and unavailability or interruption of operations. Under no
 * circumstances will the contributor of this Program be liable for
 * any damages of any kind arising from your use or distribution of
 * this program.
 *
 * The Linux Foundation chooses to take subject only to the GPLv2
 * license terms, and distributes only under these terms.
 */

#include <linux/async.h>
#include <linux/devfreq.h>
#include <linux/nls.h>
#include <linux/of.h>
#include "ufshcd.h"
#include "ufs_quirks.h"
#include "unipro.h"

#define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
                                 UTP_TASK_REQ_COMPL |\
                                 UFSHCD_ERROR_MASK)
/* UIC command timeout, unit: ms */
#define UIC_CMD_TIMEOUT 500

/* NOP OUT retries waiting for NOP IN response */
#define NOP_OUT_RETRIES    10
/* Timeout after 30 msecs if NOP OUT hangs without response */
#define NOP_OUT_TIMEOUT    30 /* msecs */

/* Query request retries */
#define QUERY_REQ_RETRIES 10
/* Query request timeout */
#define QUERY_REQ_TIMEOUT 30 /* msec */
/*
 * Query request timeout for fDeviceInit flag
 * fDeviceInit query response time for some devices is too large that default
 * QUERY_REQ_TIMEOUT may not be enough for such devices.
 */
#define QUERY_FDEVICEINIT_REQ_TIMEOUT 600 /* msec */

/* Task management command timeout */
#define TM_CMD_TIMEOUT  100 /* msecs */

/* maximum number of retries for a general UIC command  */
#define UFS_UIC_COMMAND_RETRIES 3

/* maximum number of link-startup retries */
#define DME_LINKSTARTUP_RETRIES 3

/* Maximum retries for Hibern8 enter */
#define UIC_HIBERN8_ENTER_RETRIES 3

/* maximum number of reset retries before giving up */
#define MAX_HOST_RESET_RETRIES 5

/* Expose the flag value from utp_upiu_query.value */
#define MASK_QUERY_UPIU_FLAG_LOC 0xFF

/* Interrupt aggregation default timeout, unit: 40us */
#define INT_AGGR_DEF_TO 0x02

#define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
        ({                                                              \
                int _ret;                                               \
                if (_on)                                                \
                        _ret = ufshcd_enable_vreg(_dev, _vreg);         \
                else                                                    \
                        _ret = ufshcd_disable_vreg(_dev, _vreg);        \
                _ret;                                                   \
        })

static u32 ufs_query_desc_max_size[] = {
        QUERY_DESC_DEVICE_MAX_SIZE,
        QUERY_DESC_CONFIGURAION_MAX_SIZE,
        QUERY_DESC_UNIT_MAX_SIZE,
        QUERY_DESC_RFU_MAX_SIZE,
        QUERY_DESC_INTERCONNECT_MAX_SIZE,
        QUERY_DESC_STRING_MAX_SIZE,
        QUERY_DESC_RFU_MAX_SIZE,
        QUERY_DESC_GEOMETRY_MAX_SIZE,
        QUERY_DESC_POWER_MAX_SIZE,
        QUERY_DESC_RFU_MAX_SIZE,
};

enum {
        UFSHCD_MAX_CHANNEL      = 0,
        UFSHCD_MAX_ID           = 1,
        UFSHCD_CMD_PER_LUN      = 32,
        UFSHCD_CAN_QUEUE        = 32,
};

/* UFSHCD states */
enum {
        UFSHCD_STATE_RESET,
        UFSHCD_STATE_ERROR,
        UFSHCD_STATE_OPERATIONAL,
};

/* UFSHCD error handling flags */
enum {
        UFSHCD_EH_IN_PROGRESS = (1 << 0),
};

/* UFSHCD UIC layer error flags */
enum {
        UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
        UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
        UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
        UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
        UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
        UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
};

/* Interrupt configuration options */
enum {
        UFSHCD_INT_DISABLE,
        UFSHCD_INT_ENABLE,
        UFSHCD_INT_CLEAR,
};

#define ufshcd_set_eh_in_progress(h) \
        (h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
#define ufshcd_eh_in_progress(h) \
        (h->eh_flags & UFSHCD_EH_IN_PROGRESS)
#define ufshcd_clear_eh_in_progress(h) \
        (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)

#define ufshcd_set_ufs_dev_active(h) \
        ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
#define ufshcd_set_ufs_dev_sleep(h) \
        ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
#define ufshcd_set_ufs_dev_poweroff(h) \
        ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
#define ufshcd_is_ufs_dev_active(h) \
        ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
#define ufshcd_is_ufs_dev_sleep(h) \
        ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
#define ufshcd_is_ufs_dev_poweroff(h) \
        ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)

static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
        {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
        {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
        {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
        {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
        {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
        {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
};

static inline enum ufs_dev_pwr_mode
ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
{
        return ufs_pm_lvl_states[lvl].dev_state;
}

static inline enum uic_link_state
ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
{
        return ufs_pm_lvl_states[lvl].link_state;
}

static void ufshcd_tmc_handler(struct ufs_hba *hba);
static void ufshcd_async_scan(void *data, async_cookie_t cookie);
static int ufshcd_reset_and_restore(struct ufs_hba *hba);
static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
static void ufshcd_hba_exit(struct ufs_hba *hba);
static int ufshcd_probe_hba(struct ufs_hba *hba);
static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
                                 bool skip_ref_clk);
static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
static irqreturn_t ufshcd_intr(int irq, void *__hba);
static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
                struct ufs_pa_layer_attr *desired_pwr_mode);
static int ufshcd_change_power_mode(struct ufs_hba *hba,
                             struct ufs_pa_layer_attr *pwr_mode);
static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
{
        return tag >= 0 && tag < hba->nutrs;
}

static inline int ufshcd_enable_irq(struct ufs_hba *hba)
{
        int ret = 0;

        if (!hba->is_irq_enabled) {
                ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
                                hba);
                if (ret)
                        dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
                                __func__, ret);
                hba->is_irq_enabled = true;
        }

        return ret;
}

static inline void ufshcd_disable_irq(struct ufs_hba *hba)
{
        if (hba->is_irq_enabled) {
                free_irq(hba->irq, hba);
                hba->is_irq_enabled = false;
        }
}

/* replace non-printable or non-ASCII characters with spaces */
static inline void ufshcd_remove_non_printable(char *val)
{
        if (!val)
                return;

        if (*val < 0x20 || *val > 0x7e)
                *val = ' ';
}

/*
 * ufshcd_wait_for_register - wait for register value to change
 * @hba - per-adapter interface
 * @reg - mmio register offset
 * @mask - mask to apply to read register value
 * @val - wait condition
 * @interval_us - polling interval in microsecs
 * @timeout_ms - timeout in millisecs
 * @can_sleep - perform sleep or just spin
 *
 * Returns -ETIMEDOUT on error, zero on success
 */
int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
                                u32 val, unsigned long interval_us,
                                unsigned long timeout_ms, bool can_sleep)
{
        int err = 0;
        unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);

        /* ignore bits that we don't intend to wait on */
        val = val & mask;

        while ((ufshcd_readl(hba, reg) & mask) != val) {
                if (can_sleep)
                        usleep_range(interval_us, interval_us + 50);
                else
                        udelay(interval_us);
                if (time_after(jiffies, timeout)) {
                        if ((ufshcd_readl(hba, reg) & mask) != val)
                                err = -ETIMEDOUT;
                        break;
                }
        }

        return err;
}

/**
 * ufshcd_get_intr_mask - Get the interrupt bit mask
 * @hba - Pointer to adapter instance
 *
 * Returns interrupt bit mask per version
 */
static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
{
        if (hba->ufs_version == UFSHCI_VERSION_10)
                return INTERRUPT_MASK_ALL_VER_10;
        else
                return INTERRUPT_MASK_ALL_VER_11;
}

/**
 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 * @hba - Pointer to adapter instance
 *
 * Returns UFSHCI version supported by the controller
 */
static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
{
        if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
                return ufshcd_vops_get_ufs_hci_version(hba);

        return ufshcd_readl(hba, REG_UFS_VERSION);
}

/**
 * ufshcd_is_device_present - Check if any device connected to
 *                            the host controller
 * @hba: pointer to adapter instance
 *
 * Returns 1 if device present, 0 if no device detected
 */
static inline int ufshcd_is_device_present(struct ufs_hba *hba)
{
        return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
                                                DEVICE_PRESENT) ? 1 : 0;
}

/**
 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 * @lrb: pointer to local command reference block
 *
 * This function is used to get the OCS field from UTRD
 * Returns the OCS field in the UTRD
 */
static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
{
        return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
}

/**
 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
 * @task_req_descp: pointer to utp_task_req_desc structure
 *
 * This function is used to get the OCS field from UTMRD
 * Returns the OCS field in the UTMRD
 */
static inline int
ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
{
        return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
}

/**
 * ufshcd_get_tm_free_slot - get a free slot for task management request
 * @hba: per adapter instance
 * @free_slot: pointer to variable with available slot value
 *
 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
 * Returns 0 if free slot is not available, else return 1 with tag value
 * in @free_slot.
 */
static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
{
        int tag;
        bool ret = false;

        if (!free_slot)
                goto out;

        do {
                tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
                if (tag >= hba->nutmrs)
                        goto out;
        } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));

        *free_slot = tag;
        ret = true;
out:
        return ret;
}

static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
{
        clear_bit_unlock(slot, &hba->tm_slots_in_use);
}

/**
 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 * @hba: per adapter instance
 * @pos: position of the bit to be cleared
 */
static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
{
        ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
}

/**
 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 * @hba: per adapter instance
 * @tag: position of the bit to be cleared
 */
static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
{
        __clear_bit(tag, &hba->outstanding_reqs);
}

/**
 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 * @reg: Register value of host controller status
 *
 * Returns integer, 0 on Success and positive value if failed
 */
static inline int ufshcd_get_lists_status(u32 reg)
{
        /*
         * The mask 0xFF is for the following HCS register bits
         * Bit          Description
         *  0           Device Present
         *  1           UTRLRDY
         *  2           UTMRLRDY
         *  3           UCRDY
         * 4-7          reserved
         */
        return ((reg & 0xFF) >> 1) ^ 0x07;
}

/**
 * ufshcd_get_uic_cmd_result - Get the UIC command result
 * @hba: Pointer to adapter instance
 *
 * This function gets the result of UIC command completion
 * Returns 0 on success, non zero value on error
 */
static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
{
        return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
               MASK_UIC_COMMAND_RESULT;
}

/**
 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 * @hba: Pointer to adapter instance
 *
 * This function gets UIC command argument3
 * Returns 0 on success, non zero value on error
 */
static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
{
        return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
}

/**
 * ufshcd_get_req_rsp - returns the TR response transaction type
 * @ucd_rsp_ptr: pointer to response UPIU
 */
static inline int
ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
{
        return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
}

/**
 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * This function gets the response status and scsi_status from response UPIU
 * Returns the response result code.
 */
static inline int
ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
{
        return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
}

/*
 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 *                              from response UPIU
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * Return the data segment length.
 */
static inline unsigned int
ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
{
        return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
                MASK_RSP_UPIU_DATA_SEG_LEN;
}

/**
 * ufshcd_is_exception_event - Check if the device raised an exception event
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * The function checks if the device raised an exception event indicated in
 * the Device Information field of response UPIU.
 *
 * Returns true if exception is raised, false otherwise.
 */
static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
{
        return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
                        MASK_RSP_EXCEPTION_EVENT ? true : false;
}

/**
 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 * @hba: per adapter instance
 */
static inline void
ufshcd_reset_intr_aggr(struct ufs_hba *hba)
{
        ufshcd_writel(hba, INT_AGGR_ENABLE |
                      INT_AGGR_COUNTER_AND_TIMER_RESET,
                      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
}

/**
 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 * @hba: per adapter instance
 * @cnt: Interrupt aggregation counter threshold
 * @tmout: Interrupt aggregation timeout value
 */
static inline void
ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
{
        ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
                      INT_AGGR_COUNTER_THLD_VAL(cnt) |
                      INT_AGGR_TIMEOUT_VAL(tmout),
                      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
}

/**
 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 * @hba: per adapter instance
 */
static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
{
        ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
}

/**
 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 *                      When run-stop registers are set to 1, it indicates the
 *                      host controller that it can process the requests
 * @hba: per adapter instance
 */
static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
{
        ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
                      REG_UTP_TASK_REQ_LIST_RUN_STOP);
        ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
                      REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
}

/**
 * ufshcd_hba_start - Start controller initialization sequence
 * @hba: per adapter instance
 */
static inline void ufshcd_hba_start(struct ufs_hba *hba)
{
        ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
}

/**
 * ufshcd_is_hba_active - Get controller state
 * @hba: per adapter instance
 *
 * Returns zero if controller is active, 1 otherwise
 */
static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
{
        return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
}

u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
{
        /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
        if ((hba->ufs_version == UFSHCI_VERSION_10) ||
            (hba->ufs_version == UFSHCI_VERSION_11))
                return UFS_UNIPRO_VER_1_41;
        else
                return UFS_UNIPRO_VER_1_6;
}
EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);

static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
{
        /*
         * If both host and device support UniPro ver1.6 or later, PA layer
         * parameters tuning happens during link startup itself.
         *
         * We can manually tune PA layer parameters if either host or device
         * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
         * logic simple, we will only do manual tuning if local unipro version
         * doesn't support ver1.6 or later.
         */
        if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
                return true;
        else
                return false;
}

static void ufshcd_ungate_work(struct work_struct *work)
{
        int ret;
        unsigned long flags;
        struct ufs_hba *hba = container_of(work, struct ufs_hba,
                        clk_gating.ungate_work);

        cancel_delayed_work_sync(&hba->clk_gating.gate_work);

        spin_lock_irqsave(hba->host->host_lock, flags);
        if (hba->clk_gating.state == CLKS_ON) {
                spin_unlock_irqrestore(hba->host->host_lock, flags);
                goto unblock_reqs;
        }

        spin_unlock_irqrestore(hba->host->host_lock, flags);
        ufshcd_setup_clocks(hba, true);

        /* Exit from hibern8 */
        if (ufshcd_can_hibern8_during_gating(hba)) {
                /* Prevent gating in this path */
                hba->clk_gating.is_suspended = true;
                if (ufshcd_is_link_hibern8(hba)) {
                        ret = ufshcd_uic_hibern8_exit(hba);
                        if (ret)
                                dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
                                        __func__, ret);
                        else
                                ufshcd_set_link_active(hba);
                }
                hba->clk_gating.is_suspended = false;
        }
unblock_reqs:
        if (ufshcd_is_clkscaling_enabled(hba))
                devfreq_resume_device(hba->devfreq);
        scsi_unblock_requests(hba->host);
}

/**
 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
 * Also, exit from hibern8 mode and set the link as active.
 * @hba: per adapter instance
 * @async: This indicates whether caller should ungate clocks asynchronously.
 */
int ufshcd_hold(struct ufs_hba *hba, bool async)
{
        int rc = 0;
        unsigned long flags;

        if (!ufshcd_is_clkgating_allowed(hba))
                goto out;
        spin_lock_irqsave(hba->host->host_lock, flags);
        hba->clk_gating.active_reqs++;

        if (ufshcd_eh_in_progress(hba)) {
                spin_unlock_irqrestore(hba->host->host_lock, flags);
                return 0;
        }

start:
        switch (hba->clk_gating.state) {
        case CLKS_ON:
                break;
        case REQ_CLKS_OFF:
                if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
                        hba->clk_gating.state = CLKS_ON;
                        break;
                }
                /*
                 * If we here, it means gating work is either done or
                 * currently running. Hence, fall through to cancel gating
                 * work and to enable clocks.
                 */
        case CLKS_OFF:
                scsi_block_requests(hba->host);
                hba->clk_gating.state = REQ_CLKS_ON;
                schedule_work(&hba->clk_gating.ungate_work);
                /*
                 * fall through to check if we should wait for this
                 * work to be done or not.
                 */
        case REQ_CLKS_ON:
                if (async) {
                        rc = -EAGAIN;
                        hba->clk_gating.active_reqs--;
                        break;
                }

                spin_unlock_irqrestore(hba->host->host_lock, flags);
                flush_work(&hba->clk_gating.ungate_work);
                /* Make sure state is CLKS_ON before returning */
                spin_lock_irqsave(hba->host->host_lock, flags);
                goto start;
        default:
                dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
                                __func__, hba->clk_gating.state);
                break;
        }
        spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
        return rc;
}
EXPORT_SYMBOL_GPL(ufshcd_hold);

static void ufshcd_gate_work(struct work_struct *work)
{
        struct ufs_hba *hba = container_of(work, struct ufs_hba,
                        clk_gating.gate_work.work);
        unsigned long flags;

        spin_lock_irqsave(hba->host->host_lock, flags);
        if (hba->clk_gating.is_suspended) {
                hba->clk_gating.state = CLKS_ON;
                goto rel_lock;
        }

        if (hba->clk_gating.active_reqs
                || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
                || hba->lrb_in_use || hba->outstanding_tasks
                || hba->active_uic_cmd || hba->uic_async_done)
                goto rel_lock;

        spin_unlock_irqrestore(hba->host->host_lock, flags);

        /* put the link into hibern8 mode before turning off clocks */
        if (ufshcd_can_hibern8_during_gating(hba)) {
                if (ufshcd_uic_hibern8_enter(hba)) {
                        hba->clk_gating.state = CLKS_ON;
                        goto out;
                }
                ufshcd_set_link_hibern8(hba);
        }

        if (ufshcd_is_clkscaling_enabled(hba)) {
                devfreq_suspend_device(hba->devfreq);
                hba->clk_scaling.window_start_t = 0;
        }

        if (!ufshcd_is_link_active(hba))
                ufshcd_setup_clocks(hba, false);
        else
                /* If link is active, device ref_clk can't be switched off */
                __ufshcd_setup_clocks(hba, false, true);

        /*
         * In case you are here to cancel this work the gating state
         * would be marked as REQ_CLKS_ON. In this case keep the state
         * as REQ_CLKS_ON which would anyway imply that clocks are off
         * and a request to turn them on is pending. By doing this way,
         * we keep the state machine in tact and this would ultimately
         * prevent from doing cancel work multiple times when there are
         * new requests arriving before the current cancel work is done.
         */
        spin_lock_irqsave(hba->host->host_lock, flags);
        if (hba->clk_gating.state == REQ_CLKS_OFF)
                hba->clk_gating.state = CLKS_OFF;

rel_lock:
        spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
        return;
}

/* host lock must be held before calling this variant */
static void __ufshcd_release(struct ufs_hba *hba)
{
        if (!ufshcd_is_clkgating_allowed(hba))
                return;

        hba->clk_gating.active_reqs--;

        if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
                || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
                || hba->lrb_in_use || hba->outstanding_tasks
                || hba->active_uic_cmd || hba->uic_async_done
                || ufshcd_eh_in_progress(hba))
                return;

        hba->clk_gating.state = REQ_CLKS_OFF;
        schedule_delayed_work(&hba->clk_gating.gate_work,
                        msecs_to_jiffies(hba->clk_gating.delay_ms));
}

void ufshcd_release(struct ufs_hba *hba)
{
        unsigned long flags;

        spin_lock_irqsave(hba->host->host_lock, flags);
        __ufshcd_release(hba);
        spin_unlock_irqrestore(hba->host->host_lock, flags);
}
EXPORT_SYMBOL_GPL(ufshcd_release);

static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
                struct device_attribute *attr, char *buf)
{
        struct ufs_hba *hba = dev_get_drvdata(dev);

        return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
}

static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
                struct device_attribute *attr, const char *buf, size_t count)
{
        struct ufs_hba *hba = dev_get_drvdata(dev);
        unsigned long flags, value;

        if (kstrtoul(buf, 0, &value))
                return -EINVAL;

        spin_lock_irqsave(hba->host->host_lock, flags);
        hba->clk_gating.delay_ms = value;
        spin_unlock_irqrestore(hba->host->host_lock, flags);
        return count;
}

static void ufshcd_init_clk_gating(struct ufs_hba *hba)
{
        if (!ufshcd_is_clkgating_allowed(hba))
                return;

        hba->clk_gating.delay_ms = 150;
        INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
        INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);

        hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
        hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
        sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
        hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
        hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
        if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
                dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
}

static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
{
        if (!ufshcd_is_clkgating_allowed(hba))
                return;
        device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
        cancel_work_sync(&hba->clk_gating.ungate_work);
        cancel_delayed_work_sync(&hba->clk_gating.gate_work);
}

/* Must be called with host lock acquired */
static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
{
        if (!ufshcd_is_clkscaling_enabled(hba))
                return;

        if (!hba->clk_scaling.is_busy_started) {
                hba->clk_scaling.busy_start_t = ktime_get();
                hba->clk_scaling.is_busy_started = true;
        }
}

static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
{
        struct ufs_clk_scaling *scaling = &hba->clk_scaling;

        if (!ufshcd_is_clkscaling_enabled(hba))
                return;

        if (!hba->outstanding_reqs && scaling->is_busy_started) {
                scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
                                        scaling->busy_start_t));
                scaling->busy_start_t = ktime_set(0, 0);
                scaling->is_busy_started = false;
        }
}
/**
 * ufshcd_send_command - Send SCSI or device management commands
 * @hba: per adapter instance
 * @task_tag: Task tag of the command
 */
static inline
void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
{
        ufshcd_clk_scaling_start_busy(hba);
        __set_bit(task_tag, &hba->outstanding_reqs);
        ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
}

/**
 * ufshcd_copy_sense_data - Copy sense data in case of check condition
 * @lrb - pointer to local reference block
 */
static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
{
        int len;
        if (lrbp->sense_buffer &&
            ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
                len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
                memcpy(lrbp->sense_buffer,
                        lrbp->ucd_rsp_ptr->sr.sense_data,
                        min_t(int, len, SCSI_SENSE_BUFFERSIZE));
        }
}

/**
 * ufshcd_copy_query_response() - Copy the Query Response and the data
 * descriptor
 * @hba: per adapter instance
 * @lrb - pointer to local reference block
 */
static
int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
        struct ufs_query_res *query_res = &hba->dev_cmd.query.response;

        memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);

        /* Get the descriptor */
        if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
                u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
                                GENERAL_UPIU_REQUEST_SIZE;
                u16 resp_len;
                u16 buf_len;

                /* data segment length */
                resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
                                                MASK_QUERY_DATA_SEG_LEN;
                buf_len = be16_to_cpu(
                                hba->dev_cmd.query.request.upiu_req.length);
                if (likely(buf_len >= resp_len)) {
                        memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
                } else {
                        dev_warn(hba->dev,
                                "%s: Response size is bigger than buffer",
                                __func__);
                        return -EINVAL;
                }
        }

        return 0;
}

/**
 * ufshcd_hba_capabilities - Read controller capabilities
 * @hba: per adapter instance
 */
static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
{
        hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);

        /* nutrs and nutmrs are 0 based values */
        hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
        hba->nutmrs =
        ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
}

/**
 * ufshcd_ready_for_uic_cmd - Check if controller is ready
 *                            to accept UIC commands
 * @hba: per adapter instance
 * Return true on success, else false
 */
static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
{
        if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
                return true;
        else
                return false;
}

/**
 * ufshcd_get_upmcrs - Get the power mode change request status
 * @hba: Pointer to adapter instance
 *
 * This function gets the UPMCRS field of HCS register
 * Returns value of UPMCRS field
 */
static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
{
        return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
}

/**
 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
 * @hba: per adapter instance
 * @uic_cmd: UIC command
 *
 * Mutex must be held.
 */
static inline void
ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
{
        WARN_ON(hba->active_uic_cmd);

        hba->active_uic_cmd = uic_cmd;

        /* Write Args */
        ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
        ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
        ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);

        /* Write UIC Cmd */
        ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
                      REG_UIC_COMMAND);
}

/**
 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
 * @hba: per adapter instance
 * @uic_command: UIC command
 *
 * Must be called with mutex held.
 * Returns 0 only if success.
 */
static int
ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
{
        int ret;
        unsigned long flags;

        if (wait_for_completion_timeout(&uic_cmd->done,
                                        msecs_to_jiffies(UIC_CMD_TIMEOUT)))
                ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
        else
                ret = -ETIMEDOUT;

        spin_lock_irqsave(hba->host->host_lock, flags);
        hba->active_uic_cmd = NULL;
        spin_unlock_irqrestore(hba->host->host_lock, flags);

        return ret;
}

/**
 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
 * @hba: per adapter instance
 * @uic_cmd: UIC command
 * @completion: initialize the completion only if this is set to true
 *
 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
 * with mutex held and host_lock locked.
 * Returns 0 only if success.
 */
static int
__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
                      bool completion)
{
        if (!ufshcd_ready_for_uic_cmd(hba)) {
                dev_err(hba->dev,
                        "Controller not ready to accept UIC commands\n");
                return -EIO;
        }

        if (completion)
                init_completion(&uic_cmd->done);

        ufshcd_dispatch_uic_cmd(hba, uic_cmd);

        return 0;
}

/**
 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
 * @hba: per adapter instance
 * @uic_cmd: UIC command
 *
 * Returns 0 only if success.
 */
static int
ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
{
        int ret;
        unsigned long flags;

        ufshcd_hold(hba, false);
        mutex_lock(&hba->uic_cmd_mutex);
        ufshcd_add_delay_before_dme_cmd(hba);

        spin_lock_irqsave(hba->host->host_lock, flags);
        ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
        spin_unlock_irqrestore(hba->host->host_lock, flags);
        if (!ret)
                ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);

        mutex_unlock(&hba->uic_cmd_mutex);

        ufshcd_release(hba);
        return ret;
}

/**
 * ufshcd_map_sg - Map scatter-gather list to prdt
 * @lrbp - pointer to local reference block
 *
 * Returns 0 in case of success, non-zero value in case of failure
 */
static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
{
        struct ufshcd_sg_entry *prd_table;
        struct scatterlist *sg;
        struct scsi_cmnd *cmd;
        int sg_segments;
        int i;

        cmd = lrbp->cmd;
        sg_segments = scsi_dma_map(cmd);
        if (sg_segments < 0)
                return sg_segments;

        if (sg_segments) {
                lrbp->utr_descriptor_ptr->prd_table_length =
                                        cpu_to_le16((u16) (sg_segments));

                prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;

                scsi_for_each_sg(cmd, sg, sg_segments, i) {
                        prd_table[i].size  =
                                cpu_to_le32(((u32) sg_dma_len(sg))-1);
                        prd_table[i].base_addr =
                                cpu_to_le32(lower_32_bits(sg->dma_address));
                        prd_table[i].upper_addr =
                                cpu_to_le32(upper_32_bits(sg->dma_address));
                        prd_table[i].reserved = 0;
                }
        } else {
                lrbp->utr_descriptor_ptr->prd_table_length = 0;
        }

        return 0;
}

/**
 * ufshcd_enable_intr - enable interrupts
 * @hba: per adapter instance
 * @intrs: interrupt bits
 */
static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
{
        u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);

        if (hba->ufs_version == UFSHCI_VERSION_10) {
                u32 rw;
                rw = set & INTERRUPT_MASK_RW_VER_10;
                set = rw | ((set ^ intrs) & intrs);
        } else {
                set |= intrs;
        }

        ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
}

/**
 * ufshcd_disable_intr - disable interrupts
 * @hba: per adapter instance
 * @intrs: interrupt bits
 */
static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
{
        u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);

        if (hba->ufs_version == UFSHCI_VERSION_10) {
                u32 rw;
                rw = (set & INTERRUPT_MASK_RW_VER_10) &
                        ~(intrs & INTERRUPT_MASK_RW_VER_10);
                set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);

        } else {
                set &= ~intrs;
        }

        ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
}

/**
 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
 * descriptor according to request
 * @lrbp: pointer to local reference block
 * @upiu_flags: flags required in the header
 * @cmd_dir: requests data direction
 */
static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
                        u32 *upiu_flags, enum dma_data_direction cmd_dir)
{
        struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
        u32 data_direction;
        u32 dword_0;

        if (cmd_dir == DMA_FROM_DEVICE) {
                data_direction = UTP_DEVICE_TO_HOST;
                *upiu_flags = UPIU_CMD_FLAGS_READ;
        } else if (cmd_dir == DMA_TO_DEVICE) {
                data_direction = UTP_HOST_TO_DEVICE;
                *upiu_flags = UPIU_CMD_FLAGS_WRITE;
        } else {
                data_direction = UTP_NO_DATA_TRANSFER;
                *upiu_flags = UPIU_CMD_FLAGS_NONE;
        }

        dword_0 = data_direction | (lrbp->command_type
                                << UPIU_COMMAND_TYPE_OFFSET);
        if (lrbp->intr_cmd)
                dword_0 |= UTP_REQ_DESC_INT_CMD;

        /* Transfer request descriptor header fields */
        req_desc->header.dword_0 = cpu_to_le32(dword_0);
        /* dword_1 is reserved, hence it is set to 0 */
        req_desc->header.dword_1 = 0;
        /*
         * assigning invalid value for command status. Controller
         * updates OCS on command completion, with the command
         * status
         */
        req_desc->header.dword_2 =
                cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
        /* dword_3 is reserved, hence it is set to 0 */
        req_desc->header.dword_3 = 0;

        req_desc->prd_table_length = 0;
}

/**
 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
 * for scsi commands
 * @lrbp - local reference block pointer
 * @upiu_flags - flags
 */
static
void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
{
        struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
        unsigned short cdb_len;

        /* command descriptor fields */
        ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
                                UPIU_TRANSACTION_COMMAND, upiu_flags,
                                lrbp->lun, lrbp->task_tag);
        ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
                                UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);

        /* Total EHS length and Data segment length will be zero */
        ucd_req_ptr->header.dword_2 = 0;

        ucd_req_ptr->sc.exp_data_transfer_len =
                cpu_to_be32(lrbp->cmd->sdb.length);

        cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
        memset(ucd_req_ptr->sc.cdb, 0, MAX_CDB_SIZE);
        memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);

        memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
}

/**
 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
 * for query requsts
 * @hba: UFS hba
 * @lrbp: local reference block pointer
 * @upiu_flags: flags
 */
static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
                                struct ufshcd_lrb *lrbp, u32 upiu_flags)
{
        struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
        struct ufs_query *query = &hba->dev_cmd.query;
        u16 len = be16_to_cpu(query->request.upiu_req.length);
        u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;

        /* Query request header */
        ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
                        UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
                        lrbp->lun, lrbp->task_tag);
        ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
                        0, query->request.query_func, 0, 0);

        /* Data segment length */
        ucd_req_ptr->header.dword_2 = UPIU_HEADER_DWORD(
                        0, 0, len >> 8, (u8)len);

        /* Copy the Query Request buffer as is */
        memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
                        QUERY_OSF_SIZE);

        /* Copy the Descriptor */
        if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
                memcpy(descp, query->descriptor, len);

        memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
}

static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
{
        struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;

        memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));

        /* command descriptor fields */
        ucd_req_ptr->header.dword_0 =
                UPIU_HEADER_DWORD(
                        UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
        /* clear rest of the fields of basic header */
        ucd_req_ptr->header.dword_1 = 0;
        ucd_req_ptr->header.dword_2 = 0;

        memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
}

/**
 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
 *                           for Device Management Purposes
 * @hba - per adapter instance
 * @lrb - pointer to local reference block
 */
static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
        u32 upiu_flags;
        int ret = 0;

        if (hba->ufs_version == UFSHCI_VERSION_20)
                lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
        else
                lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;

        ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
        if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
                ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
        else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
                ufshcd_prepare_utp_nop_upiu(lrbp);
        else
                ret = -EINVAL;

        return ret;
}

/**
 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
 *                         for SCSI Purposes
 * @hba - per adapter instance
 * @lrb - pointer to local reference block
 */
static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
        u32 upiu_flags;
        int ret = 0;

        if (hba->ufs_version == UFSHCI_VERSION_20)
                lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
        else
                lrbp->command_type = UTP_CMD_TYPE_SCSI;

        if (likely(lrbp->cmd)) {
                ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
                                                lrbp->cmd->sc_data_direction);
                ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
        } else {
                ret = -EINVAL;
        }

        return ret;
}

/*
 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
 * @scsi_lun: scsi LUN id
 *
 * Returns UPIU LUN id
 */
static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
{
        if (scsi_is_wlun(scsi_lun))
                return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
                        | UFS_UPIU_WLUN_ID;
        else
                return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
}

/**
 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
 * @scsi_lun: UPIU W-LUN id
 *
 * Returns SCSI W-LUN id
 */
static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
{
        return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
}

/**
 * ufshcd_queuecommand - main entry point for SCSI requests
 * @cmd: command from SCSI Midlayer
 * @done: call back function
 *
 * Returns 0 for success, non-zero in case of failure
 */
static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
{
        struct ufshcd_lrb *lrbp;
        struct ufs_hba *hba;
        unsigned long flags;
        int tag;
        int err = 0;

        hba = shost_priv(host);

        tag = cmd->request->tag;
        if (!ufshcd_valid_tag(hba, tag)) {
                dev_err(hba->dev,
                        "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
                        __func__, tag, cmd, cmd->request);
                BUG();
        }

        spin_lock_irqsave(hba->host->host_lock, flags);
        switch (hba->ufshcd_state) {
        case UFSHCD_STATE_OPERATIONAL:
                break;
        case UFSHCD_STATE_RESET:
                err = SCSI_MLQUEUE_HOST_BUSY;
                goto out_unlock;
        case UFSHCD_STATE_ERROR:
                set_host_byte(cmd, DID_ERROR);
                cmd->scsi_done(cmd);
                goto out_unlock;
        default:
                dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
                                __func__, hba->ufshcd_state);
                set_host_byte(cmd, DID_BAD_TARGET);
                cmd->scsi_done(cmd);
                goto out_unlock;
        }

        /* if error handling is in progress, don't issue commands */
        if (ufshcd_eh_in_progress(hba)) {
                set_host_byte(cmd, DID_ERROR);
                cmd->scsi_done(cmd);
                goto out_unlock;
        }
        spin_unlock_irqrestore(hba->host->host_lock, flags);

        /* acquire the tag to make sure device cmds don't use it */
        if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
                /*
                 * Dev manage command in progress, requeue the command.
                 * Requeuing the command helps in cases where the request *may*
                 * find different tag instead of waiting for dev manage command
                 * completion.
                 */
                err = SCSI_MLQUEUE_HOST_BUSY;
                goto out;
        }

        err = ufshcd_hold(hba, true);
        if (err) {
                err = SCSI_MLQUEUE_HOST_BUSY;
                clear_bit_unlock(tag, &hba->lrb_in_use);
                goto out;
        }
        WARN_ON(hba->clk_gating.state != CLKS_ON);

        lrbp = &hba->lrb[tag];

        WARN_ON(lrbp->cmd);
        lrbp->cmd = cmd;
        lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
        lrbp->sense_buffer = cmd->sense_buffer;
        lrbp->task_tag = tag;
        lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
        lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;

        ufshcd_comp_scsi_upiu(hba, lrbp);

        err = ufshcd_map_sg(lrbp);
        if (err) {
                lrbp->cmd = NULL;
                clear_bit_unlock(tag, &hba->lrb_in_use);
                goto out;
        }

        /* issue command to the controller */
        spin_lock_irqsave(hba->host->host_lock, flags);
        ufshcd_send_command(hba, tag);
out_unlock:
        spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
        return err;
}

static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
                struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
{
        lrbp->cmd = NULL;
        lrbp->sense_bufflen = 0;
        lrbp->sense_buffer = NULL;
        lrbp->task_tag = tag;
        lrbp->lun = 0; /* device management cmd is not specific to any LUN */
        lrbp->intr_cmd = true; /* No interrupt aggregation */
        hba->dev_cmd.type = cmd_type;

        return ufshcd_comp_devman_upiu(hba, lrbp);
}

static int
ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
{
        int err = 0;
        unsigned long flags;
        u32 mask = 1 << tag;

        /* clear outstanding transaction before retry */
        spin_lock_irqsave(hba->host->host_lock, flags);
        ufshcd_utrl_clear(hba, tag);
        spin_unlock_irqrestore(hba->host->host_lock, flags);

        /*
         * wait for for h/w to clear corresponding bit in door-bell.
         * max. wait is 1 sec.
         */
        err = ufshcd_wait_for_register(hba,
                        REG_UTP_TRANSFER_REQ_DOOR_BELL,
                        mask, ~mask, 1000, 1000, true);

        return err;
}

static int
ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
        struct ufs_query_res *query_res = &hba->dev_cmd.query.response;

        /* Get the UPIU response */
        query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
                                UPIU_RSP_CODE_OFFSET;
        return query_res->response;
}

/**
 * ufshcd_dev_cmd_completion() - handles device management command responses
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
 */
static int
ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
        int resp;
        int err = 0;

        resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);

        switch (resp) {
        case UPIU_TRANSACTION_NOP_IN:
                if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
                        err = -EINVAL;
                        dev_err(hba->dev, "%s: unexpected response %x\n",
                                        __func__, resp);
                }
                break;
        case UPIU_TRANSACTION_QUERY_RSP:
                err = ufshcd_check_query_response(hba, lrbp);
                if (!err)
                        err = ufshcd_copy_query_response(hba, lrbp);
                break;
        case UPIU_TRANSACTION_REJECT_UPIU:
                /* TODO: handle Reject UPIU Response */
                err = -EPERM;
                dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
                                __func__);
                break;
        default:
                err = -EINVAL;
                dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
                                __func__, resp);
                break;
        }

        return err;
}

static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
                struct ufshcd_lrb *lrbp, int max_timeout)
{
        int err = 0;
        unsigned long time_left;
        unsigned long flags;

        time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
                        msecs_to_jiffies(max_timeout));

        spin_lock_irqsave(hba->host->host_lock, flags);
        hba->dev_cmd.complete = NULL;
        if (likely(time_left)) {
                err = ufshcd_get_tr_ocs(lrbp);
                if (!err)
                        err = ufshcd_dev_cmd_completion(hba, lrbp);
        }
        spin_unlock_irqrestore(hba->host->host_lock, flags);

        if (!time_left) {
                err = -ETIMEDOUT;
                dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
                        __func__, lrbp->task_tag);
                if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
                        /* successfully cleared the command, retry if needed */
                        err = -EAGAIN;
                /*
                 * in case of an error, after clearing the doorbell,
                 * we also need to clear the outstanding_request
                 * field in hba
                 */
                ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
        }

        return err;
}

/**
 * ufshcd_get_dev_cmd_tag - Get device management command tag
 * @hba: per-adapter instance
 * @tag: pointer to variable with available slot value
 *
 * Get a free slot and lock it until device management command
 * completes.
 *
 * Returns false if free slot is unavailable for locking, else
 * return true with tag value in @tag.
 */
static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
{
        int tag;
        bool ret = false;
        unsigned long tmp;

        if (!tag_out)
                goto out;

        do {
                tmp = ~hba->lrb_in_use;
                tag = find_last_bit(&tmp, hba->nutrs);
                if (tag >= hba->nutrs)
                        goto out;
        } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));

        *tag_out = tag;
        ret = true;
out:
        return ret;
}

static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
{
        clear_bit_unlock(tag, &hba->lrb_in_use);
}

/**
 * ufshcd_exec_dev_cmd - API for sending device management requests
 * @hba - UFS hba
 * @cmd_type - specifies the type (NOP, Query...)
 * @timeout - time in seconds
 *
 * NOTE: Since there is only one available tag for device management commands,
 * it is expected you hold the hba->dev_cmd.lock mutex.
 */
static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
                enum dev_cmd_type cmd_type, int timeout)
{
        struct ufshcd_lrb *lrbp;
        int err;
        int tag;
        struct completion wait;
        unsigned long flags;

        /*
         * Get free slot, sleep if slots are unavailable.
         * Even though we use wait_event() which sleeps indefinitely,
         * the maximum wait time is bounded by SCSI request timeout.
         */
        wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));

        init_completion(&wait);
        lrbp = &hba->lrb[tag];
        WARN_ON(lrbp->cmd);
        err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
        if (unlikely(err))
                goto out_put_tag;

        hba->dev_cmd.complete = &wait;

        /* Make sure descriptors are ready before ringing the doorbell */
        wmb();
        spin_lock_irqsave(hba->host->host_lock, flags);
        ufshcd_send_command(hba, tag);
        spin_unlock_irqrestore(hba->host->host_lock, flags);

        err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);

out_put_tag:
        ufshcd_put_dev_cmd_tag(hba, tag);
        wake_up(&hba->dev_cmd.tag_wq);
        return err;
}

/**
 * ufshcd_init_query() - init the query response and request parameters
 * @hba: per-adapter instance
 * @request: address of the request pointer to be initialized
 * @response: address of the response pointer to be initialized
 * @opcode: operation to perform
 * @idn: flag idn to access
 * @index: LU number to access
 * @selector: query/flag/descriptor further identification
 */
static inline void ufshcd_init_query(struct ufs_hba *hba,
                struct ufs_query_req **request, struct ufs_query_res **response,
                enum query_opcode opcode, u8 idn, u8 index, u8 selector)
{
        *request = &hba->dev_cmd.query.request;
        *response = &hba->dev_cmd.query.response;
        memset(*request, 0, sizeof(struct ufs_query_req));
        memset(*response, 0, sizeof(struct ufs_query_res));
        (*request)->upiu_req.opcode = opcode;
        (*request)->upiu_req.idn = idn;
        (*request)->upiu_req.index = index;
        (*request)->upiu_req.selector = selector;
}

static int ufshcd_query_flag_retry(struct ufs_hba *hba,
        enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
{
        int ret;
        int retries;

        for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
                ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
                if (ret)
                        dev_dbg(hba->dev,
                                "%s: failed with error %d, retries %d\n",
                                __func__, ret, retries);
                else
                        break;
        }

        if (ret)
                dev_err(hba->dev,
                        "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
                        __func__, opcode, idn, ret, retries);
        return ret;
}

/**
 * ufshcd_query_flag() - API function for sending flag query requests
 * hba: per-adapter instance
 * query_opcode: flag query to perform
 * idn: flag idn to access
 * flag_res: the flag value after the query request completes
 *
 * Returns 0 for success, non-zero in case of failure
 */
int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
                        enum flag_idn idn, bool *flag_res)
{
        struct ufs_query_req *request = NULL;
        struct ufs_query_res *response = NULL;
        int err, index = 0, selector = 0;
        int timeout = QUERY_REQ_TIMEOUT;

        BUG_ON(!hba);

        ufshcd_hold(hba, false);
        mutex_lock(&hba->dev_cmd.lock);
        ufshcd_init_query(hba, &request, &response, opcode, idn, index,
                        selector);

        switch (opcode) {
        case UPIU_QUERY_OPCODE_SET_FLAG:
        case UPIU_QUERY_OPCODE_CLEAR_FLAG:
        case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
                request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
                break;
        case UPIU_QUERY_OPCODE_READ_FLAG:
                request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
                if (!flag_res) {
                        /* No dummy reads */
                        dev_err(hba->dev, "%s: Invalid argument for read request\n",
                                        __func__);
                        err = -EINVAL;
                        goto out_unlock;
                }
                break;
        default:
                dev_err(hba->dev,
                        "%s: Expected query flag opcode but got = %d\n",
                        __func__, opcode);
                err = -EINVAL;
                goto out_unlock;
        }

        if (idn == QUERY_FLAG_IDN_FDEVICEINIT)
                timeout = QUERY_FDEVICEINIT_REQ_TIMEOUT;

        err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);

        if (err) {
                dev_err(hba->dev,
                        "%s: Sending flag query for idn %d failed, err = %d\n",
                        __func__, idn, err);
                goto out_unlock;
        }

        if (flag_res)
                *flag_res = (be32_to_cpu(response->upiu_res.value) &
                                MASK_QUERY_UPIU_FLAG_LOC) & 0x1;

out_unlock:
        mutex_unlock(&hba->dev_cmd.lock);
        ufshcd_release(hba);
        return err;
}

/**
 * ufshcd_query_attr - API function for sending attribute requests
 * hba: per-adapter instance
 * opcode: attribute opcode
 * idn: attribute idn to access
 * index: index field
 * selector: selector field
 * attr_val: the attribute value after the query request completes
 *
 * Returns 0 for success, non-zero in case of failure
*/
static int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
                        enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
{
        struct ufs_query_req *request = NULL;
        struct ufs_query_res *response = NULL;
        int err;

        BUG_ON(!hba);

        ufshcd_hold(hba, false);
        if (!attr_val) {
                dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
                                __func__, opcode);
                err = -EINVAL;
                goto out;
        }

        mutex_lock(&hba->dev_cmd.lock);
        ufshcd_init_query(hba, &request, &response, opcode, idn, index,
                        selector);

        switch (opcode) {
        case UPIU_QUERY_OPCODE_WRITE_ATTR:
                request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
                request->upiu_req.value = cpu_to_be32(*attr_val);
                break;
        case UPIU_QUERY_OPCODE_READ_ATTR:
                request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
                break;
        default:
                dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
                                __func__, opcode);
                err = -EINVAL;
                goto out_unlock;
        }

        err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);

        if (err) {
                dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
                                __func__, opcode, idn, err);
                goto out_unlock;
        }

        *attr_val = be32_to_cpu(response->upiu_res.value);

out_unlock:
        mutex_unlock(&hba->dev_cmd.lock);
out:
        ufshcd_release(hba);
        return err;
}

/**
 * ufshcd_query_attr_retry() - API function for sending query
 * attribute with retries
 * @hba: per-adapter instance
 * @opcode: attribute opcode
 * @idn: attribute idn to access
 * @index: index field
 * @selector: selector field
 * @attr_val: the attribute value after the query request
 * completes
 *
 * Returns 0 for success, non-zero in case of failure
*/
static int ufshcd_query_attr_retry(struct ufs_hba *hba,
        enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
        u32 *attr_val)
{
        int ret = 0;
        u32 retries;

         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
                ret = ufshcd_query_attr(hba, opcode, idn, index,
                                                selector, attr_val);
                if (ret)
                        dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
                                __func__, ret, retries);
                else
                        break;
        }

        if (ret)
                dev_err(hba->dev,
                        "%s: query attribute, idn %d, failed with error %d after %d retires\n",
                        __func__, idn, ret, QUERY_REQ_RETRIES);
        return ret;
}

static int __ufshcd_query_descriptor(struct ufs_hba *hba,
                        enum query_opcode opcode, enum desc_idn idn, u8 index,
                        u8 selector, u8 *desc_buf, int *buf_len)
{
        struct ufs_query_req *request = NULL;
        struct ufs_query_res *response = NULL;
        int err;

        BUG_ON(!hba);

        ufshcd_hold(hba, false);
        if (!desc_buf) {
                dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
                                __func__, opcode);
                err = -EINVAL;
                goto out;
        }

        if (*buf_len <= QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
                dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
                                __func__, *buf_len);
                err = -EINVAL;
                goto out;
        }

        mutex_lock(&hba->dev_cmd.lock);
        ufshcd_init_query(hba, &request, &response, opcode, idn, index,
                        selector);
        hba->dev_cmd.query.descriptor = desc_buf;
        request->upiu_req.length = cpu_to_be16(*buf_len);

        switch (opcode) {
        case UPIU_QUERY_OPCODE_WRITE_DESC:
                request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
                break;
        case UPIU_QUERY_OPCODE_READ_DESC:
                request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
                break;
        default:
                dev_err(hba->dev,
                                "%s: Expected query descriptor opcode but got = 0x%.2x\n",
                                __func__, opcode);
                err = -EINVAL;
                goto out_unlock;
        }

        err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);

        if (err) {
                dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
                                __func__, opcode, idn, err);
                goto out_unlock;
        }

        hba->dev_cmd.query.descriptor = NULL;
        *buf_len = be16_to_cpu(response->upiu_res.length);

out_unlock:
        mutex_unlock(&hba->dev_cmd.lock);
out:
        ufshcd_release(hba);
        return err;
}

/**
 * ufshcd_query_descriptor_retry - API function for sending descriptor
 * requests
 * hba: per-adapter instance
 * opcode: attribute opcode
 * idn: attribute idn to access
 * index: index field
 * selector: selector field
 * desc_buf: the buffer that contains the descriptor
 * buf_len: length parameter passed to the device
 *
 * Returns 0 for success, non-zero in case of failure.
 * The buf_len parameter will contain, on return, the length parameter
 * received on the response.
 */
int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
                        enum query_opcode opcode, enum desc_idn idn, u8 index,
                        u8 selector, u8 *desc_buf, int *buf_len)
{
        int err;
        int retries;

        for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
                err = __ufshcd_query_descriptor(hba, opcode, idn, index,
                                                selector, desc_buf, buf_len);

                if (!err || err == -EINVAL)
                        break;
        }

        return err;
}
EXPORT_SYMBOL(ufshcd_query_descriptor_retry);

/**
 * ufshcd_read_desc_param - read the specified descriptor parameter
 * @hba: Pointer to adapter instance
 * @desc_id: descriptor idn value
 * @desc_index: descriptor index
 * @param_offset: offset of the parameter to read
 * @param_read_buf: pointer to buffer where parameter would be read
 * @param_size: sizeof(param_read_buf)
 *
 * Return 0 in case of success, non-zero otherwise
 */
static int ufshcd_read_desc_param(struct ufs_hba *hba,
                                  enum desc_idn desc_id,
                                  int desc_index,
                                  u32 param_offset,
                                  u8 *param_read_buf,
                                  u32 param_size)
{
        int ret;
        u8 *desc_buf;
        u32 buff_len;
        bool is_kmalloc = true;

        /* safety checks */
        if (desc_id >= QUERY_DESC_IDN_MAX)
                return -EINVAL;

        buff_len = ufs_query_desc_max_size[desc_id];
        if ((param_offset + param_size) > buff_len)
                return -EINVAL;

        if (!param_offset && (param_size == buff_len)) {
                /* memory space already available to hold full descriptor */
                desc_buf = param_read_buf;
                is_kmalloc = false;
        } else {
                /* allocate memory to hold full descriptor */
                desc_buf = kmalloc(buff_len, GFP_KERNEL);
                if (!desc_buf)
                        return -ENOMEM;
        }

        ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
                                        desc_id, desc_index, 0, desc_buf,
                                        &buff_len);

        if (ret || (buff_len < ufs_query_desc_max_size[desc_id]) ||
            (desc_buf[QUERY_DESC_LENGTH_OFFSET] !=
             ufs_query_desc_max_size[desc_id])
            || (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id)) {
                dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d param_offset %d buff_len %d ret %d",
                        __func__, desc_id, param_offset, buff_len, ret);
                if (!ret)
                        ret = -EINVAL;

                goto out;
        }

        if (is_kmalloc)
                memcpy(param_read_buf, &desc_buf[param_offset], param_size);
out:
        if (is_kmalloc)
                kfree(desc_buf);
        return ret;
}

static inline int ufshcd_read_desc(struct ufs_hba *hba,
                                   enum desc_idn desc_id,
                                   int desc_index,
                                   u8 *buf,
                                   u32 size)
{
        return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
}

static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
                                         u8 *buf,
                                         u32 size)
{
        return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
}

int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
{
        return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
}
EXPORT_SYMBOL(ufshcd_read_device_desc);

/**
 * ufshcd_read_string_desc - read string descriptor
 * @hba: pointer to adapter instance
 * @desc_index: descriptor index
 * @buf: pointer to buffer where descriptor would be read
 * @size: size of buf
 * @ascii: if true convert from unicode to ascii characters
 *
 * Return 0 in case of success, non-zero otherwise
 */
int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
                                u32 size, bool ascii)
{
        int err = 0;

        err = ufshcd_read_desc(hba,
                                QUERY_DESC_IDN_STRING, desc_index, buf, size);

        if (err) {
                dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
                        __func__, QUERY_REQ_RETRIES, err);
                goto out;
        }

        if (ascii) {
                int desc_len;
                int ascii_len;
                int i;
                char *buff_ascii;

                desc_len = buf[0];
                /* remove header and divide by 2 to move from UTF16 to UTF8 */
                ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
                if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
                        dev_err(hba->dev, "%s: buffer allocated size is too small\n",
                                        __func__);
                        err = -ENOMEM;
                        goto out;
                }

                buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
                if (!buff_ascii) {
                        err = -ENOMEM;
                        goto out;
                }

                /*
                 * the descriptor contains string in UTF16 format
                 * we need to convert to utf-8 so it can be displayed
                 */
                utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
                                desc_len - QUERY_DESC_HDR_SIZE,
                                UTF16_BIG_ENDIAN, buff_ascii, ascii_len);

                /* replace non-printable or non-ASCII characters with spaces */
                for (i = 0; i < ascii_len; i++)
                        ufshcd_remove_non_printable(&buff_ascii[i]);

                memset(buf + QUERY_DESC_HDR_SIZE, 0,
                                size - QUERY_DESC_HDR_SIZE);
                memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
                buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
                kfree(buff_ascii);
        }
out:
        return err;
}
EXPORT_SYMBOL(ufshcd_read_string_desc);

/**
 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
 * @hba: Pointer to adapter instance
 * @lun: lun id
 * @param_offset: offset of the parameter to read
 * @param_read_buf: pointer to buffer where parameter would be read
 * @param_size: sizeof(param_read_buf)
 *
 * Return 0 in case of success, non-zero otherwise
 */
static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
                                              int lun,
                                              enum unit_desc_param param_offset,
                                              u8 *param_read_buf,
                                              u32 param_size)
{
        /*
         * Unit descriptors are only available for general purpose LUs (LUN id
         * from 0 to 7) and RPMB Well known LU.
         */
        if (lun != UFS_UPIU_RPMB_WLUN && (lun >= UFS_UPIU_MAX_GENERAL_LUN))
                return -EOPNOTSUPP;

        return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
                                      param_offset, param_read_buf, param_size);
}

/**
 * ufshcd_memory_alloc - allocate memory for host memory space data structures
 * @hba: per adapter instance
 *
 * 1. Allocate DMA memory for Command Descriptor array
 *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
 *      (UTMRDL)
 * 4. Allocate memory for local reference block(lrb).
 *
 * Returns 0 for success, non-zero in case of failure
 */
static int ufshcd_memory_alloc(struct ufs_hba *hba)
{
        size_t utmrdl_size, utrdl_size, ucdl_size;

        /* Allocate memory for UTP command descriptors */
        ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
        hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
                                                  ucdl_size,
                                                  &hba->ucdl_dma_addr,
                                                  GFP_KERNEL);

        /*
         * UFSHCI requires UTP command descriptor to be 128 byte aligned.
         * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
         * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
         * be aligned to 128 bytes as well
         */
        if (!hba->ucdl_base_addr ||
            WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
                dev_err(hba->dev,
                        "Command Descriptor Memory allocation failed\n");
                goto out;
        }

        /*
         * Allocate memory for UTP Transfer descriptors
         * UFSHCI requires 1024 byte alignment of UTRD
         */
        utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
        hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
                                                   utrdl_size,
                                                   &hba->utrdl_dma_addr,
                                                   GFP_KERNEL);
        if (!hba->utrdl_base_addr ||
            WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
                dev_err(hba->dev,
                        "Transfer Descriptor Memory allocation failed\n");
                goto out;
        }

        /*
         * Allocate memory for UTP Task Management descriptors
         * UFSHCI requires 1024 byte alignment of UTMRD
         */
        utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
        hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
                                                    utmrdl_size,
                                                    &hba->utmrdl_dma_addr,
                                                    GFP_KERNEL);
        if (!hba->utmrdl_base_addr ||
            WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
                dev_err(hba->dev,
                "Task Management Descriptor Memory allocation failed\n");
                goto out;
        }

        /* Allocate memory for local reference block */
        hba->lrb = devm_kzalloc(hba->dev,
                                hba->nutrs * sizeof(struct ufshcd_lrb),
                                GFP_KERNEL);
        if (!hba->lrb) {
                dev_err(hba->dev, "LRB Memory allocation failed\n");
                goto out;
        }
        return 0;
out:
        return -ENOMEM;
}

/**
 * ufshcd_host_memory_configure - configure local reference block with
 *                              memory offsets
 * @hba: per adapter instance
 *
 * Configure Host memory space
 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
 * address.
 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
 * and PRDT offset.
 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
 * into local reference block.
 */
static void ufshcd_host_memory_configure(struct ufs_hba *hba)
{
        struct utp_transfer_cmd_desc *cmd_descp;
        struct utp_transfer_req_desc *utrdlp;
        dma_addr_t cmd_desc_dma_addr;
        dma_addr_t cmd_desc_element_addr;
        u16 response_offset;
        u16 prdt_offset;
        int cmd_desc_size;
        int i;

        utrdlp = hba->utrdl_base_addr;
        cmd_descp = hba->ucdl_base_addr;

        response_offset =
                offsetof(struct utp_transfer_cmd_desc, response_upiu);
        prdt_offset =
                offsetof(struct utp_transfer_cmd_desc, prd_table);

        cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
        cmd_desc_dma_addr = hba->ucdl_dma_addr;

        for (i = 0; i < hba->nutrs; i++) {
                /* Configure UTRD with command descriptor base address */
                cmd_desc_element_addr =
                                (cmd_desc_dma_addr + (cmd_desc_size * i));
                utrdlp[i].command_desc_base_addr_lo =
                                cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
                utrdlp[i].command_desc_base_addr_hi =
                                cpu_to_le32(upper_32_bits(cmd_desc_element_addr));

                /* Response upiu and prdt offset should be in double words */
                utrdlp[i].response_upiu_offset =
                                cpu_to_le16((response_offset >> 2));
                utrdlp[i].prd_table_offset =
                                cpu_to_le16((prdt_offset >> 2));
                utrdlp[i].response_upiu_length =
                                cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);

                hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
                hba->lrb[i].ucd_req_ptr =
                        (struct utp_upiu_req *)(cmd_descp + i);
                hba->lrb[i].ucd_rsp_ptr =
                        (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
                hba->lrb[i].ucd_prdt_ptr =
                        (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
        }
}

/**
 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
 * @hba: per adapter instance
 *
 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
 * in order to initialize the Unipro link startup procedure.
 * Once the Unipro links are up, the device connected to the controller
 * is detected.
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_dme_link_startup(struct ufs_hba *hba)
{
        struct uic_command uic_cmd = {0};
        int ret;

        uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;

        ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
        if (ret)
                dev_err(hba->dev,
                        "dme-link-startup: error code %d\n", ret);
        return ret;
}

static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
{
        #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
        unsigned long min_sleep_time_us;

        if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
                return;

        /*
         * last_dme_cmd_tstamp will be 0 only for 1st call to
         * this function
         */
        if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
                min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
        } else {
                unsigned long delta =
                        (unsigned long) ktime_to_us(
                                ktime_sub(ktime_get(),
                                hba->last_dme_cmd_tstamp));

                if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
                        min_sleep_time_us =
                                MIN_DELAY_BEFORE_DME_CMDS_US - delta;
                else
                        return; /* no more delay required */
        }

        /* allow sleep for extra 50us if needed */
        usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
}

/**
 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
 * @hba: per adapter instance
 * @attr_sel: uic command argument1
 * @attr_set: attribute set type as uic command argument2
 * @mib_val: setting value as uic command argument3
 * @peer: indicate whether peer or local
 *
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
                        u8 attr_set, u32 mib_val, u8 peer)
{
        struct uic_command uic_cmd = {0};
        static const char *const action[] = {
                "dme-set",
                "dme-peer-set"
        };
        const char *set = action[!!peer];
        int ret;
        int retries = UFS_UIC_COMMAND_RETRIES;

        uic_cmd.command = peer ?
                UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
        uic_cmd.argument1 = attr_sel;
        uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
        uic_cmd.argument3 = mib_val;

        do {
                /* for peer attributes we retry upon failure */
                ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
                if (ret)
                        dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
                                set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
        } while (ret && peer && --retries);

        if (!retries)
                dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
                                set, UIC_GET_ATTR_ID(attr_sel), mib_val,
                                retries);

        return ret;
}
EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);

/**
 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
 * @hba: per adapter instance
 * @attr_sel: uic command argument1
 * @mib_val: the value of the attribute as returned by the UIC command
 * @peer: indicate whether peer or local
 *
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
                        u32 *mib_val, u8 peer)
{
        struct uic_command uic_cmd = {0};
        static const char *const action[] = {
                "dme-get",
                "dme-peer-get"
        };
        const char *get = action[!!peer];
        int ret;
        int retries = UFS_UIC_COMMAND_RETRIES;
        struct ufs_pa_layer_attr orig_pwr_info;
        struct ufs_pa_layer_attr temp_pwr_info;
        bool pwr_mode_change = false;

        if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
                orig_pwr_info = hba->pwr_info;
                temp_pwr_info = orig_pwr_info;

                if (orig_pwr_info.pwr_tx == FAST_MODE ||
                    orig_pwr_info.pwr_rx == FAST_MODE) {
                        temp_pwr_info.pwr_tx = FASTAUTO_MODE;
                        temp_pwr_info.pwr_rx = FASTAUTO_MODE;
                        pwr_mode_change = true;
                } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
                    orig_pwr_info.pwr_rx == SLOW_MODE) {
                        temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
                        temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
                        pwr_mode_change = true;
                }
                if (pwr_mode_change) {
                        ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
                        if (ret)
                                goto out;
                }
        }

        uic_cmd.command = peer ?
                UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
        uic_cmd.argument1 = attr_sel;

        do {
                /* for peer attributes we retry upon failure */
                ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
                if (ret)
                        dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
                                get, UIC_GET_ATTR_ID(attr_sel), ret);
        } while (ret && peer && --retries);

        if (!retries)
                dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
                                get, UIC_GET_ATTR_ID(attr_sel), retries);

        if (mib_val && !ret)
                *mib_val = uic_cmd.argument3;

        if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
            && pwr_mode_change)
                ufshcd_change_power_mode(hba, &orig_pwr_info);
out:
        return ret;
}
EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);

/**
 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
 * state) and waits for it to take effect.
 *
 * @hba: per adapter instance
 * @cmd: UIC command to execute
 *
 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
 * and device UniPro link and hence it's final completion would be indicated by
 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
 * addition to normal UIC command completion Status (UCCS). This function only
 * returns after the relevant status bits indicate the completion.
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
{
        struct completion uic_async_done;
        unsigned long flags;
        u8 status;
        int ret;
        bool reenable_intr = false;

        mutex_lock(&hba->uic_cmd_mutex);
        init_completion(&uic_async_done);
        ufshcd_add_delay_before_dme_cmd(hba);

        spin_lock_irqsave(hba->host->host_lock, flags);
        hba->uic_async_done = &uic_async_done;
        if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
                ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
                /*
                 * Make sure UIC command completion interrupt is disabled before
                 * issuing UIC command.
                 */
                wmb();
                reenable_intr = true;
        }
        ret = __ufshcd_send_uic_cmd(hba, cmd, false);
        spin_unlock_irqrestore(hba->host->host_lock, flags);
        if (ret) {
                dev_err(hba->dev,
                        "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
                        cmd->command, cmd->argument3, ret);
                goto out;
        }

        if (!wait_for_completion_timeout(hba->uic_async_done,
                                         msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
                dev_err(hba->dev,
                        "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
                        cmd->command, cmd->argument3);
                ret = -ETIMEDOUT;
                goto out;
        }

        status = ufshcd_get_upmcrs(hba);
        if (status != PWR_LOCAL) {
                dev_err(hba->dev,
                        "pwr ctrl cmd 0x%0x failed, host umpcrs:0x%x\n",
                        cmd->command, status);
                ret = (status != PWR_OK) ? status : -1;
        }
out:
        spin_lock_irqsave(hba->host->host_lock, flags);
        hba->active_uic_cmd = NULL;
        hba->uic_async_done = NULL;
        if (reenable_intr)
                ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
        spin_unlock_irqrestore(hba->host->host_lock, flags);
        mutex_unlock(&hba->uic_cmd_mutex);

        return ret;
}

/**
 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
 *                              using DME_SET primitives.
 * @hba: per adapter instance
 * @mode: powr mode value
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
{
        struct uic_command uic_cmd = {0};
        int ret;

        if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
                ret = ufshcd_dme_set(hba,
                                UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
                if (ret) {
                        dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
                                                __func__, ret);
                        goto out;
                }
        }

        uic_cmd.command = UIC_CMD_DME_SET;
        uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
        uic_cmd.argument3 = mode;
        ufshcd_hold(hba, false);
        ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
        ufshcd_release(hba);

out:
        return ret;
}

static int ufshcd_link_recovery(struct ufs_hba *hba)
{
        int ret;
        unsigned long flags;

        spin_lock_irqsave(hba->host->host_lock, flags);
        hba->ufshcd_state = UFSHCD_STATE_RESET;
        ufshcd_set_eh_in_progress(hba);
        spin_unlock_irqrestore(hba->host->host_lock, flags);

        ret = ufshcd_host_reset_and_restore(hba);

        spin_lock_irqsave(hba->host->host_lock, flags);
        if (ret)
                hba->ufshcd_state = UFSHCD_STATE_ERROR;
        ufshcd_clear_eh_in_progress(hba);
        spin_unlock_irqrestore(hba->host->host_lock, flags);

        if (ret)
                dev_err(hba->dev, "%s: link recovery failed, err %d",
                        __func__, ret);

        return ret;
}

static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
{
        int ret;
        struct uic_command uic_cmd = {0};

        uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
        ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);

        if (ret) {
                dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
                        __func__, ret);

                /*
                 * If link recovery fails then return error so that caller
                 * don't retry the hibern8 enter again.
                 */
                if (ufshcd_link_recovery(hba))
                        ret = -ENOLINK;
        }

        return ret;
}

static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
{
        int ret = 0, retries;

        for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
                ret = __ufshcd_uic_hibern8_enter(hba);
                if (!ret || ret == -ENOLINK)
                        goto out;
        }
out:
        return ret;
}

static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
{
        struct uic_command uic_cmd = {0};
        int ret;

        uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
        ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
        if (ret) {
                dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
                        __func__, ret);
                ret = ufshcd_link_recovery(hba);
        }

        return ret;
}

 /**
 * ufshcd_init_pwr_info - setting the POR (power on reset)
 * values in hba power info
 * @hba: per-adapter instance
 */
static void ufshcd_init_pwr_info(struct ufs_hba *hba)
{
        hba->pwr_info.gear_rx = UFS_PWM_G1;
        hba->pwr_info.gear_tx = UFS_PWM_G1;
        hba->pwr_info.lane_rx = 1;
        hba->pwr_info.lane_tx = 1;
        hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
        hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
        hba->pwr_info.hs_rate = 0;
}

/**
 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
 * @hba: per-adapter instance
 */
static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
{
        struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;

        if (hba->max_pwr_info.is_valid)
                return 0;

        pwr_info->pwr_tx = FASTAUTO_MODE;
        pwr_info->pwr_rx = FASTAUTO_MODE;
        pwr_info->hs_rate = PA_HS_MODE_B;

        /* Get the connected lane count */
        ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
                        &pwr_info->lane_rx);
        ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
                        &pwr_info->lane_tx);

        if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
                dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
                                __func__,
                                pwr_info->lane_rx,
                                pwr_info->lane_tx);
                return -EINVAL;
        }

        /*
         * First, get the maximum gears of HS speed.
         * If a zero value, it means there is no HSGEAR capability.
         * Then, get the maximum gears of PWM speed.
         */
        ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
        if (!pwr_info->gear_rx) {
                ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
                                &pwr_info->gear_rx);
                if (!pwr_info->gear_rx) {
                        dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
                                __func__, pwr_info->gear_rx);
                        return -EINVAL;
                }
                pwr_info->pwr_rx = SLOWAUTO_MODE;
        }

        ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
                        &pwr_info->gear_tx);
        if (!pwr_info->gear_tx) {
                ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
                                &pwr_info->gear_tx);
                if (!pwr_info->gear_tx) {
                        dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
                                __func__, pwr_info->gear_tx);
                        return -EINVAL;
                }
                pwr_info->pwr_tx = SLOWAUTO_MODE;
        }

        hba->max_pwr_info.is_valid = true;
        return 0;
}

static int ufshcd_change_power_mode(struct ufs_hba *hba,
                             struct ufs_pa_layer_attr *pwr_mode)
{
        int ret;

        /* if already configured to the requested pwr_mode */
        if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
            pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
            pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
            pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
            pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
            pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
            pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
                dev_dbg(hba->dev, "%s: power already configured\n", __func__);
                return 0;
        }

        /*
         * Configure attributes for power mode change with below.
         * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
         * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
         * - PA_HSSERIES
         */
        ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
        ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
                        pwr_mode->lane_rx);
        if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
                        pwr_mode->pwr_rx == FAST_MODE)
                ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
        else
                ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);

        ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
        ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
                        pwr_mode->lane_tx);
        if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
                        pwr_mode->pwr_tx == FAST_MODE)
                ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
        else
                ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);

        if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
            pwr_mode->pwr_tx == FASTAUTO_MODE ||
            pwr_mode->pwr_rx == FAST_MODE ||
            pwr_mode->pwr_tx == FAST_MODE)
                ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
                                                pwr_mode->hs_rate);

        ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
                        | pwr_mode->pwr_tx);

        if (ret) {
                dev_err(hba->dev,
                        "%s: power mode change failed %d\n", __func__, ret);
        } else {
                ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
                                                                pwr_mode);

                memcpy(&hba->pwr_info, pwr_mode,
                        sizeof(struct ufs_pa_layer_attr));
        }

        return ret;
}

/**
 * ufshcd_config_pwr_mode - configure a new power mode
 * @hba: per-adapter instance
 * @desired_pwr_mode: desired power configuration
 */
static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
                struct ufs_pa_layer_attr *desired_pwr_mode)
{
        struct ufs_pa_layer_attr final_params = { 0 };
        int ret;

        ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
                                        desired_pwr_mode, &final_params);

        if (ret)
                memcpy(&final_params, desired_pwr_mode, sizeof(final_params));

        ret = ufshcd_change_power_mode(hba, &final_params);

        return ret;
}

/**
 * ufshcd_complete_dev_init() - checks device readiness
 * hba: per-adapter instance
 *
 * Set fDeviceInit flag and poll until device toggles it.
 */
static int ufshcd_complete_dev_init(struct ufs_hba *hba)
{
        int i;
        int err;
        bool flag_res = 1;

        err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
                QUERY_FLAG_IDN_FDEVICEINIT, NULL);
        if (err) {
                dev_err(hba->dev,
                        "%s setting fDeviceInit flag failed with error %d\n",
                        __func__, err);
                goto out;
        }

        /* poll for max. 1000 iterations for fDeviceInit flag to clear */
        for (i = 0; i < 1000 && !err && flag_res; i++)
                err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
                        QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);

        if (err)
                dev_err(hba->dev,
                        "%s reading fDeviceInit flag failed with error %d\n",
                        __func__, err);
        else if (flag_res)
                dev_err(hba->dev,
                        "%s fDeviceInit was not cleared by the device\n",
                        __func__);

out:
        return err;
}

/**
 * ufshcd_make_hba_operational - Make UFS controller operational
 * @hba: per adapter instance
 *
 * To bring UFS host controller to operational state,
 * 1. Enable required interrupts
 * 2. Configure interrupt aggregation
 * 3. Program UTRL and UTMRL base address
 * 4. Configure run-stop-registers
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_make_hba_operational(struct ufs_hba *hba)
{
        int err = 0;
        u32 reg;

        /* Enable required interrupts */
        ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);

        /* Configure interrupt aggregation */
        if (ufshcd_is_intr_aggr_allowed(hba))
                ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
        else
                ufshcd_disable_intr_aggr(hba);

        /* Configure UTRL and UTMRL base address registers */
        ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
                        REG_UTP_TRANSFER_REQ_LIST_BASE_L);
        ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
                        REG_UTP_TRANSFER_REQ_LIST_BASE_H);
        ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
                        REG_UTP_TASK_REQ_LIST_BASE_L);
        ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
                        REG_UTP_TASK_REQ_LIST_BASE_H);

        /*
         * Make sure base address and interrupt setup are updated before
         * enabling the run/stop registers below.
         */
        wmb();

        /*
         * UCRDY, UTMRLDY and UTRLRDY bits must be 1
         */
        reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
        if (!(ufshcd_get_lists_status(reg))) {
                ufshcd_enable_run_stop_reg(hba);
        } else {
                dev_err(hba->dev,
                        "Host controller not ready to process requests");
                err = -EIO;
                goto out;
        }

out:
        return err;
}

/**
 * ufshcd_hba_stop - Send controller to reset state
 * @hba: per adapter instance
 * @can_sleep: perform sleep or just spin
 */
static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
{
        int err;

        ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
        err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
                                        CONTROLLER_ENABLE, CONTROLLER_DISABLE,
                                        10, 1, can_sleep);
        if (err)
                dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
}

/**
 * ufshcd_hba_enable - initialize the controller
 * @hba: per adapter instance
 *
 * The controller resets itself and controller firmware initialization
 * sequence kicks off. When controller is ready it will set
 * the Host Controller Enable bit to 1.
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_hba_enable(struct ufs_hba *hba)
{
        int retry;

        /*
         * msleep of 1 and 5 used in this function might result in msleep(20),
         * but it was necessary to send the UFS FPGA to reset mode during
         * development and testing of this driver. msleep can be changed to
         * mdelay and retry count can be reduced based on the controller.
         */
        if (!ufshcd_is_hba_active(hba))
                /* change controller state to "reset state" */