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40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/delay.h>
43#include <linux/ctype.h>
44#include <linux/jiffies.h>
45#include <linux/slab.h>
46#include <linux/timer.h>
47
48#include "../comedi_pci.h"
49
50#include "jr3_pci.h"
51
52#define PCI_VENDOR_ID_JR3 0x1762
53
54enum jr3_pci_boardid {
55 BOARD_JR3_1,
56 BOARD_JR3_2,
57 BOARD_JR3_3,
58 BOARD_JR3_4,
59};
60
61struct jr3_pci_board {
62 const char *name;
63 int n_subdevs;
64};
65
66static const struct jr3_pci_board jr3_pci_boards[] = {
67 [BOARD_JR3_1] = {
68 .name = "jr3_pci_1",
69 .n_subdevs = 1,
70 },
71 [BOARD_JR3_2] = {
72 .name = "jr3_pci_2",
73 .n_subdevs = 2,
74 },
75 [BOARD_JR3_3] = {
76 .name = "jr3_pci_3",
77 .n_subdevs = 3,
78 },
79 [BOARD_JR3_4] = {
80 .name = "jr3_pci_4",
81 .n_subdevs = 4,
82 },
83};
84
85struct jr3_pci_transform {
86 struct {
87 u16 link_type;
88 s16 link_amount;
89 } link[8];
90};
91
92struct jr3_pci_poll_delay {
93 int min;
94 int max;
95};
96
97struct jr3_pci_dev_private {
98 struct jr3_t __iomem *iobase;
99 struct timer_list timer;
100};
101
102struct jr3_pci_subdev_private {
103 struct jr3_channel __iomem *channel;
104 unsigned long next_time_min;
105 unsigned long next_time_max;
106 enum { state_jr3_poll,
107 state_jr3_init_wait_for_offset,
108 state_jr3_init_transform_complete,
109 state_jr3_init_set_full_scale_complete,
110 state_jr3_init_use_offset_complete,
111 state_jr3_done
112 } state;
113 int serial_no;
114 int model_no;
115 struct {
116 int length;
117 struct comedi_krange range;
118 } range[9];
119 const struct comedi_lrange *range_table_list[8 * 7 + 2];
120 unsigned int maxdata_list[8 * 7 + 2];
121 u16 errors;
122 int retries;
123};
124
125static struct jr3_pci_poll_delay poll_delay_min_max(int min, int max)
126{
127 struct jr3_pci_poll_delay result;
128
129 result.min = min;
130 result.max = max;
131 return result;
132}
133
134static int is_complete(struct jr3_channel __iomem *channel)
135{
136 return get_s16(&channel->command_word0) == 0;
137}
138
139static void set_transforms(struct jr3_channel __iomem *channel,
140 struct jr3_pci_transform transf, short num)
141{
142 int i;
143
144 num &= 0x000f;
145 for (i = 0; i < 8; i++) {
146 set_u16(&channel->transforms[num].link[i].link_type,
147 transf.link[i].link_type);
148 udelay(1);
149 set_s16(&channel->transforms[num].link[i].link_amount,
150 transf.link[i].link_amount);
151 udelay(1);
152 if (transf.link[i].link_type == end_x_form)
153 break;
154 }
155}
156
157static void use_transform(struct jr3_channel __iomem *channel,
158 short transf_num)
159{
160 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f));
161}
162
163static void use_offset(struct jr3_channel __iomem *channel, short offset_num)
164{
165 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f));
166}
167
168static void set_offset(struct jr3_channel __iomem *channel)
169{
170 set_s16(&channel->command_word0, 0x0700);
171}
172
173struct six_axis_t {
174 s16 fx;
175 s16 fy;
176 s16 fz;
177 s16 mx;
178 s16 my;
179 s16 mz;
180};
181
182static void set_full_scales(struct jr3_channel __iomem *channel,
183 struct six_axis_t full_scale)
184{
185 set_s16(&channel->full_scale.fx, full_scale.fx);
186 set_s16(&channel->full_scale.fy, full_scale.fy);
187 set_s16(&channel->full_scale.fz, full_scale.fz);
188 set_s16(&channel->full_scale.mx, full_scale.mx);
189 set_s16(&channel->full_scale.my, full_scale.my);
190 set_s16(&channel->full_scale.mz, full_scale.mz);
191 set_s16(&channel->command_word0, 0x0a00);
192}
193
194static struct six_axis_t get_min_full_scales(struct jr3_channel __iomem
195 *channel)
196{
197 struct six_axis_t result;
198
199 result.fx = get_s16(&channel->min_full_scale.fx);
200 result.fy = get_s16(&channel->min_full_scale.fy);
201 result.fz = get_s16(&channel->min_full_scale.fz);
202 result.mx = get_s16(&channel->min_full_scale.mx);
203 result.my = get_s16(&channel->min_full_scale.my);
204 result.mz = get_s16(&channel->min_full_scale.mz);
205 return result;
206}
207
208static struct six_axis_t get_max_full_scales(struct jr3_channel __iomem
209 *channel)
210{
211 struct six_axis_t result;
212
213 result.fx = get_s16(&channel->max_full_scale.fx);
214 result.fy = get_s16(&channel->max_full_scale.fy);
215 result.fz = get_s16(&channel->max_full_scale.fz);
216 result.mx = get_s16(&channel->max_full_scale.mx);
217 result.my = get_s16(&channel->max_full_scale.my);
218 result.mz = get_s16(&channel->max_full_scale.mz);
219 return result;
220}
221
222static unsigned int jr3_pci_ai_read_chan(struct comedi_device *dev,
223 struct comedi_subdevice *s,
224 unsigned int chan)
225{
226 struct jr3_pci_subdev_private *spriv = s->private;
227 unsigned int val = 0;
228
229 if (spriv->state != state_jr3_done)
230 return 0;
231
232 if (chan < 56) {
233 unsigned int axis = chan % 8;
234 unsigned int filter = chan / 8;
235
236 switch (axis) {
237 case 0:
238 val = get_s16(&spriv->channel->filter[filter].fx);
239 break;
240 case 1:
241 val = get_s16(&spriv->channel->filter[filter].fy);
242 break;
243 case 2:
244 val = get_s16(&spriv->channel->filter[filter].fz);
245 break;
246 case 3:
247 val = get_s16(&spriv->channel->filter[filter].mx);
248 break;
249 case 4:
250 val = get_s16(&spriv->channel->filter[filter].my);
251 break;
252 case 5:
253 val = get_s16(&spriv->channel->filter[filter].mz);
254 break;
255 case 6:
256 val = get_s16(&spriv->channel->filter[filter].v1);
257 break;
258 case 7:
259 val = get_s16(&spriv->channel->filter[filter].v2);
260 break;
261 }
262 val += 0x4000;
263 } else if (chan == 56) {
264 val = get_u16(&spriv->channel->model_no);
265 } else if (chan == 57) {
266 val = get_u16(&spriv->channel->serial_no);
267 }
268
269 return val;
270}
271
272static int jr3_pci_ai_insn_read(struct comedi_device *dev,
273 struct comedi_subdevice *s,
274 struct comedi_insn *insn,
275 unsigned int *data)
276{
277 struct jr3_pci_subdev_private *spriv = s->private;
278 unsigned int chan = CR_CHAN(insn->chanspec);
279 u16 errors;
280 int i;
281
282 if (!spriv)
283 return -EINVAL;
284
285 errors = get_u16(&spriv->channel->errors);
286 if (spriv->state != state_jr3_done ||
287 (errors & (watch_dog | watch_dog2 | sensor_change))) {
288
289 if (spriv->state == state_jr3_done) {
290
291 spriv->state = state_jr3_poll;
292 }
293 return -EAGAIN;
294 }
295
296 for (i = 0; i < insn->n; i++)
297 data[i] = jr3_pci_ai_read_chan(dev, s, chan);
298
299 return insn->n;
300}
301
302static int jr3_pci_open(struct comedi_device *dev)
303{
304 struct jr3_pci_subdev_private *spriv;
305 struct comedi_subdevice *s;
306 int i;
307
308 dev_dbg(dev->class_dev, "jr3_pci_open\n");
309 for (i = 0; i < dev->n_subdevices; i++) {
310 s = &dev->subdevices[i];
311 spriv = s->private;
312 if (spriv)
313 dev_dbg(dev->class_dev, "serial: %p %d (%d)\n",
314 spriv, spriv->serial_no, s->index);
315 }
316 return 0;
317}
318
319static int read_idm_word(const u8 *data, size_t size, int *pos,
320 unsigned int *val)
321{
322 int result = 0;
323 int value;
324
325 if (pos && val) {
326
327 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++)
328 ;
329
330 *val = 0;
331 for (; *pos < size; (*pos)++) {
332 value = hex_to_bin(data[*pos]);
333 if (value >= 0) {
334 result = 1;
335 *val = (*val << 4) + value;
336 } else {
337 break;
338 }
339 }
340 }
341 return result;
342}
343
344static int jr3_check_firmware(struct comedi_device *dev,
345 const u8 *data, size_t size)
346{
347 int more = 1;
348 int pos = 0;
349
350
351
352
353
354
355 while (more) {
356 unsigned int count = 0;
357 unsigned int addr = 0;
358
359 more = more && read_idm_word(data, size, &pos, &count);
360 if (more && count == 0xffff)
361 return 0;
362
363 more = more && read_idm_word(data, size, &pos, &addr);
364 while (more && count > 0) {
365 unsigned int dummy = 0;
366
367 more = more && read_idm_word(data, size, &pos, &dummy);
368 count--;
369 }
370 }
371
372 return -ENODATA;
373}
374
375static void jr3_write_firmware(struct comedi_device *dev,
376 int subdev, const u8 *data, size_t size)
377{
378 struct jr3_pci_dev_private *devpriv = dev->private;
379 struct jr3_t __iomem *iobase = devpriv->iobase;
380 u32 __iomem *lo;
381 u32 __iomem *hi;
382 int more = 1;
383 int pos = 0;
384
385 while (more) {
386 unsigned int count = 0;
387 unsigned int addr = 0;
388
389 more = more && read_idm_word(data, size, &pos, &count);
390 if (more && count == 0xffff)
391 return;
392
393 more = more && read_idm_word(data, size, &pos, &addr);
394
395 dev_dbg(dev->class_dev, "Loading#%d %4.4x bytes at %4.4x\n",
396 subdev, count, addr);
397
398 while (more && count > 0) {
399 if (addr & 0x4000) {
400
401 unsigned int data1 = 0;
402
403 more = more &&
404 read_idm_word(data, size, &pos, &data1);
405 count--;
406
407 } else {
408
409 unsigned int data1 = 0;
410 unsigned int data2 = 0;
411
412 lo = &iobase->channel[subdev].program_lo[addr];
413 hi = &iobase->channel[subdev].program_hi[addr];
414
415 more = more &&
416 read_idm_word(data, size, &pos, &data1);
417 more = more &&
418 read_idm_word(data, size, &pos, &data2);
419 count -= 2;
420 if (more) {
421 set_u16(lo, data1);
422 udelay(1);
423 set_u16(hi, data2);
424 udelay(1);
425 }
426 }
427 addr++;
428 }
429 }
430}
431
432static int jr3_download_firmware(struct comedi_device *dev,
433 const u8 *data, size_t size,
434 unsigned long context)
435{
436 int subdev;
437 int ret;
438
439
440 ret = jr3_check_firmware(dev, data, size);
441 if (ret)
442 return ret;
443
444
445 for (subdev = 0; subdev < dev->n_subdevices; subdev++)
446 jr3_write_firmware(dev, subdev, data, size);
447
448 return 0;
449}
450
451static struct jr3_pci_poll_delay jr3_pci_poll_subdevice(struct comedi_subdevice *s)
452{
453 struct jr3_pci_subdev_private *spriv = s->private;
454 struct jr3_pci_poll_delay result = poll_delay_min_max(1000, 2000);
455 struct jr3_channel __iomem *channel;
456 u16 model_no;
457 u16 serial_no;
458 int errors;
459 int i;
460
461 if (!spriv)
462 return result;
463
464 channel = spriv->channel;
465 errors = get_u16(&channel->errors);
466
467 if (errors != spriv->errors)
468 spriv->errors = errors;
469
470
471 if (errors & (watch_dog | watch_dog2 | sensor_change))
472 spriv->state = state_jr3_poll;
473
474 switch (spriv->state) {
475 case state_jr3_poll:
476 model_no = get_u16(&channel->model_no);
477 serial_no = get_u16(&channel->serial_no);
478
479 if ((errors & (watch_dog | watch_dog2)) ||
480 model_no == 0 || serial_no == 0) {
481
482
483
484
485
486 } else {
487 spriv->retries = 0;
488 spriv->state = state_jr3_init_wait_for_offset;
489 }
490 break;
491 case state_jr3_init_wait_for_offset:
492 spriv->retries++;
493 if (spriv->retries < 10) {
494
495
496
497
498 } else {
499 struct jr3_pci_transform transf;
500
501 spriv->model_no = get_u16(&channel->model_no);
502 spriv->serial_no = get_u16(&channel->serial_no);
503
504
505 for (i = 0; i < ARRAY_SIZE(transf.link); i++) {
506 transf.link[i].link_type = (enum link_types)0;
507 transf.link[i].link_amount = 0;
508 }
509
510 set_transforms(channel, transf, 0);
511 use_transform(channel, 0);
512 spriv->state = state_jr3_init_transform_complete;
513
514 result = poll_delay_min_max(20, 100);
515 }
516 break;
517 case state_jr3_init_transform_complete:
518 if (!is_complete(channel)) {
519 result = poll_delay_min_max(20, 100);
520 } else {
521
522 struct six_axis_t min_full_scale;
523 struct six_axis_t max_full_scale;
524
525 min_full_scale = get_min_full_scales(channel);
526 max_full_scale = get_max_full_scales(channel);
527 set_full_scales(channel, max_full_scale);
528
529 spriv->state = state_jr3_init_set_full_scale_complete;
530
531 result = poll_delay_min_max(20, 100);
532 }
533 break;
534 case state_jr3_init_set_full_scale_complete:
535 if (!is_complete(channel)) {
536 result = poll_delay_min_max(20, 100);
537 } else {
538 struct force_array __iomem *fs = &channel->full_scale;
539
540
541 spriv->range[0].range.min = -get_s16(&fs->fx) * 1000;
542 spriv->range[0].range.max = get_s16(&fs->fx) * 1000;
543 spriv->range[1].range.min = -get_s16(&fs->fy) * 1000;
544 spriv->range[1].range.max = get_s16(&fs->fy) * 1000;
545 spriv->range[2].range.min = -get_s16(&fs->fz) * 1000;
546 spriv->range[2].range.max = get_s16(&fs->fz) * 1000;
547 spriv->range[3].range.min = -get_s16(&fs->mx) * 100;
548 spriv->range[3].range.max = get_s16(&fs->mx) * 100;
549 spriv->range[4].range.min = -get_s16(&fs->my) * 100;
550 spriv->range[4].range.max = get_s16(&fs->my) * 100;
551 spriv->range[5].range.min = -get_s16(&fs->mz) * 100;
552
553 spriv->range[5].range.max = get_s16(&fs->mz) * 100;
554 spriv->range[6].range.min = -get_s16(&fs->v1) * 100;
555 spriv->range[6].range.max = get_s16(&fs->v1) * 100;
556 spriv->range[7].range.min = -get_s16(&fs->v2) * 100;
557 spriv->range[7].range.max = get_s16(&fs->v2) * 100;
558 spriv->range[8].range.min = 0;
559 spriv->range[8].range.max = 65535;
560
561 use_offset(channel, 0);
562 spriv->state = state_jr3_init_use_offset_complete;
563
564 result = poll_delay_min_max(40, 100);
565 }
566 break;
567 case state_jr3_init_use_offset_complete:
568 if (!is_complete(channel)) {
569 result = poll_delay_min_max(20, 100);
570 } else {
571 set_s16(&channel->offsets.fx, 0);
572 set_s16(&channel->offsets.fy, 0);
573 set_s16(&channel->offsets.fz, 0);
574 set_s16(&channel->offsets.mx, 0);
575 set_s16(&channel->offsets.my, 0);
576 set_s16(&channel->offsets.mz, 0);
577
578 set_offset(channel);
579
580 spriv->state = state_jr3_done;
581 }
582 break;
583 case state_jr3_done:
584 result = poll_delay_min_max(10000, 20000);
585 break;
586 default:
587 break;
588 }
589
590 return result;
591}
592
593static void jr3_pci_poll_dev(unsigned long data)
594{
595 struct comedi_device *dev = (struct comedi_device *)data;
596 struct jr3_pci_dev_private *devpriv = dev->private;
597 struct jr3_pci_subdev_private *spriv;
598 struct comedi_subdevice *s;
599 unsigned long flags;
600 unsigned long now;
601 int delay;
602 int i;
603
604 spin_lock_irqsave(&dev->spinlock, flags);
605 delay = 1000;
606 now = jiffies;
607
608
609 for (i = 0; i < dev->n_subdevices; i++) {
610 s = &dev->subdevices[i];
611 spriv = s->private;
612
613 if (now > spriv->next_time_min) {
614 struct jr3_pci_poll_delay sub_delay;
615
616 sub_delay = jr3_pci_poll_subdevice(s);
617
618 spriv->next_time_min = jiffies +
619 msecs_to_jiffies(sub_delay.min);
620 spriv->next_time_max = jiffies +
621 msecs_to_jiffies(sub_delay.max);
622
623 if (sub_delay.max && sub_delay.max < delay)
624
625
626
627
628 delay = sub_delay.max;
629 }
630 }
631 spin_unlock_irqrestore(&dev->spinlock, flags);
632
633 devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
634 add_timer(&devpriv->timer);
635}
636
637static struct jr3_pci_subdev_private *
638jr3_pci_alloc_spriv(struct comedi_device *dev, struct comedi_subdevice *s)
639{
640 struct jr3_pci_dev_private *devpriv = dev->private;
641 struct jr3_pci_subdev_private *spriv;
642 int j;
643 int k;
644
645 spriv = comedi_alloc_spriv(s, sizeof(*spriv));
646 if (!spriv)
647 return NULL;
648
649 spriv->channel = &devpriv->iobase->channel[s->index].data;
650
651 for (j = 0; j < 8; j++) {
652 spriv->range[j].length = 1;
653 spriv->range[j].range.min = -1000000;
654 spriv->range[j].range.max = 1000000;
655
656 for (k = 0; k < 7; k++) {
657 spriv->range_table_list[j + k * 8] =
658 (struct comedi_lrange *)&spriv->range[j];
659 spriv->maxdata_list[j + k * 8] = 0x7fff;
660 }
661 }
662 spriv->range[8].length = 1;
663 spriv->range[8].range.min = 0;
664 spriv->range[8].range.max = 65536;
665
666 spriv->range_table_list[56] = (struct comedi_lrange *)&spriv->range[8];
667 spriv->range_table_list[57] = (struct comedi_lrange *)&spriv->range[8];
668 spriv->maxdata_list[56] = 0xffff;
669 spriv->maxdata_list[57] = 0xffff;
670
671 dev_dbg(dev->class_dev, "p->channel %p %p (%tx)\n",
672 spriv->channel, devpriv->iobase,
673 ((char __iomem *)spriv->channel -
674 (char __iomem *)devpriv->iobase));
675
676 return spriv;
677}
678
679static int jr3_pci_auto_attach(struct comedi_device *dev,
680 unsigned long context)
681{
682 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
683 static const struct jr3_pci_board *board;
684 struct jr3_pci_dev_private *devpriv;
685 struct jr3_pci_subdev_private *spriv;
686 struct comedi_subdevice *s;
687 int ret;
688 int i;
689
690 if (sizeof(struct jr3_channel) != 0xc00) {
691 dev_err(dev->class_dev,
692 "sizeof(struct jr3_channel) = %x [expected %x]\n",
693 (unsigned int)sizeof(struct jr3_channel), 0xc00);
694 return -EINVAL;
695 }
696
697 if (context < ARRAY_SIZE(jr3_pci_boards))
698 board = &jr3_pci_boards[context];
699 if (!board)
700 return -ENODEV;
701 dev->board_ptr = board;
702 dev->board_name = board->name;
703
704 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
705 if (!devpriv)
706 return -ENOMEM;
707
708 ret = comedi_pci_enable(dev);
709 if (ret)
710 return ret;
711
712 devpriv->iobase = pci_ioremap_bar(pcidev, 0);
713 if (!devpriv->iobase)
714 return -ENOMEM;
715
716 ret = comedi_alloc_subdevices(dev, board->n_subdevs);
717 if (ret)
718 return ret;
719
720 dev->open = jr3_pci_open;
721 for (i = 0; i < dev->n_subdevices; i++) {
722 s = &dev->subdevices[i];
723 s->type = COMEDI_SUBD_AI;
724 s->subdev_flags = SDF_READABLE | SDF_GROUND;
725 s->n_chan = 8 * 7 + 2;
726 s->insn_read = jr3_pci_ai_insn_read;
727
728 spriv = jr3_pci_alloc_spriv(dev, s);
729 if (spriv) {
730
731 s->range_table_list = spriv->range_table_list;
732 s->maxdata_list = spriv->maxdata_list;
733 }
734 }
735
736
737 writel(0, &devpriv->iobase->channel[0].reset);
738
739 ret = comedi_load_firmware(dev, &comedi_to_pci_dev(dev)->dev,
740 "comedi/jr3pci.idm",
741 jr3_download_firmware, 0);
742 dev_dbg(dev->class_dev, "Firmare load %d\n", ret);
743 if (ret < 0)
744 return ret;
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759 msleep_interruptible(25);
760 for (i = 0; i < 0x18; i++) {
761 dev_dbg(dev->class_dev, "%c\n",
762 get_u16(&devpriv->iobase->channel[0].
763 data.copyright[i]) >> 8);
764 }
765
766
767 for (i = 0; i < dev->n_subdevices; i++) {
768 s = &dev->subdevices[i];
769 spriv = s->private;
770
771 spriv->next_time_min = jiffies + msecs_to_jiffies(500);
772 spriv->next_time_max = jiffies + msecs_to_jiffies(2000);
773 }
774
775 setup_timer(&devpriv->timer, jr3_pci_poll_dev, (unsigned long)dev);
776 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
777 add_timer(&devpriv->timer);
778
779 return 0;
780}
781
782static void jr3_pci_detach(struct comedi_device *dev)
783{
784 struct jr3_pci_dev_private *devpriv = dev->private;
785
786 if (devpriv) {
787 del_timer_sync(&devpriv->timer);
788
789 if (devpriv->iobase)
790 iounmap(devpriv->iobase);
791 }
792 comedi_pci_disable(dev);
793}
794
795static struct comedi_driver jr3_pci_driver = {
796 .driver_name = "jr3_pci",
797 .module = THIS_MODULE,
798 .auto_attach = jr3_pci_auto_attach,
799 .detach = jr3_pci_detach,
800};
801
802static int jr3_pci_pci_probe(struct pci_dev *dev,
803 const struct pci_device_id *id)
804{
805 return comedi_pci_auto_config(dev, &jr3_pci_driver, id->driver_data);
806}
807
808static const struct pci_device_id jr3_pci_pci_table[] = {
809 { PCI_VDEVICE(JR3, 0x1111), BOARD_JR3_1 },
810 { PCI_VDEVICE(JR3, 0x3111), BOARD_JR3_1 },
811 { PCI_VDEVICE(JR3, 0x3112), BOARD_JR3_2 },
812 { PCI_VDEVICE(JR3, 0x3113), BOARD_JR3_3 },
813 { PCI_VDEVICE(JR3, 0x3114), BOARD_JR3_4 },
814 { 0 }
815};
816MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);
817
818static struct pci_driver jr3_pci_pci_driver = {
819 .name = "jr3_pci",
820 .id_table = jr3_pci_pci_table,
821 .probe = jr3_pci_pci_probe,
822 .remove = comedi_pci_auto_unconfig,
823};
824module_comedi_pci_driver(jr3_pci_driver, jr3_pci_pci_driver);
825
826MODULE_AUTHOR("Comedi http://www.comedi.org");
827MODULE_DESCRIPTION("Comedi low-level driver");
828MODULE_LICENSE("GPL");
829MODULE_FIRMWARE("comedi/jr3pci.idm");
830
