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23#ifndef COBALT_DRIVER_H
24#define COBALT_DRIVER_H
25
26#include <linux/module.h>
27#include <linux/pci.h>
28#include <linux/spinlock.h>
29#include <linux/i2c.h>
30#include <linux/list.h>
31#include <linux/workqueue.h>
32#include <linux/mutex.h>
33
34#include <media/v4l2-common.h>
35#include <media/v4l2-ioctl.h>
36#include <media/v4l2-device.h>
37#include <media/v4l2-fh.h>
38#include <media/videobuf2-v4l2.h>
39#include <media/videobuf2-dma-sg.h>
40
41#include "m00233_video_measure_memmap_package.h"
42#include "m00235_fdma_packer_memmap_package.h"
43#include "m00389_cvi_memmap_package.h"
44#include "m00460_evcnt_memmap_package.h"
45#include "m00473_freewheel_memmap_package.h"
46#include "m00479_clk_loss_detector_memmap_package.h"
47#include "m00514_syncgen_flow_evcnt_memmap_package.h"
48
49
50#define PCI_DEVICE_ID_COBALT 0x2732
51
52
53#define COBALT_NUM_INPUTS 4
54#define COBALT_NUM_NODES 6
55
56
57#define COBALT_NUM_STREAMS 12
58
59#define COBALT_HSMA_IN_NODE 4
60#define COBALT_HSMA_OUT_NODE 5
61
62
63#define COBALT_AUDIO_IN_STREAM 6
64#define COBALT_AUDIO_OUT_STREAM 11
65
66
67#define DMA_CHANNELS_MAX 16
68
69
70#define I2C_CLIENTS_MAX 16
71#define COBALT_NUM_ADAPTERS 5
72
73#define COBALT_CLK 50000000
74
75
76#define COBALT_SYSSTAT_DIP0_MSK (1 << 0)
77#define COBALT_SYSSTAT_DIP1_MSK (1 << 1)
78#define COBALT_SYSSTAT_HSMA_PRSNTN_MSK (1 << 2)
79#define COBALT_SYSSTAT_FLASH_RDYBSYN_MSK (1 << 3)
80#define COBALT_SYSSTAT_VI0_5V_MSK (1 << 4)
81#define COBALT_SYSSTAT_VI0_INT1_MSK (1 << 5)
82#define COBALT_SYSSTAT_VI0_INT2_MSK (1 << 6)
83#define COBALT_SYSSTAT_VI0_LOST_DATA_MSK (1 << 7)
84#define COBALT_SYSSTAT_VI1_5V_MSK (1 << 8)
85#define COBALT_SYSSTAT_VI1_INT1_MSK (1 << 9)
86#define COBALT_SYSSTAT_VI1_INT2_MSK (1 << 10)
87#define COBALT_SYSSTAT_VI1_LOST_DATA_MSK (1 << 11)
88#define COBALT_SYSSTAT_VI2_5V_MSK (1 << 12)
89#define COBALT_SYSSTAT_VI2_INT1_MSK (1 << 13)
90#define COBALT_SYSSTAT_VI2_INT2_MSK (1 << 14)
91#define COBALT_SYSSTAT_VI2_LOST_DATA_MSK (1 << 15)
92#define COBALT_SYSSTAT_VI3_5V_MSK (1 << 16)
93#define COBALT_SYSSTAT_VI3_INT1_MSK (1 << 17)
94#define COBALT_SYSSTAT_VI3_INT2_MSK (1 << 18)
95#define COBALT_SYSSTAT_VI3_LOST_DATA_MSK (1 << 19)
96#define COBALT_SYSSTAT_VIHSMA_5V_MSK (1 << 20)
97#define COBALT_SYSSTAT_VIHSMA_INT1_MSK (1 << 21)
98#define COBALT_SYSSTAT_VIHSMA_INT2_MSK (1 << 22)
99#define COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK (1 << 23)
100#define COBALT_SYSSTAT_VOHSMA_INT1_MSK (1 << 24)
101#define COBALT_SYSSTAT_VOHSMA_PLL_LOCKED_MSK (1 << 25)
102#define COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK (1 << 26)
103#define COBALT_SYSSTAT_AUD_PLL_LOCKED_MSK (1 << 28)
104#define COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK (1 << 29)
105#define COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK (1 << 30)
106#define COBALT_SYSSTAT_PCIE_SMBCLK_MSK (1 << 31)
107
108
109#define COBALT_I2C_0_BASE 0x0
110#define COBALT_I2C_1_BASE 0x080
111#define COBALT_I2C_2_BASE 0x100
112#define COBALT_I2C_3_BASE 0x180
113#define COBALT_I2C_HSMA_BASE 0x200
114
115#define COBALT_SYS_CTRL_BASE 0x400
116#define COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT 1
117#define COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(n) (4 + 4 * (n))
118#define COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(n) (5 + 4 * (n))
119#define COBALT_SYS_CTRL_HPD_TO_CONNECTOR_BIT(n) (6 + 4 * (n))
120#define COBALT_SYS_CTRL_AUDIO_IPP_RESETN_BIT(n) (7 + 4 * (n))
121#define COBALT_SYS_CTRL_PWRDN0_TO_HSMA_TX_BIT 24
122#define COBALT_SYS_CTRL_VIDEO_TX_RESETN_BIT 25
123#define COBALT_SYS_CTRL_AUDIO_OPP_RESETN_BIT 27
124
125#define COBALT_SYS_STAT_BASE 0x500
126#define COBALT_SYS_STAT_MASK (COBALT_SYS_STAT_BASE + 0x08)
127#define COBALT_SYS_STAT_EDGE (COBALT_SYS_STAT_BASE + 0x0c)
128
129#define COBALT_HDL_INFO_BASE 0x4800
130#define COBALT_HDL_INFO_SIZE 0x200
131
132#define COBALT_VID_BASE 0x10000
133#define COBALT_VID_SIZE 0x1000
134
135#define COBALT_CVI(cobalt, c) \
136 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE)
137#define COBALT_CVI_VMR(cobalt, c) \
138 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x100)
139#define COBALT_CVI_EVCNT(cobalt, c) \
140 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x200)
141#define COBALT_CVI_FREEWHEEL(cobalt, c) \
142 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x300)
143#define COBALT_CVI_CLK_LOSS(cobalt, c) \
144 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x400)
145#define COBALT_CVI_PACKER(cobalt, c) \
146 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x500)
147
148#define COBALT_TX_BASE(cobalt) (cobalt->bar1 + COBALT_VID_BASE + 0x5000)
149
150#define DMA_INTERRUPT_STATUS_REG 0x08
151
152#define COBALT_HDL_SEARCH_STR "** HDL version info **"
153
154
155#define COBALT_BUS_BAR1_BASE 0x600
156#define COBALT_BUS_SRAM_BASE 0x0
157#define COBALT_BUS_CPLD_BASE 0x00600000
158#define COBALT_BUS_FLASH_BASE 0x08000000
159
160
161#define COBALT_BYTES_PER_PIXEL_YUYV 2
162#define COBALT_BYTES_PER_PIXEL_RGB24 3
163#define COBALT_BYTES_PER_PIXEL_RGB32 4
164
165
166extern int cobalt_debug;
167extern int cobalt_ignore_err;
168
169#define cobalt_err(fmt, arg...) v4l2_err(&cobalt->v4l2_dev, fmt, ## arg)
170#define cobalt_warn(fmt, arg...) v4l2_warn(&cobalt->v4l2_dev, fmt, ## arg)
171#define cobalt_info(fmt, arg...) v4l2_info(&cobalt->v4l2_dev, fmt, ## arg)
172#define cobalt_dbg(level, fmt, arg...) \
173 v4l2_dbg(level, cobalt_debug, &cobalt->v4l2_dev, fmt, ## arg)
174
175struct cobalt;
176struct cobalt_i2c_regs;
177
178
179struct cobalt_i2c_data {
180 struct cobalt *cobalt;
181 struct cobalt_i2c_regs __iomem *regs;
182};
183
184struct pci_consistent_buffer {
185 void *virt;
186 dma_addr_t bus;
187 size_t bytes;
188};
189
190struct sg_dma_desc_info {
191 void *virt;
192 dma_addr_t bus;
193 unsigned size;
194 void *last_desc_virt;
195 struct device *dev;
196};
197
198#define COBALT_MAX_WIDTH 1920
199#define COBALT_MAX_HEIGHT 1200
200#define COBALT_MAX_BPP 3
201#define COBALT_MAX_FRAMESZ \
202 (COBALT_MAX_WIDTH * COBALT_MAX_HEIGHT * COBALT_MAX_BPP)
203
204#define NR_BUFS VIDEO_MAX_FRAME
205
206#define COBALT_STREAM_FL_DMA_IRQ 0
207#define COBALT_STREAM_FL_ADV_IRQ 1
208
209struct cobalt_buffer {
210 struct vb2_v4l2_buffer vb;
211 struct list_head list;
212};
213
214static inline
215struct cobalt_buffer *to_cobalt_buffer(struct vb2_v4l2_buffer *vb2)
216{
217 return container_of(vb2, struct cobalt_buffer, vb);
218}
219
220struct cobalt_stream {
221 struct video_device vdev;
222 struct vb2_queue q;
223 struct list_head bufs;
224 struct i2c_adapter *i2c_adap;
225 struct v4l2_subdev *sd;
226 struct mutex lock;
227 spinlock_t irqlock;
228 struct v4l2_dv_timings timings;
229 u32 input;
230 u32 pad_source;
231 u32 width, height, bpp;
232 u32 stride;
233 u32 pixfmt;
234 u32 sequence;
235 u32 colorspace;
236 u32 xfer_func;
237 u32 ycbcr_enc;
238 u32 quantization;
239
240 u8 dma_channel;
241 int video_channel;
242 unsigned dma_fifo_mask;
243 unsigned adv_irq_mask;
244 struct sg_dma_desc_info dma_desc_info[NR_BUFS];
245 unsigned long flags;
246 bool unstable_frame;
247 bool enable_cvi;
248 bool enable_freewheel;
249 unsigned skip_first_frames;
250 bool is_output;
251 bool is_audio;
252 bool is_dummy;
253
254 struct cobalt *cobalt;
255 struct snd_cobalt_card *alsa;
256};
257
258struct snd_cobalt_card;
259
260
261struct cobalt {
262 int instance;
263 struct pci_dev *pci_dev;
264 struct v4l2_device v4l2_dev;
265
266 void __iomem *bar0, *bar1;
267
268 u8 card_rev;
269 u16 device_id;
270
271
272 struct cobalt_stream streams[DMA_CHANNELS_MAX];
273 struct i2c_adapter i2c_adap[COBALT_NUM_ADAPTERS];
274 struct cobalt_i2c_data i2c_data[COBALT_NUM_ADAPTERS];
275 bool have_hsma_rx;
276 bool have_hsma_tx;
277
278
279 struct workqueue_struct *irq_work_queues;
280 struct work_struct irq_work_queue;
281
282 u32 irq_adv1;
283 u32 irq_adv2;
284 u32 irq_advout;
285 u32 irq_dma_tot;
286 u32 irq_dma[COBALT_NUM_STREAMS];
287 u32 irq_none;
288 u32 irq_full_fifo;
289
290 bool msi_enabled;
291
292
293 int dma_channels;
294 int first_fifo_channel;
295 bool pci_32_bit;
296
297 char hdl_info[COBALT_HDL_INFO_SIZE];
298
299
300 struct mtd_info *mtd;
301};
302
303static inline struct cobalt *to_cobalt(struct v4l2_device *v4l2_dev)
304{
305 return container_of(v4l2_dev, struct cobalt, v4l2_dev);
306}
307
308static inline void cobalt_write_bar0(struct cobalt *cobalt, u32 reg, u32 val)
309{
310 iowrite32(val, cobalt->bar0 + reg);
311}
312
313static inline u32 cobalt_read_bar0(struct cobalt *cobalt, u32 reg)
314{
315 return ioread32(cobalt->bar0 + reg);
316}
317
318static inline void cobalt_write_bar1(struct cobalt *cobalt, u32 reg, u32 val)
319{
320 iowrite32(val, cobalt->bar1 + reg);
321}
322
323static inline u32 cobalt_read_bar1(struct cobalt *cobalt, u32 reg)
324{
325 return ioread32(cobalt->bar1 + reg);
326}
327
328static inline u32 cobalt_g_sysctrl(struct cobalt *cobalt)
329{
330 return cobalt_read_bar1(cobalt, COBALT_SYS_CTRL_BASE);
331}
332
333static inline void cobalt_s_bit_sysctrl(struct cobalt *cobalt,
334 int bit, int val)
335{
336 u32 ctrl = cobalt_read_bar1(cobalt, COBALT_SYS_CTRL_BASE);
337
338 cobalt_write_bar1(cobalt, COBALT_SYS_CTRL_BASE,
339 (ctrl & ~(1UL << bit)) | (val << bit));
340}
341
342static inline u32 cobalt_g_sysstat(struct cobalt *cobalt)
343{
344 return cobalt_read_bar1(cobalt, COBALT_SYS_STAT_BASE);
345}
346
347#define ADRS_REG (bar1 + COBALT_BUS_BAR1_BASE + 0)
348#define LOWER_DATA (bar1 + COBALT_BUS_BAR1_BASE + 4)
349#define UPPER_DATA (bar1 + COBALT_BUS_BAR1_BASE + 6)
350
351static inline u32 cobalt_bus_read32(void __iomem *bar1, u32 bus_adrs)
352{
353 iowrite32(bus_adrs, ADRS_REG);
354 return ioread32(LOWER_DATA);
355}
356
357static inline void cobalt_bus_write16(void __iomem *bar1,
358 u32 bus_adrs, u16 data)
359{
360 iowrite32(bus_adrs, ADRS_REG);
361 if (bus_adrs & 2)
362 iowrite16(data, UPPER_DATA);
363 else
364 iowrite16(data, LOWER_DATA);
365}
366
367static inline void cobalt_bus_write32(void __iomem *bar1,
368 u32 bus_adrs, u16 data)
369{
370 iowrite32(bus_adrs, ADRS_REG);
371 if (bus_adrs & 2)
372 iowrite32(data, UPPER_DATA);
373 else
374 iowrite32(data, LOWER_DATA);
375}
376
377
378
379void cobalt_pcie_status_show(struct cobalt *cobalt);
380
381#endif
382
