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10#ifndef R592_H
11
12#include <linux/memstick.h>
13#include <linux/spinlock.h>
14#include <linux/interrupt.h>
15#include <linux/workqueue.h>
16#include <linux/kfifo.h>
17#include <linux/ctype.h>
18
19
20#define R592_TPC_EXEC 0x00
21#define R592_TPC_EXEC_LEN_SHIFT 16
22#define R592_TPC_EXEC_BIG_FIFO (1 << 26)
23#define R592_TPC_EXEC_TPC_SHIFT 28
24
25
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27
28
29#define R592_SFIFO 0x08
30
31
32
33#define R592_STATUS 0x10
34
35#define R592_STATUS_P_CMDNACK (1 << 16)
36#define R592_STATUS_P_BREQ (1 << 17)
37#define R592_STATUS_P_INTERR (1 << 18)
38#define R592_STATUS_P_CED (1 << 19)
39
40
41#define R592_STATUS_SFIFO_FULL (1 << 20)
42#define R592_STATUS_SFIFO_EMPTY (1 << 21)
43
44
45#define R592_STATUS_SEND_ERR (1 << 24)
46#define R592_STATUS_RECV_ERR (1 << 25)
47
48
49#define R592_STATUS_RDY (1 << 28)
50#define R592_STATUS_CED (1 << 29)
51#define R592_STATUS_SFIFO_INPUT (1 << 30)
52
53#define R592_SFIFO_SIZE 32
54#define R592_SFIFO_PACKET 8
55
56
57#define R592_IO 0x18
58#define R592_IO_16 (1 << 16)
59#define R592_IO_18 (1 << 18)
60#define R592_IO_SERIAL1 (1 << 20)
61#define R592_IO_22 (1 << 22)
62#define R592_IO_DIRECTION (1 << 24)
63#define R592_IO_26 (1 << 26)
64#define R592_IO_SERIAL2 (1 << 30)
65#define R592_IO_RESET (1 << 31)
66
67
68
69#define R592_POWER 0x20
70#define R592_POWER_0 (1 << 0)
71#define R592_POWER_1 (1 << 1)
72#define R592_POWER_3 (1 << 3)
73#define R592_POWER_20 (1 << 5)
74
75
76#define R592_IO_MODE 0x24
77#define R592_IO_MODE_SERIAL 1
78#define R592_IO_MODE_PARALLEL 3
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80
81
82
83#define R592_REG_MSC 0x28
84#define R592_REG_MSC_PRSNT (1 << 1)
85#define R592_REG_MSC_IRQ_INSERT (1 << 8)
86#define R592_REG_MSC_IRQ_REMOVE (1 << 9)
87#define R592_REG_MSC_FIFO_EMPTY (1 << 10)
88#define R592_REG_MSC_FIFO_DMA_DONE (1 << 11)
89
90#define R592_REG_MSC_FIFO_USER_ORN (1 << 12)
91#define R592_REG_MSC_FIFO_MISMATH (1 << 13)
92#define R592_REG_MSC_FIFO_DMA_ERR (1 << 14)
93#define R592_REG_MSC_LED (1 << 15)
94
95#define DMA_IRQ_ACK_MASK \
96 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)
97
98#define DMA_IRQ_EN_MASK (DMA_IRQ_ACK_MASK << 16)
99
100#define IRQ_ALL_ACK_MASK 0x00007F00
101#define IRQ_ALL_EN_MASK (IRQ_ALL_ACK_MASK << 16)
102
103
104#define R592_FIFO_DMA 0x2C
105
106
107#define R592_FIFO_PIO 0x30
108#define R592_LFIFO_SIZE 512
109
110
111
112#define R592_FIFO_DMA_SETTINGS 0x34
113#define R592_FIFO_DMA_SETTINGS_EN (1 << 0)
114#define R592_FIFO_DMA_SETTINGS_DIR (1 << 1)
115#define R592_FIFO_DMA_SETTINGS_CAP (1 << 24)
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121
122
123#define R592_REG38 0x38
124#define R592_REG38_CHANGE (1 << 16)
125#define R592_REG38_DONE (1 << 20)
126#define R592_REG38_SHIFT 17
127
128
129#define R592_REG_3C 0x3C
130
131struct r592_device {
132 struct pci_dev *pci_dev;
133 struct memstick_host *host;
134 struct memstick_request *req;
135
136
137 void __iomem *mmio;
138 int irq;
139 spinlock_t irq_lock;
140 spinlock_t io_thread_lock;
141 struct timer_list detect_timer;
142
143 struct task_struct *io_thread;
144 bool parallel_mode;
145
146 DECLARE_KFIFO(pio_fifo, u8, sizeof(u32));
147
148
149 int dma_capable;
150 int dma_error;
151 struct completion dma_done;
152 void *dummy_dma_page;
153 dma_addr_t dummy_dma_page_physical_address;
154
155};
156
157#define DRV_NAME "r592"
158
159
160#define message(format, ...) \
161 printk(KERN_INFO DRV_NAME ": " format "\n", ## __VA_ARGS__)
162
163#define __dbg(level, format, ...) \
164 do { \
165 if (debug >= level) \
166 printk(KERN_DEBUG DRV_NAME \
167 ": " format "\n", ## __VA_ARGS__); \
168 } while (0)
169
170
171#define dbg(format, ...) __dbg(1, format, ## __VA_ARGS__)
172#define dbg_verbose(format, ...) __dbg(2, format, ## __VA_ARGS__)
173#define dbg_reg(format, ...) __dbg(3, format, ## __VA_ARGS__)
174
175#endif
176