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30#include "ixgbe.h"
31#include "ixgbe_type.h"
32#include "ixgbe_dcb.h"
33#include "ixgbe_dcb_82598.h"
34#include "ixgbe_dcb_82599.h"
35
36
37
38
39
40
41
42
43static s32 ixgbe_ieee_credits(__u8 *bw, __u16 *refill,
44 __u16 *max, int max_frame)
45{
46 int min_percent = 100;
47 int min_credit, multiplier;
48 int i;
49
50 min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) /
51 DCB_CREDIT_QUANTUM;
52
53 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
54 if (bw[i] < min_percent && bw[i])
55 min_percent = bw[i];
56 }
57
58 multiplier = (min_credit / min_percent) + 1;
59
60
61 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
62 int val = min(bw[i] * multiplier, MAX_CREDIT_REFILL);
63
64 if (val < min_credit)
65 val = min_credit;
66 refill[i] = val;
67
68 max[i] = bw[i] ? (bw[i] * MAX_CREDIT)/100 : min_credit;
69 }
70 return 0;
71}
72
73
74
75
76
77
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80
81
82s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_hw *hw,
83 struct ixgbe_dcb_config *dcb_config,
84 int max_frame, u8 direction)
85{
86 struct tc_bw_alloc *p;
87 int min_credit;
88 int min_multiplier;
89 int min_percent = 100;
90
91 u32 credit_refill = 0;
92 u32 credit_max = 0;
93 u16 link_percentage = 0;
94 u8 bw_percent = 0;
95 u8 i;
96
97 if (!dcb_config)
98 return DCB_ERR_CONFIG;
99
100 min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) /
101 DCB_CREDIT_QUANTUM;
102
103
104 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
105 p = &dcb_config->tc_config[i].path[direction];
106 bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
107 link_percentage = p->bwg_percent;
108
109 link_percentage = (link_percentage * bw_percent) / 100;
110
111 if (link_percentage && link_percentage < min_percent)
112 min_percent = link_percentage;
113 }
114
115
116
117
118
119
120
121
122
123 min_multiplier = (min_credit / min_percent) + 1;
124
125
126 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
127 p = &dcb_config->tc_config[i].path[direction];
128 bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
129
130 link_percentage = p->bwg_percent;
131
132 link_percentage = (link_percentage * bw_percent) / 100;
133 if (p->bwg_percent > 0 && link_percentage == 0)
134 link_percentage = 1;
135
136
137 p->link_percent = (u8)link_percentage;
138
139
140 credit_refill = min(link_percentage * min_multiplier,
141 MAX_CREDIT_REFILL);
142
143
144 if (credit_refill < min_credit)
145 credit_refill = min_credit;
146
147 p->data_credits_refill = (u16)credit_refill;
148
149
150 credit_max = (link_percentage * MAX_CREDIT) / 100;
151
152
153
154
155
156
157 if (credit_max < min_credit)
158 credit_max = min_credit;
159
160 if (direction == DCB_TX_CONFIG) {
161
162
163
164
165
166
167 if ((hw->mac.type == ixgbe_mac_82598EB) &&
168 credit_max &&
169 (credit_max < MINIMUM_CREDIT_FOR_TSO))
170 credit_max = MINIMUM_CREDIT_FOR_TSO;
171
172 dcb_config->tc_config[i].desc_credits_max =
173 (u16)credit_max;
174 }
175
176 p->data_credits_max = (u16)credit_max;
177 }
178
179 return 0;
180}
181
182void ixgbe_dcb_unpack_pfc(struct ixgbe_dcb_config *cfg, u8 *pfc_en)
183{
184 struct tc_configuration *tc_config = &cfg->tc_config[0];
185 int tc;
186
187 for (*pfc_en = 0, tc = 0; tc < MAX_TRAFFIC_CLASS; tc++) {
188 if (tc_config[tc].dcb_pfc != pfc_disabled)
189 *pfc_en |= BIT(tc);
190 }
191}
192
193void ixgbe_dcb_unpack_refill(struct ixgbe_dcb_config *cfg, int direction,
194 u16 *refill)
195{
196 struct tc_configuration *tc_config = &cfg->tc_config[0];
197 int tc;
198
199 for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
200 refill[tc] = tc_config[tc].path[direction].data_credits_refill;
201}
202
203void ixgbe_dcb_unpack_max(struct ixgbe_dcb_config *cfg, u16 *max)
204{
205 struct tc_configuration *tc_config = &cfg->tc_config[0];
206 int tc;
207
208 for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
209 max[tc] = tc_config[tc].desc_credits_max;
210}
211
212void ixgbe_dcb_unpack_bwgid(struct ixgbe_dcb_config *cfg, int direction,
213 u8 *bwgid)
214{
215 struct tc_configuration *tc_config = &cfg->tc_config[0];
216 int tc;
217
218 for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
219 bwgid[tc] = tc_config[tc].path[direction].bwg_id;
220}
221
222void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *cfg, int direction,
223 u8 *ptype)
224{
225 struct tc_configuration *tc_config = &cfg->tc_config[0];
226 int tc;
227
228 for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
229 ptype[tc] = tc_config[tc].path[direction].prio_type;
230}
231
232u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up)
233{
234 struct tc_configuration *tc_config = &cfg->tc_config[0];
235 u8 prio_mask = BIT(up);
236 u8 tc = cfg->num_tcs.pg_tcs;
237
238
239 if (!tc)
240 return 0;
241
242
243
244
245
246
247 for (tc--; tc; tc--) {
248 if (prio_mask & tc_config[tc].path[direction].up_to_tc_bitmap)
249 break;
250 }
251
252 return tc;
253}
254
255void ixgbe_dcb_unpack_map(struct ixgbe_dcb_config *cfg, int direction, u8 *map)
256{
257 u8 up;
258
259 for (up = 0; up < MAX_USER_PRIORITY; up++)
260 map[up] = ixgbe_dcb_get_tc_from_up(cfg, direction, up);
261}
262
263
264
265
266
267
268
269
270s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw,
271 struct ixgbe_dcb_config *dcb_config)
272{
273 u8 pfc_en;
274 u8 ptype[MAX_TRAFFIC_CLASS];
275 u8 bwgid[MAX_TRAFFIC_CLASS];
276 u8 prio_tc[MAX_TRAFFIC_CLASS];
277 u16 refill[MAX_TRAFFIC_CLASS];
278 u16 max[MAX_TRAFFIC_CLASS];
279
280
281 ixgbe_dcb_unpack_pfc(dcb_config, &pfc_en);
282 ixgbe_dcb_unpack_refill(dcb_config, DCB_TX_CONFIG, refill);
283 ixgbe_dcb_unpack_max(dcb_config, max);
284 ixgbe_dcb_unpack_bwgid(dcb_config, DCB_TX_CONFIG, bwgid);
285 ixgbe_dcb_unpack_prio(dcb_config, DCB_TX_CONFIG, ptype);
286 ixgbe_dcb_unpack_map(dcb_config, DCB_TX_CONFIG, prio_tc);
287
288 switch (hw->mac.type) {
289 case ixgbe_mac_82598EB:
290 return ixgbe_dcb_hw_config_82598(hw, pfc_en, refill, max,
291 bwgid, ptype);
292 case ixgbe_mac_82599EB:
293 case ixgbe_mac_X540:
294 case ixgbe_mac_X550:
295 case ixgbe_mac_X550EM_x:
296 case ixgbe_mac_x550em_a:
297 return ixgbe_dcb_hw_config_82599(hw, pfc_en, refill, max,
298 bwgid, ptype, prio_tc);
299 default:
300 break;
301 }
302 return 0;
303}
304
305
306s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc)
307{
308 switch (hw->mac.type) {
309 case ixgbe_mac_82598EB:
310 return ixgbe_dcb_config_pfc_82598(hw, pfc_en);
311 case ixgbe_mac_82599EB:
312 case ixgbe_mac_X540:
313 case ixgbe_mac_X550:
314 case ixgbe_mac_X550EM_x:
315 case ixgbe_mac_x550em_a:
316 return ixgbe_dcb_config_pfc_82599(hw, pfc_en, prio_tc);
317 default:
318 break;
319 }
320 return -EINVAL;
321}
322
323s32 ixgbe_dcb_hw_ets(struct ixgbe_hw *hw, struct ieee_ets *ets, int max_frame)
324{
325 __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
326 __u8 prio_type[IEEE_8021QAZ_MAX_TCS];
327 int i;
328
329
330 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
331
332
333 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
334 switch (ets->tc_tsa[i]) {
335 case IEEE_8021QAZ_TSA_STRICT:
336 prio_type[i] = 2;
337 break;
338 case IEEE_8021QAZ_TSA_ETS:
339 prio_type[i] = 0;
340 break;
341 default:
342
343
344
345
346
347 return -EINVAL;
348 }
349 }
350
351 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
352 return ixgbe_dcb_hw_ets_config(hw, refill, max,
353 bwg_id, prio_type, ets->prio_tc);
354}
355
356s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw,
357 u16 *refill, u16 *max, u8 *bwg_id,
358 u8 *prio_type, u8 *prio_tc)
359{
360 switch (hw->mac.type) {
361 case ixgbe_mac_82598EB:
362 ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max,
363 prio_type);
364 ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max,
365 bwg_id, prio_type);
366 ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max,
367 bwg_id, prio_type);
368 break;
369 case ixgbe_mac_82599EB:
370 case ixgbe_mac_X540:
371 case ixgbe_mac_X550:
372 case ixgbe_mac_X550EM_x:
373 case ixgbe_mac_x550em_a:
374 ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max,
375 bwg_id, prio_type, prio_tc);
376 ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
377 bwg_id, prio_type);
378 ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id,
379 prio_type, prio_tc);
380 break;
381 default:
382 break;
383 }
384 return 0;
385}
386
387static void ixgbe_dcb_read_rtrup2tc_82599(struct ixgbe_hw *hw, u8 *map)
388{
389 u32 reg, i;
390
391 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
392 for (i = 0; i < MAX_USER_PRIORITY; i++)
393 map[i] = IXGBE_RTRUP2TC_UP_MASK &
394 (reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT));
395}
396
397void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
398{
399 switch (hw->mac.type) {
400 case ixgbe_mac_82599EB:
401 case ixgbe_mac_X540:
402 case ixgbe_mac_X550:
403 case ixgbe_mac_X550EM_x:
404 case ixgbe_mac_x550em_a:
405 ixgbe_dcb_read_rtrup2tc_82599(hw, map);
406 break;
407 default:
408 break;
409 }
410}
411