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20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
39
40static int
41mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
42 size_t size, int flags)
43{
44 struct pcie_service_card *card = adapter->card;
45 struct mwifiex_dma_mapping mapping;
46
47 mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
48 if (pci_dma_mapping_error(card->dev, mapping.addr)) {
49 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
50 return -1;
51 }
52 mapping.len = size;
53 mwifiex_store_mapping(skb, &mapping);
54 return 0;
55}
56
57static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
58 struct sk_buff *skb, int flags)
59{
60 struct pcie_service_card *card = adapter->card;
61 struct mwifiex_dma_mapping mapping;
62
63 mwifiex_get_mapping(skb, &mapping);
64 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
65}
66
67
68
69
70static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
71{
72 u32 *cookie_addr;
73 struct pcie_service_card *card = adapter->card;
74 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
75
76 if (!reg->sleep_cookie)
77 return true;
78
79 if (card->sleep_cookie_vbase) {
80 cookie_addr = (u32 *)card->sleep_cookie_vbase;
81 mwifiex_dbg(adapter, INFO,
82 "info: ACCESS_HW: sleep cookie=0x%x\n",
83 *cookie_addr);
84 if (*cookie_addr == FW_AWAKE_COOKIE)
85 return true;
86 }
87
88 return false;
89}
90
91#ifdef CONFIG_PM_SLEEP
92
93
94
95
96
97
98
99
100static int mwifiex_pcie_suspend(struct device *dev)
101{
102 struct mwifiex_adapter *adapter;
103 struct pcie_service_card *card;
104 int hs_actived;
105 struct pci_dev *pdev = to_pci_dev(dev);
106
107 if (pdev) {
108 card = pci_get_drvdata(pdev);
109 if (!card || !card->adapter) {
110 pr_err("Card or adapter structure is not valid\n");
111 return 0;
112 }
113 } else {
114 pr_err("PCIE device is not specified\n");
115 return 0;
116 }
117
118 adapter = card->adapter;
119
120 hs_actived = mwifiex_enable_hs(adapter);
121
122
123 adapter->is_suspended = true;
124 adapter->hs_enabling = false;
125
126 return 0;
127}
128
129
130
131
132
133
134
135
136
137static int mwifiex_pcie_resume(struct device *dev)
138{
139 struct mwifiex_adapter *adapter;
140 struct pcie_service_card *card;
141 struct pci_dev *pdev = to_pci_dev(dev);
142
143 if (pdev) {
144 card = pci_get_drvdata(pdev);
145 if (!card || !card->adapter) {
146 pr_err("Card or adapter structure is not valid\n");
147 return 0;
148 }
149 } else {
150 pr_err("PCIE device is not specified\n");
151 return 0;
152 }
153
154 adapter = card->adapter;
155
156 if (!adapter->is_suspended) {
157 mwifiex_dbg(adapter, WARN,
158 "Device already resumed\n");
159 return 0;
160 }
161
162 adapter->is_suspended = false;
163
164 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
165 MWIFIEX_ASYNC_CMD);
166
167 return 0;
168}
169#endif
170
171
172
173
174
175
176
177static int mwifiex_pcie_probe(struct pci_dev *pdev,
178 const struct pci_device_id *ent)
179{
180 struct pcie_service_card *card;
181
182 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
183 pdev->vendor, pdev->device, pdev->revision);
184
185 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
186 if (!card)
187 return -ENOMEM;
188
189 card->dev = pdev;
190
191 if (ent->driver_data) {
192 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
193 card->pcie.reg = data->reg;
194 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
195 card->pcie.tx_buf_size = data->tx_buf_size;
196 card->pcie.can_dump_fw = data->can_dump_fw;
197 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
198 card->pcie.num_mem_types = data->num_mem_types;
199 card->pcie.can_ext_scan = data->can_ext_scan;
200 }
201
202 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
203 MWIFIEX_PCIE)) {
204 pr_err("%s failed\n", __func__);
205 return -1;
206 }
207
208 return 0;
209}
210
211
212
213
214static void mwifiex_pcie_remove(struct pci_dev *pdev)
215{
216 struct pcie_service_card *card;
217 struct mwifiex_adapter *adapter;
218 struct mwifiex_private *priv;
219
220 card = pci_get_drvdata(pdev);
221 if (!card)
222 return;
223
224 adapter = card->adapter;
225 if (!adapter || !adapter->priv_num)
226 return;
227
228 if (user_rmmod && !adapter->mfg_mode) {
229#ifdef CONFIG_PM_SLEEP
230 if (adapter->is_suspended)
231 mwifiex_pcie_resume(&pdev->dev);
232#endif
233
234 mwifiex_deauthenticate_all(adapter);
235
236 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
237
238 mwifiex_disable_auto_ds(priv);
239
240 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
241 }
242
243 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
244}
245
246static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
247{
248 user_rmmod = 1;
249 mwifiex_pcie_remove(pdev);
250
251 return;
252}
253
254static const struct pci_device_id mwifiex_ids[] = {
255 {
256 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
257 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
258 .driver_data = (unsigned long)&mwifiex_pcie8766,
259 },
260 {
261 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
263 .driver_data = (unsigned long)&mwifiex_pcie8897,
264 },
265 {
266 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
267 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
268 .driver_data = (unsigned long)&mwifiex_pcie8997,
269 },
270 {
271 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
273 .driver_data = (unsigned long)&mwifiex_pcie8997,
274 },
275 {},
276};
277
278MODULE_DEVICE_TABLE(pci, mwifiex_ids);
279
280static void mwifiex_pcie_reset_notify(struct pci_dev *pdev, bool prepare)
281{
282 struct mwifiex_adapter *adapter;
283 struct pcie_service_card *card;
284
285 if (!pdev) {
286 pr_err("%s: PCIe device is not specified\n", __func__);
287 return;
288 }
289
290 card = (struct pcie_service_card *)pci_get_drvdata(pdev);
291 if (!card || !card->adapter) {
292 pr_err("%s: Card or adapter structure is not valid (%ld)\n",
293 __func__, (long)card);
294 return;
295 }
296
297 adapter = card->adapter;
298 mwifiex_dbg(adapter, INFO,
299 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d %s\n",
300 __func__, pdev->vendor, pdev->device,
301 pdev->revision,
302 prepare ? "Pre-FLR" : "Post-FLR");
303
304 if (prepare) {
305
306
307
308
309 mwifiex_do_flr(adapter, prepare);
310 adapter->surprise_removed = true;
311 } else {
312
313
314
315
316 adapter->surprise_removed = false;
317 mwifiex_do_flr(adapter, prepare);
318 }
319 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
320}
321
322static const struct pci_error_handlers mwifiex_pcie_err_handler[] = {
323 { .reset_notify = mwifiex_pcie_reset_notify, },
324};
325
326#ifdef CONFIG_PM_SLEEP
327
328static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
329 mwifiex_pcie_resume);
330#endif
331
332
333static struct pci_driver __refdata mwifiex_pcie = {
334 .name = "mwifiex_pcie",
335 .id_table = mwifiex_ids,
336 .probe = mwifiex_pcie_probe,
337 .remove = mwifiex_pcie_remove,
338#ifdef CONFIG_PM_SLEEP
339 .driver = {
340 .pm = &mwifiex_pcie_pm_ops,
341 },
342#endif
343 .shutdown = mwifiex_pcie_shutdown,
344 .err_handler = mwifiex_pcie_err_handler,
345};
346
347
348
349
350static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
351{
352 struct pcie_service_card *card = adapter->card;
353
354 iowrite32(data, card->pci_mmap1 + reg);
355
356 return 0;
357}
358
359
360
361
362static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
363{
364 struct pcie_service_card *card = adapter->card;
365
366 *data = ioread32(card->pci_mmap1 + reg);
367 if (*data == 0xffffffff)
368 return 0xffffffff;
369
370 return 0;
371}
372
373
374static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
375 int reg, u8 *data)
376{
377 struct pcie_service_card *card = adapter->card;
378
379 *data = ioread8(card->pci_mmap1 + reg);
380
381 return 0;
382}
383
384
385
386
387static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
388{
389 int i = 0;
390
391 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
392 i++;
393 usleep_range(10, 20);
394
395 if (i == 5000)
396 break;
397 }
398
399 return;
400}
401
402static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
403 u32 max_delay_loop_cnt)
404{
405 struct pcie_service_card *card = adapter->card;
406 u8 *buffer;
407 u32 sleep_cookie, count;
408
409 for (count = 0; count < max_delay_loop_cnt; count++) {
410 buffer = card->cmdrsp_buf->data - INTF_HEADER_LEN;
411 sleep_cookie = *(u32 *)buffer;
412
413 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
414 mwifiex_dbg(adapter, INFO,
415 "sleep cookie found at count %d\n", count);
416 break;
417 }
418 usleep_range(20, 30);
419 }
420
421 if (count >= max_delay_loop_cnt)
422 mwifiex_dbg(adapter, INFO,
423 "max count reached while accessing sleep cookie\n");
424}
425
426
427static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
428{
429 u32 fw_status;
430 struct pcie_service_card *card = adapter->card;
431 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
432
433 mwifiex_dbg(adapter, EVENT,
434 "event: Wakeup device...\n");
435
436 if (reg->sleep_cookie)
437 mwifiex_pcie_dev_wakeup_delay(adapter);
438
439
440 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) {
441 mwifiex_dbg(adapter, ERROR,
442 "Reading fw_status register failed\n");
443 return -1;
444 }
445
446 if (reg->sleep_cookie) {
447 mwifiex_pcie_dev_wakeup_delay(adapter);
448 mwifiex_dbg(adapter, INFO,
449 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
450 adapter->ps_state = PS_STATE_AWAKE;
451 }
452
453 return 0;
454}
455
456
457
458
459
460
461static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
462{
463 mwifiex_dbg(adapter, CMD,
464 "cmd: Wakeup device completed\n");
465
466 return 0;
467}
468
469
470
471
472
473
474
475static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
476{
477 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
478 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
479 0x00000000)) {
480 mwifiex_dbg(adapter, ERROR,
481 "Disable host interrupt failed\n");
482 return -1;
483 }
484 }
485
486 return 0;
487}
488
489static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
490{
491 WARN_ON(mwifiex_pcie_disable_host_int(adapter));
492}
493
494
495
496
497
498
499
500static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
501{
502 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
503
504 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
505 HOST_INTR_MASK)) {
506 mwifiex_dbg(adapter, ERROR,
507 "Enable host interrupt failed\n");
508 return -1;
509 }
510 }
511
512 return 0;
513}
514
515
516
517
518static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
519{
520 struct pcie_service_card *card = adapter->card;
521 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
522 struct mwifiex_pcie_buf_desc *desc;
523 struct mwifiex_pfu_buf_desc *desc2;
524 int i;
525
526 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
527 card->tx_buf_list[i] = NULL;
528 if (reg->pfu_enabled) {
529 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
530 (sizeof(*desc2) * i);
531 desc2 = card->txbd_ring[i];
532 memset(desc2, 0, sizeof(*desc2));
533 } else {
534 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
535 (sizeof(*desc) * i);
536 desc = card->txbd_ring[i];
537 memset(desc, 0, sizeof(*desc));
538 }
539 }
540
541 return 0;
542}
543
544
545
546
547
548static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
549{
550 struct pcie_service_card *card = adapter->card;
551 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
552 struct sk_buff *skb;
553 struct mwifiex_pcie_buf_desc *desc;
554 struct mwifiex_pfu_buf_desc *desc2;
555 dma_addr_t buf_pa;
556 int i;
557
558 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
559
560 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
561 GFP_KERNEL);
562 if (!skb) {
563 mwifiex_dbg(adapter, ERROR,
564 "Unable to allocate skb for RX ring.\n");
565 kfree(card->rxbd_ring_vbase);
566 return -ENOMEM;
567 }
568
569 if (mwifiex_map_pci_memory(adapter, skb,
570 MWIFIEX_RX_DATA_BUF_SIZE,
571 PCI_DMA_FROMDEVICE))
572 return -1;
573
574 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
575
576 mwifiex_dbg(adapter, INFO,
577 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
578 skb, skb->len, skb->data, (u32)buf_pa,
579 (u32)((u64)buf_pa >> 32));
580
581 card->rx_buf_list[i] = skb;
582 if (reg->pfu_enabled) {
583 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
584 (sizeof(*desc2) * i);
585 desc2 = card->rxbd_ring[i];
586 desc2->paddr = buf_pa;
587 desc2->len = (u16)skb->len;
588 desc2->frag_len = (u16)skb->len;
589 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
590 desc2->offset = 0;
591 } else {
592 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
593 (sizeof(*desc) * i));
594 desc = card->rxbd_ring[i];
595 desc->paddr = buf_pa;
596 desc->len = (u16)skb->len;
597 desc->flags = 0;
598 }
599 }
600
601 return 0;
602}
603
604
605
606
607
608static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
609{
610 struct pcie_service_card *card = adapter->card;
611 struct mwifiex_evt_buf_desc *desc;
612 struct sk_buff *skb;
613 dma_addr_t buf_pa;
614 int i;
615
616 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
617
618 skb = dev_alloc_skb(MAX_EVENT_SIZE);
619 if (!skb) {
620 mwifiex_dbg(adapter, ERROR,
621 "Unable to allocate skb for EVENT buf.\n");
622 kfree(card->evtbd_ring_vbase);
623 return -ENOMEM;
624 }
625 skb_put(skb, MAX_EVENT_SIZE);
626
627 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
628 PCI_DMA_FROMDEVICE))
629 return -1;
630
631 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
632
633 mwifiex_dbg(adapter, EVENT,
634 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
635 skb, skb->len, skb->data, (u32)buf_pa,
636 (u32)((u64)buf_pa >> 32));
637
638 card->evt_buf_list[i] = skb;
639 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
640 (sizeof(*desc) * i));
641 desc = card->evtbd_ring[i];
642 desc->paddr = buf_pa;
643 desc->len = (u16)skb->len;
644 desc->flags = 0;
645 }
646
647 return 0;
648}
649
650
651
652
653static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
654{
655 struct pcie_service_card *card = adapter->card;
656 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
657 struct sk_buff *skb;
658 struct mwifiex_pcie_buf_desc *desc;
659 struct mwifiex_pfu_buf_desc *desc2;
660 int i;
661
662 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
663 if (reg->pfu_enabled) {
664 desc2 = card->txbd_ring[i];
665 if (card->tx_buf_list[i]) {
666 skb = card->tx_buf_list[i];
667 mwifiex_unmap_pci_memory(adapter, skb,
668 PCI_DMA_TODEVICE);
669 dev_kfree_skb_any(skb);
670 }
671 memset(desc2, 0, sizeof(*desc2));
672 } else {
673 desc = card->txbd_ring[i];
674 if (card->tx_buf_list[i]) {
675 skb = card->tx_buf_list[i];
676 mwifiex_unmap_pci_memory(adapter, skb,
677 PCI_DMA_TODEVICE);
678 dev_kfree_skb_any(skb);
679 }
680 memset(desc, 0, sizeof(*desc));
681 }
682 card->tx_buf_list[i] = NULL;
683 }
684
685 return;
686}
687
688
689
690
691static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
692{
693 struct pcie_service_card *card = adapter->card;
694 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
695 struct mwifiex_pcie_buf_desc *desc;
696 struct mwifiex_pfu_buf_desc *desc2;
697 struct sk_buff *skb;
698 int i;
699
700 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
701 if (reg->pfu_enabled) {
702 desc2 = card->rxbd_ring[i];
703 if (card->rx_buf_list[i]) {
704 skb = card->rx_buf_list[i];
705 mwifiex_unmap_pci_memory(adapter, skb,
706 PCI_DMA_FROMDEVICE);
707 dev_kfree_skb_any(skb);
708 }
709 memset(desc2, 0, sizeof(*desc2));
710 } else {
711 desc = card->rxbd_ring[i];
712 if (card->rx_buf_list[i]) {
713 skb = card->rx_buf_list[i];
714 mwifiex_unmap_pci_memory(adapter, skb,
715 PCI_DMA_FROMDEVICE);
716 dev_kfree_skb_any(skb);
717 }
718 memset(desc, 0, sizeof(*desc));
719 }
720 card->rx_buf_list[i] = NULL;
721 }
722
723 return;
724}
725
726
727
728
729static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
730{
731 struct pcie_service_card *card = adapter->card;
732 struct mwifiex_evt_buf_desc *desc;
733 struct sk_buff *skb;
734 int i;
735
736 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
737 desc = card->evtbd_ring[i];
738 if (card->evt_buf_list[i]) {
739 skb = card->evt_buf_list[i];
740 mwifiex_unmap_pci_memory(adapter, skb,
741 PCI_DMA_FROMDEVICE);
742 dev_kfree_skb_any(skb);
743 }
744 card->evt_buf_list[i] = NULL;
745 memset(desc, 0, sizeof(*desc));
746 }
747
748 return;
749}
750
751
752
753static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
754{
755 struct pcie_service_card *card = adapter->card;
756 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
757
758
759
760
761
762
763 card->txbd_wrptr = 0;
764
765 if (reg->pfu_enabled)
766 card->txbd_rdptr = 0;
767 else
768 card->txbd_rdptr |= reg->tx_rollover_ind;
769
770
771
772 if (reg->pfu_enabled)
773 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
774 MWIFIEX_MAX_TXRX_BD;
775 else
776 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
777 MWIFIEX_MAX_TXRX_BD;
778
779 mwifiex_dbg(adapter, INFO,
780 "info: txbd_ring: Allocating %d bytes\n",
781 card->txbd_ring_size);
782 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
783 card->txbd_ring_size,
784 &card->txbd_ring_pbase);
785 if (!card->txbd_ring_vbase) {
786 mwifiex_dbg(adapter, ERROR,
787 "allocate consistent memory (%d bytes) failed!\n",
788 card->txbd_ring_size);
789 return -ENOMEM;
790 }
791 mwifiex_dbg(adapter, DATA,
792 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
793 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
794 (u32)((u64)card->txbd_ring_pbase >> 32),
795 card->txbd_ring_size);
796
797 return mwifiex_init_txq_ring(adapter);
798}
799
800static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
801{
802 struct pcie_service_card *card = adapter->card;
803 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
804
805 mwifiex_cleanup_txq_ring(adapter);
806
807 if (card->txbd_ring_vbase)
808 pci_free_consistent(card->dev, card->txbd_ring_size,
809 card->txbd_ring_vbase,
810 card->txbd_ring_pbase);
811 card->txbd_ring_size = 0;
812 card->txbd_wrptr = 0;
813 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
814 card->txbd_ring_vbase = NULL;
815 card->txbd_ring_pbase = 0;
816
817 return 0;
818}
819
820
821
822
823static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
824{
825 struct pcie_service_card *card = adapter->card;
826 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
827
828
829
830
831
832
833 card->rxbd_wrptr = 0;
834 card->rxbd_rdptr = reg->rx_rollover_ind;
835
836 if (reg->pfu_enabled)
837 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
838 MWIFIEX_MAX_TXRX_BD;
839 else
840 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
841 MWIFIEX_MAX_TXRX_BD;
842
843 mwifiex_dbg(adapter, INFO,
844 "info: rxbd_ring: Allocating %d bytes\n",
845 card->rxbd_ring_size);
846 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
847 card->rxbd_ring_size,
848 &card->rxbd_ring_pbase);
849 if (!card->rxbd_ring_vbase) {
850 mwifiex_dbg(adapter, ERROR,
851 "allocate consistent memory (%d bytes) failed!\n",
852 card->rxbd_ring_size);
853 return -ENOMEM;
854 }
855
856 mwifiex_dbg(adapter, DATA,
857 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
858 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
859 (u32)((u64)card->rxbd_ring_pbase >> 32),
860 card->rxbd_ring_size);
861
862 return mwifiex_init_rxq_ring(adapter);
863}
864
865
866
867
868static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
869{
870 struct pcie_service_card *card = adapter->card;
871 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
872
873 mwifiex_cleanup_rxq_ring(adapter);
874
875 if (card->rxbd_ring_vbase)
876 pci_free_consistent(card->dev, card->rxbd_ring_size,
877 card->rxbd_ring_vbase,
878 card->rxbd_ring_pbase);
879 card->rxbd_ring_size = 0;
880 card->rxbd_wrptr = 0;
881 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
882 card->rxbd_ring_vbase = NULL;
883 card->rxbd_ring_pbase = 0;
884
885 return 0;
886}
887
888
889
890
891static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
892{
893 struct pcie_service_card *card = adapter->card;
894 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
895
896
897
898
899
900
901 card->evtbd_wrptr = 0;
902 card->evtbd_rdptr = reg->evt_rollover_ind;
903
904 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
905 MWIFIEX_MAX_EVT_BD;
906
907 mwifiex_dbg(adapter, INFO,
908 "info: evtbd_ring: Allocating %d bytes\n",
909 card->evtbd_ring_size);
910 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
911 card->evtbd_ring_size,
912 &card->evtbd_ring_pbase);
913 if (!card->evtbd_ring_vbase) {
914 mwifiex_dbg(adapter, ERROR,
915 "allocate consistent memory (%d bytes) failed!\n",
916 card->evtbd_ring_size);
917 return -ENOMEM;
918 }
919
920 mwifiex_dbg(adapter, EVENT,
921 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
922 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
923 (u32)((u64)card->evtbd_ring_pbase >> 32),
924 card->evtbd_ring_size);
925
926 return mwifiex_pcie_init_evt_ring(adapter);
927}
928
929
930
931
932static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
933{
934 struct pcie_service_card *card = adapter->card;
935 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
936
937 mwifiex_cleanup_evt_ring(adapter);
938
939 if (card->evtbd_ring_vbase)
940 pci_free_consistent(card->dev, card->evtbd_ring_size,
941 card->evtbd_ring_vbase,
942 card->evtbd_ring_pbase);
943 card->evtbd_wrptr = 0;
944 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
945 card->evtbd_ring_size = 0;
946 card->evtbd_ring_vbase = NULL;
947 card->evtbd_ring_pbase = 0;
948
949 return 0;
950}
951
952
953
954
955static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
956{
957 struct pcie_service_card *card = adapter->card;
958 struct sk_buff *skb;
959
960
961 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
962 if (!skb) {
963 mwifiex_dbg(adapter, ERROR,
964 "Unable to allocate skb for command response data.\n");
965 return -ENOMEM;
966 }
967 skb_put(skb, MWIFIEX_UPLD_SIZE);
968 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
969 PCI_DMA_FROMDEVICE))
970 return -1;
971
972 card->cmdrsp_buf = skb;
973
974 return 0;
975}
976
977
978
979
980static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
981{
982 struct pcie_service_card *card;
983
984 if (!adapter)
985 return 0;
986
987 card = adapter->card;
988
989 if (card && card->cmdrsp_buf) {
990 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
991 PCI_DMA_FROMDEVICE);
992 dev_kfree_skb_any(card->cmdrsp_buf);
993 }
994
995 if (card && card->cmd_buf) {
996 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
997 PCI_DMA_TODEVICE);
998 }
999 return 0;
1000}
1001
1002
1003
1004
1005static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1006{
1007 struct pcie_service_card *card = adapter->card;
1008
1009 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
1010 &card->sleep_cookie_pbase);
1011 if (!card->sleep_cookie_vbase) {
1012 mwifiex_dbg(adapter, ERROR,
1013 "pci_alloc_consistent failed!\n");
1014 return -ENOMEM;
1015 }
1016
1017 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
1018
1019 mwifiex_dbg(adapter, INFO,
1020 "alloc_scook: sleep cookie=0x%x\n",
1021 *((u32 *)card->sleep_cookie_vbase));
1022
1023 return 0;
1024}
1025
1026
1027
1028
1029static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1030{
1031 struct pcie_service_card *card;
1032
1033 if (!adapter)
1034 return 0;
1035
1036 card = adapter->card;
1037
1038 if (card && card->sleep_cookie_vbase) {
1039 pci_free_consistent(card->dev, sizeof(u32),
1040 card->sleep_cookie_vbase,
1041 card->sleep_cookie_pbase);
1042 card->sleep_cookie_vbase = NULL;
1043 }
1044
1045 return 0;
1046}
1047
1048
1049
1050
1051
1052static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1053{
1054 struct pcie_service_card *card = adapter->card;
1055
1056 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1057 card->txbd_flush = 1;
1058
1059
1060
1061 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1062 CPU_INTR_DNLD_RDY)) {
1063 mwifiex_dbg(adapter, ERROR,
1064 "failed to assert dnld-rdy interrupt.\n");
1065 return -1;
1066 }
1067 }
1068 return 0;
1069}
1070
1071
1072
1073
1074static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1075{
1076 struct sk_buff *skb;
1077 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1078 struct mwifiex_pcie_buf_desc *desc;
1079 struct mwifiex_pfu_buf_desc *desc2;
1080 struct pcie_service_card *card = adapter->card;
1081 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1082
1083 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1084 mwifiex_pm_wakeup_card(adapter);
1085
1086
1087 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1088 mwifiex_dbg(adapter, ERROR,
1089 "SEND COMP: failed to read reg->tx_rdptr\n");
1090 return -1;
1091 }
1092
1093 mwifiex_dbg(adapter, DATA,
1094 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1095 card->txbd_rdptr, rdptr);
1096
1097 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1098
1099 while (((card->txbd_rdptr & reg->tx_mask) !=
1100 (rdptr & reg->tx_mask)) ||
1101 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1102 (rdptr & reg->tx_rollover_ind))) {
1103 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1104 reg->tx_start_ptr;
1105
1106 skb = card->tx_buf_list[wrdoneidx];
1107
1108 if (skb) {
1109 mwifiex_dbg(adapter, DATA,
1110 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1111 skb, wrdoneidx);
1112 mwifiex_unmap_pci_memory(adapter, skb,
1113 PCI_DMA_TODEVICE);
1114
1115 unmap_count++;
1116
1117 if (card->txbd_flush)
1118 mwifiex_write_data_complete(adapter, skb, 0,
1119 -1);
1120 else
1121 mwifiex_write_data_complete(adapter, skb, 0, 0);
1122 }
1123
1124 card->tx_buf_list[wrdoneidx] = NULL;
1125
1126 if (reg->pfu_enabled) {
1127 desc2 = card->txbd_ring[wrdoneidx];
1128 memset(desc2, 0, sizeof(*desc2));
1129 } else {
1130 desc = card->txbd_ring[wrdoneidx];
1131 memset(desc, 0, sizeof(*desc));
1132 }
1133 switch (card->dev->device) {
1134 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1135 card->txbd_rdptr++;
1136 break;
1137 case PCIE_DEVICE_ID_MARVELL_88W8897:
1138 case PCIE_DEVICE_ID_MARVELL_88W8997:
1139 card->txbd_rdptr += reg->ring_tx_start_ptr;
1140 break;
1141 }
1142
1143
1144 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1145 card->txbd_rdptr = ((card->txbd_rdptr &
1146 reg->tx_rollover_ind) ^
1147 reg->tx_rollover_ind);
1148 }
1149
1150 if (unmap_count)
1151 adapter->data_sent = false;
1152
1153 if (card->txbd_flush) {
1154 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1155 card->txbd_flush = 0;
1156 else
1157 mwifiex_clean_pcie_ring_buf(adapter);
1158 }
1159
1160 return 0;
1161}
1162
1163
1164
1165
1166
1167
1168
1169
1170static int
1171mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1172 struct mwifiex_tx_param *tx_param)
1173{
1174 struct pcie_service_card *card = adapter->card;
1175 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1176 u32 wrindx, num_tx_buffs, rx_val;
1177 int ret;
1178 dma_addr_t buf_pa;
1179 struct mwifiex_pcie_buf_desc *desc = NULL;
1180 struct mwifiex_pfu_buf_desc *desc2 = NULL;
1181 __le16 *tmp;
1182
1183 if (!(skb->data && skb->len)) {
1184 mwifiex_dbg(adapter, ERROR,
1185 "%s(): invalid parameter <%p, %#x>\n",
1186 __func__, skb->data, skb->len);
1187 return -1;
1188 }
1189
1190 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1191 mwifiex_pm_wakeup_card(adapter);
1192
1193 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1194 mwifiex_dbg(adapter, DATA,
1195 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1196 card->txbd_rdptr, card->txbd_wrptr);
1197 if (mwifiex_pcie_txbd_not_full(card)) {
1198 u8 *payload;
1199
1200 adapter->data_sent = true;
1201 payload = skb->data;
1202 tmp = (__le16 *)&payload[0];
1203 *tmp = cpu_to_le16((u16)skb->len);
1204 tmp = (__le16 *)&payload[2];
1205 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
1206
1207 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1208 PCI_DMA_TODEVICE))
1209 return -1;
1210
1211 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1212 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1213 card->tx_buf_list[wrindx] = skb;
1214
1215 if (reg->pfu_enabled) {
1216 desc2 = card->txbd_ring[wrindx];
1217 desc2->paddr = buf_pa;
1218 desc2->len = (u16)skb->len;
1219 desc2->frag_len = (u16)skb->len;
1220 desc2->offset = 0;
1221 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1222 MWIFIEX_BD_FLAG_LAST_DESC;
1223 } else {
1224 desc = card->txbd_ring[wrindx];
1225 desc->paddr = buf_pa;
1226 desc->len = (u16)skb->len;
1227 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1228 MWIFIEX_BD_FLAG_LAST_DESC;
1229 }
1230
1231 switch (card->dev->device) {
1232 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1233 card->txbd_wrptr++;
1234 break;
1235 case PCIE_DEVICE_ID_MARVELL_88W8897:
1236 case PCIE_DEVICE_ID_MARVELL_88W8997:
1237 card->txbd_wrptr += reg->ring_tx_start_ptr;
1238 break;
1239 }
1240
1241 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1242 card->txbd_wrptr = ((card->txbd_wrptr &
1243 reg->tx_rollover_ind) ^
1244 reg->tx_rollover_ind);
1245
1246 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1247
1248 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1249 card->txbd_wrptr | rx_val)) {
1250 mwifiex_dbg(adapter, ERROR,
1251 "SEND DATA: failed to write reg->tx_wrptr\n");
1252 ret = -1;
1253 goto done_unmap;
1254 }
1255 if ((mwifiex_pcie_txbd_not_full(card)) &&
1256 tx_param->next_pkt_len) {
1257
1258 mwifiex_dbg(adapter, DATA,
1259 "SEND DATA: delay dnld-rdy interrupt.\n");
1260 adapter->data_sent = false;
1261 } else {
1262
1263 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1264 CPU_INTR_DNLD_RDY)) {
1265 mwifiex_dbg(adapter, ERROR,
1266 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1267 ret = -1;
1268 goto done_unmap;
1269 }
1270 }
1271 mwifiex_dbg(adapter, DATA,
1272 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1273 "%#x> and sent packet to firmware successfully\n",
1274 card->txbd_rdptr, card->txbd_wrptr);
1275 } else {
1276 mwifiex_dbg(adapter, DATA,
1277 "info: TX Ring full, can't send packets to fw\n");
1278 adapter->data_sent = true;
1279
1280 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1281 CPU_INTR_DNLD_RDY))
1282 mwifiex_dbg(adapter, ERROR,
1283 "SEND DATA: failed to assert door-bell intr\n");
1284 return -EBUSY;
1285 }
1286
1287 return -EINPROGRESS;
1288done_unmap:
1289 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1290 card->tx_buf_list[wrindx] = NULL;
1291 if (reg->pfu_enabled)
1292 memset(desc2, 0, sizeof(*desc2));
1293 else
1294 memset(desc, 0, sizeof(*desc));
1295
1296 return ret;
1297}
1298
1299
1300
1301
1302
1303static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1304{
1305 struct pcie_service_card *card = adapter->card;
1306 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1307 u32 wrptr, rd_index, tx_val;
1308 dma_addr_t buf_pa;
1309 int ret = 0;
1310 struct sk_buff *skb_tmp = NULL;
1311 struct mwifiex_pcie_buf_desc *desc;
1312 struct mwifiex_pfu_buf_desc *desc2;
1313
1314 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1315 mwifiex_pm_wakeup_card(adapter);
1316
1317
1318 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1319 mwifiex_dbg(adapter, ERROR,
1320 "RECV DATA: failed to read reg->rx_wrptr\n");
1321 ret = -1;
1322 goto done;
1323 }
1324 card->rxbd_wrptr = wrptr;
1325
1326 while (((wrptr & reg->rx_mask) !=
1327 (card->rxbd_rdptr & reg->rx_mask)) ||
1328 ((wrptr & reg->rx_rollover_ind) ==
1329 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1330 struct sk_buff *skb_data;
1331 u16 rx_len;
1332 __le16 pkt_len;
1333
1334 rd_index = card->rxbd_rdptr & reg->rx_mask;
1335 skb_data = card->rx_buf_list[rd_index];
1336
1337
1338
1339
1340 if (!skb_data)
1341 return -ENOMEM;
1342
1343 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
1344 card->rx_buf_list[rd_index] = NULL;
1345
1346
1347
1348
1349 pkt_len = *((__le16 *)skb_data->data);
1350 rx_len = le16_to_cpu(pkt_len);
1351 if (WARN_ON(rx_len <= INTF_HEADER_LEN ||
1352 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1353 mwifiex_dbg(adapter, ERROR,
1354 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1355 rx_len, card->rxbd_rdptr, wrptr);
1356 dev_kfree_skb_any(skb_data);
1357 } else {
1358 skb_put(skb_data, rx_len);
1359 mwifiex_dbg(adapter, DATA,
1360 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1361 card->rxbd_rdptr, wrptr, rx_len);
1362 skb_pull(skb_data, INTF_HEADER_LEN);
1363 if (adapter->rx_work_enabled) {
1364 skb_queue_tail(&adapter->rx_data_q, skb_data);
1365 adapter->data_received = true;
1366 atomic_inc(&adapter->rx_pending);
1367 } else {
1368 mwifiex_handle_rx_packet(adapter, skb_data);
1369 }
1370 }
1371
1372 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1373 GFP_KERNEL);
1374 if (!skb_tmp) {
1375 mwifiex_dbg(adapter, ERROR,
1376 "Unable to allocate skb.\n");
1377 return -ENOMEM;
1378 }
1379
1380 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1381 MWIFIEX_RX_DATA_BUF_SIZE,
1382 PCI_DMA_FROMDEVICE))
1383 return -1;
1384
1385 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1386
1387 mwifiex_dbg(adapter, INFO,
1388 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1389 skb_tmp, rd_index);
1390 card->rx_buf_list[rd_index] = skb_tmp;
1391
1392 if (reg->pfu_enabled) {
1393 desc2 = card->rxbd_ring[rd_index];
1394 desc2->paddr = buf_pa;
1395 desc2->len = skb_tmp->len;
1396 desc2->frag_len = skb_tmp->len;
1397 desc2->offset = 0;
1398 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1399 } else {
1400 desc = card->rxbd_ring[rd_index];
1401 desc->paddr = buf_pa;
1402 desc->len = skb_tmp->len;
1403 desc->flags = 0;
1404 }
1405
1406 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1407 MWIFIEX_MAX_TXRX_BD) {
1408 card->rxbd_rdptr = ((card->rxbd_rdptr &
1409 reg->rx_rollover_ind) ^
1410 reg->rx_rollover_ind);
1411 }
1412 mwifiex_dbg(adapter, DATA,
1413 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1414 card->rxbd_rdptr, wrptr);
1415
1416 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1417
1418 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1419 card->rxbd_rdptr | tx_val)) {
1420 mwifiex_dbg(adapter, DATA,
1421 "RECV DATA: failed to write reg->rx_rdptr\n");
1422 ret = -1;
1423 goto done;
1424 }
1425
1426
1427 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1428 mwifiex_dbg(adapter, ERROR,
1429 "RECV DATA: failed to read reg->rx_wrptr\n");
1430 ret = -1;
1431 goto done;
1432 }
1433 mwifiex_dbg(adapter, DATA,
1434 "info: RECV DATA: Rcvd packet from fw successfully\n");
1435 card->rxbd_wrptr = wrptr;
1436 }
1437
1438done:
1439 return ret;
1440}
1441
1442
1443
1444
1445static int
1446mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1447{
1448 dma_addr_t buf_pa;
1449 struct pcie_service_card *card = adapter->card;
1450 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1451
1452 if (!(skb->data && skb->len)) {
1453 mwifiex_dbg(adapter, ERROR,
1454 "Invalid parameter in %s <%p. len %d>\n",
1455 __func__, skb->data, skb->len);
1456 return -1;
1457 }
1458
1459 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1460 return -1;
1461
1462 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1463
1464
1465
1466
1467 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1468 mwifiex_dbg(adapter, ERROR,
1469 "%s: failed to write download command to boot code.\n",
1470 __func__);
1471 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1472 return -1;
1473 }
1474
1475
1476
1477
1478 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1479 (u32)((u64)buf_pa >> 32))) {
1480 mwifiex_dbg(adapter, ERROR,
1481 "%s: failed to write download command to boot code.\n",
1482 __func__);
1483 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1484 return -1;
1485 }
1486
1487
1488 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1489 mwifiex_dbg(adapter, ERROR,
1490 "%s: failed to write command len to cmd_size scratch reg\n",
1491 __func__);
1492 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1493 return -1;
1494 }
1495
1496
1497 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1498 CPU_INTR_DOOR_BELL)) {
1499 mwifiex_dbg(adapter, ERROR,
1500 "%s: failed to assert door-bell intr\n", __func__);
1501 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1502 return -1;
1503 }
1504
1505 return 0;
1506}
1507
1508
1509
1510
1511static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1512{
1513 struct pcie_service_card *card = adapter->card;
1514 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1515 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1516
1517
1518 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1519 tx_wrap)) {
1520 mwifiex_dbg(adapter, ERROR,
1521 "RECV DATA: failed to write reg->rx_rdptr\n");
1522 return -1;
1523 }
1524 return 0;
1525}
1526
1527
1528
1529static int
1530mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1531{
1532 struct pcie_service_card *card = adapter->card;
1533 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1534 int ret = 0;
1535 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1536 u8 *payload = (u8 *)skb->data;
1537
1538 if (!(skb->data && skb->len)) {
1539 mwifiex_dbg(adapter, ERROR,
1540 "Invalid parameter in %s <%p, %#x>\n",
1541 __func__, skb->data, skb->len);
1542 return -1;
1543 }
1544
1545
1546 if (!card->cmdrsp_buf) {
1547 mwifiex_dbg(adapter, ERROR,
1548 "No response buffer available, send command failed\n");
1549 return -EBUSY;
1550 }
1551
1552 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1553 mwifiex_pm_wakeup_card(adapter);
1554
1555 adapter->cmd_sent = true;
1556
1557 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1558 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1559
1560 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1561 return -1;
1562
1563 card->cmd_buf = skb;
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575 if (card->cmdrsp_buf) {
1576 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1577
1578
1579 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1580 (u32)cmdrsp_buf_pa)) {
1581 mwifiex_dbg(adapter, ERROR,
1582 "Failed to write download cmd to boot code.\n");
1583 ret = -1;
1584 goto done;
1585 }
1586
1587
1588 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1589 (u32)((u64)cmdrsp_buf_pa >> 32))) {
1590 mwifiex_dbg(adapter, ERROR,
1591 "Failed to write download cmd to boot code.\n");
1592 ret = -1;
1593 goto done;
1594 }
1595 }
1596
1597 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1598
1599 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1600 (u32)cmd_buf_pa)) {
1601 mwifiex_dbg(adapter, ERROR,
1602 "Failed to write download cmd to boot code.\n");
1603 ret = -1;
1604 goto done;
1605 }
1606
1607 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1608 (u32)((u64)cmd_buf_pa >> 32))) {
1609 mwifiex_dbg(adapter, ERROR,
1610 "Failed to write download cmd to boot code.\n");
1611 ret = -1;
1612 goto done;
1613 }
1614
1615
1616 if (mwifiex_write_reg(adapter, reg->cmd_size,
1617 card->cmd_buf->len)) {
1618 mwifiex_dbg(adapter, ERROR,
1619 "Failed to write cmd len to reg->cmd_size\n");
1620 ret = -1;
1621 goto done;
1622 }
1623
1624
1625 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1626 CPU_INTR_DOOR_BELL)) {
1627 mwifiex_dbg(adapter, ERROR,
1628 "Failed to assert door-bell intr\n");
1629 ret = -1;
1630 goto done;
1631 }
1632
1633done:
1634 if (ret)
1635 adapter->cmd_sent = false;
1636
1637 return 0;
1638}
1639
1640
1641
1642
1643static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1644{
1645 struct pcie_service_card *card = adapter->card;
1646 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1647 struct sk_buff *skb = card->cmdrsp_buf;
1648 int count = 0;
1649 u16 rx_len;
1650 __le16 pkt_len;
1651
1652 mwifiex_dbg(adapter, CMD,
1653 "info: Rx CMD Response\n");
1654
1655 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
1656
1657
1658 if (card->cmd_buf) {
1659 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1660 PCI_DMA_TODEVICE);
1661 card->cmd_buf = NULL;
1662 }
1663
1664 pkt_len = *((__le16 *)skb->data);
1665 rx_len = le16_to_cpu(pkt_len);
1666 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1667 skb_trim(skb, rx_len);
1668 skb_pull(skb, INTF_HEADER_LEN);
1669
1670 if (!adapter->curr_cmd) {
1671 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1672 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1673 skb->len);
1674 mwifiex_pcie_enable_host_int(adapter);
1675 if (mwifiex_write_reg(adapter,
1676 PCIE_CPU_INT_EVENT,
1677 CPU_INTR_SLEEP_CFM_DONE)) {
1678 mwifiex_dbg(adapter, ERROR,
1679 "Write register failed\n");
1680 return -1;
1681 }
1682 mwifiex_delay_for_sleep_cookie(adapter,
1683 MWIFIEX_MAX_DELAY_COUNT);
1684 while (reg->sleep_cookie && (count++ < 10) &&
1685 mwifiex_pcie_ok_to_access_hw(adapter))
1686 usleep_range(50, 60);
1687 } else {
1688 mwifiex_dbg(adapter, ERROR,
1689 "There is no command but got cmdrsp\n");
1690 }
1691 memcpy(adapter->upld_buf, skb->data,
1692 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1693 skb_push(skb, INTF_HEADER_LEN);
1694 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1695 PCI_DMA_FROMDEVICE))
1696 return -1;
1697 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1698 adapter->curr_cmd->resp_skb = skb;
1699 adapter->cmd_resp_received = true;
1700
1701
1702 card->cmdrsp_buf = NULL;
1703
1704
1705
1706
1707 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1708 mwifiex_dbg(adapter, ERROR,
1709 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1710 return -1;
1711 }
1712
1713
1714 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1715 mwifiex_dbg(adapter, ERROR,
1716 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1717 return -1;
1718 }
1719 }
1720
1721 return 0;
1722}
1723
1724
1725
1726
1727static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1728 struct sk_buff *skb)
1729{
1730 struct pcie_service_card *card = adapter->card;
1731
1732 if (skb) {
1733 card->cmdrsp_buf = skb;
1734 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
1735 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1736 PCI_DMA_FROMDEVICE))
1737 return -1;
1738 }
1739
1740 return 0;
1741}
1742
1743
1744
1745
1746static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1747{
1748 struct pcie_service_card *card = adapter->card;
1749 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1750 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1751 u32 wrptr, event;
1752 struct mwifiex_evt_buf_desc *desc;
1753
1754 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1755 mwifiex_pm_wakeup_card(adapter);
1756
1757 if (adapter->event_received) {
1758 mwifiex_dbg(adapter, EVENT,
1759 "info: Event being processed,\t"
1760 "do not process this interrupt just yet\n");
1761 return 0;
1762 }
1763
1764 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1765 mwifiex_dbg(adapter, ERROR,
1766 "info: Invalid read pointer...\n");
1767 return -1;
1768 }
1769
1770
1771 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1772 mwifiex_dbg(adapter, ERROR,
1773 "EventReady: failed to read reg->evt_wrptr\n");
1774 return -1;
1775 }
1776
1777 mwifiex_dbg(adapter, EVENT,
1778 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1779 card->evtbd_rdptr, wrptr);
1780 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1781 & MWIFIEX_EVTBD_MASK)) ||
1782 ((wrptr & reg->evt_rollover_ind) ==
1783 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
1784 struct sk_buff *skb_cmd;
1785 __le16 data_len = 0;
1786 u16 evt_len;
1787
1788 mwifiex_dbg(adapter, INFO,
1789 "info: Read Index: %d\n", rdptr);
1790 skb_cmd = card->evt_buf_list[rdptr];
1791 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
1792
1793
1794
1795 card->evt_buf_list[rdptr] = NULL;
1796 desc = card->evtbd_ring[rdptr];
1797 memset(desc, 0, sizeof(*desc));
1798
1799 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1800 adapter->event_cause = event;
1801
1802
1803 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1804 evt_len = le16_to_cpu(data_len);
1805 skb_trim(skb_cmd, evt_len);
1806 skb_pull(skb_cmd, INTF_HEADER_LEN);
1807 mwifiex_dbg(adapter, EVENT,
1808 "info: Event length: %d\n", evt_len);
1809
1810 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1811 memcpy(adapter->event_body, skb_cmd->data +
1812 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1813 MWIFIEX_EVENT_HEADER_LEN);
1814
1815 adapter->event_received = true;
1816 adapter->event_skb = skb_cmd;
1817
1818
1819
1820
1821
1822 } else {
1823 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1824 CPU_INTR_EVENT_DONE)) {
1825 mwifiex_dbg(adapter, ERROR,
1826 "Write register failed\n");
1827 return -1;
1828 }
1829 }
1830
1831 return 0;
1832}
1833
1834
1835
1836
1837static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1838 struct sk_buff *skb)
1839{
1840 struct pcie_service_card *card = adapter->card;
1841 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1842 int ret = 0;
1843 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1844 u32 wrptr;
1845 struct mwifiex_evt_buf_desc *desc;
1846
1847 if (!skb)
1848 return 0;
1849
1850 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1851 mwifiex_dbg(adapter, ERROR,
1852 "event_complete: Invalid rdptr 0x%x\n",
1853 rdptr);
1854 return -EINVAL;
1855 }
1856
1857
1858 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1859 mwifiex_dbg(adapter, ERROR,
1860 "event_complete: failed to read reg->evt_wrptr\n");
1861 return -1;
1862 }
1863
1864 if (!card->evt_buf_list[rdptr]) {
1865 skb_push(skb, INTF_HEADER_LEN);
1866 skb_put(skb, MAX_EVENT_SIZE - skb->len);
1867 if (mwifiex_map_pci_memory(adapter, skb,
1868 MAX_EVENT_SIZE,
1869 PCI_DMA_FROMDEVICE))
1870 return -1;
1871 card->evt_buf_list[rdptr] = skb;
1872 desc = card->evtbd_ring[rdptr];
1873 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
1874 desc->len = (u16)skb->len;
1875 desc->flags = 0;
1876 skb = NULL;
1877 } else {
1878 mwifiex_dbg(adapter, ERROR,
1879 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1880 rdptr, card->evt_buf_list[rdptr], skb);
1881 }
1882
1883 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1884 card->evtbd_rdptr = ((card->evtbd_rdptr &
1885 reg->evt_rollover_ind) ^
1886 reg->evt_rollover_ind);
1887 }
1888
1889 mwifiex_dbg(adapter, EVENT,
1890 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1891 card->evtbd_rdptr, wrptr);
1892
1893
1894 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1895 card->evtbd_rdptr)) {
1896 mwifiex_dbg(adapter, ERROR,
1897 "event_complete: failed to read reg->evt_rdptr\n");
1898 return -1;
1899 }
1900
1901 mwifiex_dbg(adapter, EVENT,
1902 "info: Check Events Again\n");
1903 ret = mwifiex_pcie_process_event_ready(adapter);
1904
1905 return ret;
1906}
1907
1908
1909
1910
1911
1912
1913
1914
1915static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1916 struct mwifiex_fw_image *fw)
1917{
1918 int ret;
1919 u8 *firmware = fw->fw_buf;
1920 u32 firmware_len = fw->fw_len;
1921 u32 offset = 0;
1922 struct sk_buff *skb;
1923 u32 txlen, tx_blocks = 0, tries, len;
1924 u32 block_retry_cnt = 0;
1925 struct pcie_service_card *card = adapter->card;
1926 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1927
1928 if (!firmware || !firmware_len) {
1929 mwifiex_dbg(adapter, ERROR,
1930 "No firmware image found! Terminating download\n");
1931 return -1;
1932 }
1933
1934 mwifiex_dbg(adapter, INFO,
1935 "info: Downloading FW image (%d bytes)\n",
1936 firmware_len);
1937
1938 if (mwifiex_pcie_disable_host_int(adapter)) {
1939 mwifiex_dbg(adapter, ERROR,
1940 "%s: Disabling interrupts failed.\n", __func__);
1941 return -1;
1942 }
1943
1944 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1945 if (!skb) {
1946 ret = -ENOMEM;
1947 goto done;
1948 }
1949
1950
1951 do {
1952 u32 ireg_intr = 0;
1953
1954
1955 if (offset >= firmware_len)
1956 break;
1957
1958 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1959 ret = mwifiex_read_reg(adapter, reg->cmd_size,
1960 &len);
1961 if (ret) {
1962 mwifiex_dbg(adapter, FATAL,
1963 "Failed reading len from boot code\n");
1964 goto done;
1965 }
1966 if (len)
1967 break;
1968 usleep_range(10, 20);
1969 }
1970
1971 if (!len) {
1972 break;
1973 } else if (len > MWIFIEX_UPLD_SIZE) {
1974 mwifiex_dbg(adapter, ERROR,
1975 "FW download failure @ %d, invalid length %d\n",
1976 offset, len);
1977 ret = -1;
1978 goto done;
1979 }
1980
1981 txlen = len;
1982
1983 if (len & BIT(0)) {
1984 block_retry_cnt++;
1985 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1986 mwifiex_dbg(adapter, ERROR,
1987 "FW download failure @ %d, over max\t"
1988 "retry count\n", offset);
1989 ret = -1;
1990 goto done;
1991 }
1992 mwifiex_dbg(adapter, ERROR,
1993 "FW CRC error indicated by the\t"
1994 "helper: len = 0x%04X, txlen = %d\n",
1995 len, txlen);
1996 len &= ~BIT(0);
1997
1998 txlen = 0;
1999 } else {
2000 block_retry_cnt = 0;
2001
2002
2003 if (firmware_len - offset < txlen)
2004 txlen = firmware_len - offset;
2005
2006 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2007 card->pcie.blksz_fw_dl;
2008
2009
2010 memmove(skb->data, &firmware[offset], txlen);
2011 }
2012
2013 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2014 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2015
2016
2017 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2018 mwifiex_dbg(adapter, ERROR,
2019 "Failed to send firmware download command\n");
2020 ret = -1;
2021 goto done;
2022 }
2023
2024
2025 do {
2026 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2027 &ireg_intr)) {
2028 mwifiex_dbg(adapter, ERROR,
2029 "%s: Failed to read\t"
2030 "interrupt status during fw dnld.\n",
2031 __func__);
2032 mwifiex_unmap_pci_memory(adapter, skb,
2033 PCI_DMA_TODEVICE);
2034 ret = -1;
2035 goto done;
2036 }
2037 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
2038 CPU_INTR_DOOR_BELL);
2039
2040 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
2041
2042 offset += txlen;
2043 } while (true);
2044
2045 mwifiex_dbg(adapter, MSG,
2046 "info: FW download over, size %d bytes\n", offset);
2047
2048 ret = 0;
2049
2050done:
2051 dev_kfree_skb_any(skb);
2052 return ret;
2053}
2054
2055
2056
2057
2058static int
2059mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2060{
2061 int ret = 0;
2062 u32 firmware_stat;
2063 struct pcie_service_card *card = adapter->card;
2064 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2065 u32 tries;
2066
2067
2068 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2069 HOST_INTR_MASK)) {
2070 mwifiex_dbg(adapter, ERROR,
2071 "Write register failed\n");
2072 return -1;
2073 }
2074
2075 mwifiex_dbg(adapter, INFO,
2076 "Setting driver ready signature\n");
2077 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2078 FIRMWARE_READY_PCIE)) {
2079 mwifiex_dbg(adapter, ERROR,
2080 "Failed to write driver ready signature\n");
2081 return -1;
2082 }
2083
2084
2085 for (tries = 0; tries < poll_num; tries++) {
2086 if (mwifiex_read_reg(adapter, reg->fw_status,
2087 &firmware_stat))
2088 ret = -1;
2089 else
2090 ret = 0;
2091
2092 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2093 tries, ret, firmware_stat);
2094
2095 if (ret)
2096 continue;
2097 if (firmware_stat == FIRMWARE_READY_PCIE) {
2098 ret = 0;
2099 break;
2100 } else {
2101 msleep(100);
2102 ret = -1;
2103 }
2104 }
2105
2106 return ret;
2107}
2108
2109
2110
2111static int
2112mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2113{
2114 u32 winner = 0;
2115 int ret = 0;
2116 struct pcie_service_card *card = adapter->card;
2117 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2118
2119 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2120 ret = -1;
2121 } else if (!winner) {
2122 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2123 adapter->winner = 1;
2124 } else {
2125 mwifiex_dbg(adapter, ERROR,
2126 "PCI-E is not the winner <%#x>", winner);
2127 }
2128
2129 return ret;
2130}
2131
2132
2133
2134
2135static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2136 int msg_id)
2137{
2138 u32 pcie_ireg;
2139 unsigned long flags;
2140 struct pcie_service_card *card = adapter->card;
2141
2142 if (card->msi_enable) {
2143 spin_lock_irqsave(&adapter->int_lock, flags);
2144 adapter->int_status = 1;
2145 spin_unlock_irqrestore(&adapter->int_lock, flags);
2146 return;
2147 }
2148
2149 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2150 return;
2151
2152 if (card->msix_enable && msg_id >= 0) {
2153 pcie_ireg = BIT(msg_id);
2154 } else {
2155 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2156 &pcie_ireg)) {
2157 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2158 return;
2159 }
2160
2161 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2162 return;
2163
2164
2165 mwifiex_pcie_disable_host_int(adapter);
2166
2167
2168 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2169 ~pcie_ireg)) {
2170 mwifiex_dbg(adapter, ERROR,
2171 "Write register failed\n");
2172 return;
2173 }
2174 }
2175
2176 if (!adapter->pps_uapsd_mode &&
2177 adapter->ps_state == PS_STATE_SLEEP &&
2178 mwifiex_pcie_ok_to_access_hw(adapter)) {
2179
2180
2181
2182
2183 adapter->ps_state = PS_STATE_AWAKE;
2184 adapter->pm_wakeup_fw_try = false;
2185 del_timer(&adapter->wakeup_timer);
2186 }
2187
2188 spin_lock_irqsave(&adapter->int_lock, flags);
2189 adapter->int_status |= pcie_ireg;
2190 spin_unlock_irqrestore(&adapter->int_lock, flags);
2191 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2192}
2193
2194
2195
2196
2197
2198
2199
2200static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2201{
2202 struct mwifiex_msix_context *ctx = context;
2203 struct pci_dev *pdev = ctx->dev;
2204 struct pcie_service_card *card;
2205 struct mwifiex_adapter *adapter;
2206
2207 if (!pdev) {
2208 pr_err("info: %s: pdev is NULL\n", __func__);
2209 goto exit;
2210 }
2211
2212 card = pci_get_drvdata(pdev);
2213 if (!card || !card->adapter) {
2214 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2215 card ? card->adapter : NULL);
2216 goto exit;
2217 }
2218 adapter = card->adapter;
2219
2220 if (adapter->surprise_removed)
2221 goto exit;
2222
2223 if (card->msix_enable)
2224 mwifiex_interrupt_status(adapter, ctx->msg_id);
2225 else
2226 mwifiex_interrupt_status(adapter, -1);
2227
2228 mwifiex_queue_main_work(adapter);
2229
2230exit:
2231 return IRQ_HANDLED;
2232}
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter)
2248{
2249 int ret;
2250 u32 pcie_ireg = 0;
2251 unsigned long flags;
2252 struct pcie_service_card *card = adapter->card;
2253
2254 spin_lock_irqsave(&adapter->int_lock, flags);
2255 if (!card->msi_enable) {
2256
2257 pcie_ireg = adapter->int_status;
2258 }
2259 adapter->int_status = 0;
2260 spin_unlock_irqrestore(&adapter->int_lock, flags);
2261
2262 if (card->msi_enable) {
2263 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2264 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2265 &pcie_ireg)) {
2266 mwifiex_dbg(adapter, ERROR,
2267 "Read register failed\n");
2268 return -1;
2269 }
2270
2271 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2272 if (mwifiex_write_reg(adapter,
2273 PCIE_HOST_INT_STATUS,
2274 ~pcie_ireg)) {
2275 mwifiex_dbg(adapter, ERROR,
2276 "Write register failed\n");
2277 return -1;
2278 }
2279 if (!adapter->pps_uapsd_mode &&
2280 adapter->ps_state == PS_STATE_SLEEP) {
2281 adapter->ps_state = PS_STATE_AWAKE;
2282 adapter->pm_wakeup_fw_try = false;
2283 del_timer(&adapter->wakeup_timer);
2284 }
2285 }
2286 }
2287 }
2288 while (pcie_ireg & HOST_INTR_MASK) {
2289 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2290 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
2291 mwifiex_dbg(adapter, INTR,
2292 "info: TX DNLD Done\n");
2293 ret = mwifiex_pcie_send_data_complete(adapter);
2294 if (ret)
2295 return ret;
2296 }
2297 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2298 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
2299 mwifiex_dbg(adapter, INTR,
2300 "info: Rx DATA\n");
2301 ret = mwifiex_pcie_process_recv_data(adapter);
2302 if (ret)
2303 return ret;
2304 }
2305 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2306 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
2307 mwifiex_dbg(adapter, INTR,
2308 "info: Rx EVENT\n");
2309 ret = mwifiex_pcie_process_event_ready(adapter);
2310 if (ret)
2311 return ret;
2312 }
2313
2314 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2315 pcie_ireg &= ~HOST_INTR_CMD_DONE;
2316 if (adapter->cmd_sent) {
2317 mwifiex_dbg(adapter, INTR,
2318 "info: CMD sent Interrupt\n");
2319 adapter->cmd_sent = false;
2320 }
2321
2322 ret = mwifiex_pcie_process_cmd_complete(adapter);
2323 if (ret)
2324 return ret;
2325 }
2326
2327 if (card->msi_enable) {
2328 spin_lock_irqsave(&adapter->int_lock, flags);
2329 adapter->int_status = 0;
2330 spin_unlock_irqrestore(&adapter->int_lock, flags);
2331 }
2332
2333 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2334 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2335 &pcie_ireg)) {
2336 mwifiex_dbg(adapter, ERROR,
2337 "Read register failed\n");
2338 return -1;
2339 }
2340
2341 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2342 if (mwifiex_write_reg(adapter,
2343 PCIE_HOST_INT_STATUS,
2344 ~pcie_ireg)) {
2345 mwifiex_dbg(adapter, ERROR,
2346 "Write register failed\n");
2347 return -1;
2348 }
2349 }
2350
2351 }
2352 if (!card->msi_enable) {
2353 spin_lock_irqsave(&adapter->int_lock, flags);
2354 pcie_ireg |= adapter->int_status;
2355 adapter->int_status = 0;
2356 spin_unlock_irqrestore(&adapter->int_lock, flags);
2357 }
2358 }
2359 mwifiex_dbg(adapter, INTR,
2360 "info: cmd_sent=%d data_sent=%d\n",
2361 adapter->cmd_sent, adapter->data_sent);
2362 if (!card->msi_enable && adapter->ps_state != PS_STATE_SLEEP)
2363 mwifiex_pcie_enable_host_int(adapter);
2364
2365 return 0;
2366}
2367
2368static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter)
2369{
2370 int ret;
2371 u32 pcie_ireg;
2372 unsigned long flags;
2373
2374 spin_lock_irqsave(&adapter->int_lock, flags);
2375
2376 pcie_ireg = adapter->int_status;
2377 adapter->int_status = 0;
2378 spin_unlock_irqrestore(&adapter->int_lock, flags);
2379
2380 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2381 mwifiex_dbg(adapter, INTR,
2382 "info: TX DNLD Done\n");
2383 ret = mwifiex_pcie_send_data_complete(adapter);
2384 if (ret)
2385 return ret;
2386 }
2387 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2388 mwifiex_dbg(adapter, INTR,
2389 "info: Rx DATA\n");
2390 ret = mwifiex_pcie_process_recv_data(adapter);
2391 if (ret)
2392 return ret;
2393 }
2394 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2395 mwifiex_dbg(adapter, INTR,
2396 "info: Rx EVENT\n");
2397 ret = mwifiex_pcie_process_event_ready(adapter);
2398 if (ret)
2399 return ret;
2400 }
2401
2402 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2403 if (adapter->cmd_sent) {
2404 mwifiex_dbg(adapter, INTR,
2405 "info: CMD sent Interrupt\n");
2406 adapter->cmd_sent = false;
2407 }
2408
2409 ret = mwifiex_pcie_process_cmd_complete(adapter);
2410 if (ret)
2411 return ret;
2412 }
2413
2414 mwifiex_dbg(adapter, INTR,
2415 "info: cmd_sent=%d data_sent=%d\n",
2416 adapter->cmd_sent, adapter->data_sent);
2417
2418 return 0;
2419}
2420
2421static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2422{
2423 struct pcie_service_card *card = adapter->card;
2424
2425 if (card->msix_enable)
2426 return mwifiex_process_msix_int(adapter);
2427 else
2428 return mwifiex_process_pcie_int(adapter);
2429}
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2442 struct sk_buff *skb,
2443 struct mwifiex_tx_param *tx_param)
2444{
2445 if (!skb) {
2446 mwifiex_dbg(adapter, ERROR,
2447 "Passed NULL skb to %s\n", __func__);
2448 return -1;
2449 }
2450
2451 if (type == MWIFIEX_TYPE_DATA)
2452 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2453 else if (type == MWIFIEX_TYPE_CMD)
2454 return mwifiex_pcie_send_cmd(adapter, skb);
2455
2456 return 0;
2457}
2458
2459
2460
2461static int
2462mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2463{
2464 char *p = drv_buf;
2465 char buf[256], *ptr;
2466 int i;
2467 u32 value;
2468 struct pcie_service_card *card = adapter->card;
2469 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2470 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2471 PCIE_SCRATCH_13_REG,
2472 PCIE_SCRATCH_14_REG};
2473
2474 if (!p)
2475 return 0;
2476
2477 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2478
2479 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2480 mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2481 return 0;
2482 }
2483
2484 ptr = buf;
2485 mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2486 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2487 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2488 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2489 pcie_scratch_reg[i], value);
2490 }
2491
2492 mwifiex_dbg(adapter, MSG, "%s\n", buf);
2493 p += sprintf(p, "%s\n", buf);
2494
2495 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2496
2497 return p - drv_buf;
2498}
2499
2500
2501static enum rdwr_status
2502mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2503{
2504 int ret, tries;
2505 u8 ctrl_data;
2506 u32 fw_status;
2507 struct pcie_service_card *card = adapter->card;
2508 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2509
2510 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2511 return RDWR_STATUS_FAILURE;
2512
2513 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2514 reg->fw_dump_host_ready);
2515 if (ret) {
2516 mwifiex_dbg(adapter, ERROR,
2517 "PCIE write err\n");
2518 return RDWR_STATUS_FAILURE;
2519 }
2520
2521 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2522 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2523 if (ctrl_data == FW_DUMP_DONE)
2524 return RDWR_STATUS_SUCCESS;
2525 if (doneflag && ctrl_data == doneflag)
2526 return RDWR_STATUS_DONE;
2527 if (ctrl_data != reg->fw_dump_host_ready) {
2528 mwifiex_dbg(adapter, WARN,
2529 "The ctrl reg was changed, re-try again!\n");
2530 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2531 reg->fw_dump_host_ready);
2532 if (ret) {
2533 mwifiex_dbg(adapter, ERROR,
2534 "PCIE write err\n");
2535 return RDWR_STATUS_FAILURE;
2536 }
2537 }
2538 usleep_range(100, 200);
2539 }
2540
2541 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2542 return RDWR_STATUS_FAILURE;
2543}
2544
2545
2546static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2547{
2548 struct pcie_service_card *card = adapter->card;
2549 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2550 unsigned int reg, reg_start, reg_end;
2551 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2552 u8 idx, i, read_reg, doneflag = 0;
2553 enum rdwr_status stat;
2554 u32 memory_size;
2555 int ret;
2556
2557 if (!card->pcie.can_dump_fw)
2558 return;
2559
2560 for (idx = 0; idx < adapter->num_mem_types; idx++) {
2561 struct memory_type_mapping *entry =
2562 &adapter->mem_type_mapping_tbl[idx];
2563
2564 if (entry->mem_ptr) {
2565 vfree(entry->mem_ptr);
2566 entry->mem_ptr = NULL;
2567 }
2568 entry->mem_size = 0;
2569 }
2570
2571 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2572
2573
2574 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2575 if (stat == RDWR_STATUS_FAILURE)
2576 return;
2577
2578 reg = creg->fw_dump_start;
2579 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2580
2581
2582 if (fw_dump_num == 0)
2583 dump_num = 1;
2584 else
2585 dump_num = fw_dump_num;
2586
2587
2588 for (idx = 0; idx < dump_num; idx++) {
2589 struct memory_type_mapping *entry =
2590 &adapter->mem_type_mapping_tbl[idx];
2591 memory_size = 0;
2592 if (fw_dump_num != 0) {
2593 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2594 if (stat == RDWR_STATUS_FAILURE)
2595 return;
2596
2597 reg = creg->fw_dump_start;
2598 for (i = 0; i < 4; i++) {
2599 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2600 memory_size |= (read_reg << (i * 8));
2601 reg++;
2602 }
2603 } else {
2604 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2605 }
2606
2607 if (memory_size == 0) {
2608 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2609 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2610 creg->fw_dump_read_done);
2611 if (ret) {
2612 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2613 return;
2614 }
2615 break;
2616 }
2617
2618 mwifiex_dbg(adapter, DUMP,
2619 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2620 entry->mem_ptr = vmalloc(memory_size + 1);
2621 entry->mem_size = memory_size;
2622 if (!entry->mem_ptr) {
2623 mwifiex_dbg(adapter, ERROR,
2624 "Vmalloc %s failed\n", entry->mem_name);
2625 return;
2626 }
2627 dbg_ptr = entry->mem_ptr;
2628 end_ptr = dbg_ptr + memory_size;
2629
2630 doneflag = entry->done_flag;
2631 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2632 entry->mem_name);
2633
2634 do {
2635 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2636 if (RDWR_STATUS_FAILURE == stat)
2637 return;
2638
2639 reg_start = creg->fw_dump_start;
2640 reg_end = creg->fw_dump_end;
2641 for (reg = reg_start; reg <= reg_end; reg++) {
2642 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2643 if (dbg_ptr < end_ptr) {
2644 dbg_ptr++;
2645 continue;
2646 }
2647 mwifiex_dbg(adapter, ERROR,
2648 "pre-allocated buf not enough\n");
2649 tmp_ptr =
2650 vzalloc(memory_size + MWIFIEX_SIZE_4K);
2651 if (!tmp_ptr)
2652 return;
2653 memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2654 vfree(entry->mem_ptr);
2655 entry->mem_ptr = tmp_ptr;
2656 tmp_ptr = NULL;
2657 dbg_ptr = entry->mem_ptr + memory_size;
2658 memory_size += MWIFIEX_SIZE_4K;
2659 end_ptr = entry->mem_ptr + memory_size;
2660 }
2661
2662 if (stat != RDWR_STATUS_DONE)
2663 continue;
2664
2665 mwifiex_dbg(adapter, DUMP,
2666 "%s done: size=0x%tx\n",
2667 entry->mem_name, dbg_ptr - entry->mem_ptr);
2668 break;
2669 } while (true);
2670 }
2671 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2672}
2673
2674static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2675{
2676 mwifiex_drv_info_dump(adapter);
2677 mwifiex_pcie_fw_dump(adapter);
2678 mwifiex_upload_device_dump(adapter);
2679}
2680
2681static unsigned long iface_work_flags;
2682static struct mwifiex_adapter *save_adapter;
2683static void mwifiex_pcie_work(struct work_struct *work)
2684{
2685 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2686 &iface_work_flags))
2687 mwifiex_pcie_device_dump_work(save_adapter);
2688}
2689
2690static DECLARE_WORK(pcie_work, mwifiex_pcie_work);
2691
2692static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2693{
2694 save_adapter = adapter;
2695 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags))
2696 return;
2697
2698 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags);
2699
2700 schedule_work(&pcie_work);
2701}
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2714{
2715 struct pcie_service_card *card = adapter->card;
2716 int ret;
2717 struct pci_dev *pdev = card->dev;
2718 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2719
2720 pci_set_drvdata(pdev, card);
2721
2722 ret = pci_enable_device(pdev);
2723 if (ret)
2724 goto err_enable_dev;
2725
2726 pci_set_master(pdev);
2727
2728 pr_notice("try set_consistent_dma_mask(32)\n");
2729 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2730 if (ret) {
2731 pr_err("set_dma_mask(32) failed\n");
2732 goto err_set_dma_mask;
2733 }
2734
2735 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2736 if (ret) {
2737 pr_err("set_consistent_dma_mask(64) failed\n");
2738 goto err_set_dma_mask;
2739 }
2740
2741 ret = pci_request_region(pdev, 0, DRV_NAME);
2742 if (ret) {
2743 pr_err("req_reg(0) error\n");
2744 goto err_req_region0;
2745 }
2746 card->pci_mmap = pci_iomap(pdev, 0, 0);
2747 if (!card->pci_mmap) {
2748 pr_err("iomap(0) error\n");
2749 ret = -EIO;
2750 goto err_iomap0;
2751 }
2752 ret = pci_request_region(pdev, 2, DRV_NAME);
2753 if (ret) {
2754 pr_err("req_reg(2) error\n");
2755 goto err_req_region2;
2756 }
2757 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2758 if (!card->pci_mmap1) {
2759 pr_err("iomap(2) error\n");
2760 ret = -EIO;
2761 goto err_iomap2;
2762 }
2763
2764 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2765 card->pci_mmap, card->pci_mmap1);
2766
2767 card->cmdrsp_buf = NULL;
2768 ret = mwifiex_pcie_create_txbd_ring(adapter);
2769 if (ret)
2770 goto err_cre_txbd;
2771 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2772 if (ret)
2773 goto err_cre_rxbd;
2774 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2775 if (ret)
2776 goto err_cre_evtbd;
2777 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2778 if (ret)
2779 goto err_alloc_cmdbuf;
2780 if (reg->sleep_cookie) {
2781 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2782 if (ret)
2783 goto err_alloc_cookie;
2784 } else {
2785 card->sleep_cookie_vbase = NULL;
2786 }
2787 return ret;
2788
2789err_alloc_cookie:
2790 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2791err_alloc_cmdbuf:
2792 mwifiex_pcie_delete_evtbd_ring(adapter);
2793err_cre_evtbd:
2794 mwifiex_pcie_delete_rxbd_ring(adapter);
2795err_cre_rxbd:
2796 mwifiex_pcie_delete_txbd_ring(adapter);
2797err_cre_txbd:
2798 pci_iounmap(pdev, card->pci_mmap1);
2799err_iomap2:
2800 pci_release_region(pdev, 2);
2801err_req_region2:
2802 pci_iounmap(pdev, card->pci_mmap);
2803err_iomap0:
2804 pci_release_region(pdev, 0);
2805err_req_region0:
2806err_set_dma_mask:
2807 pci_disable_device(pdev);
2808err_enable_dev:
2809 pci_set_drvdata(pdev, NULL);
2810 return ret;
2811}
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2824{
2825 struct pcie_service_card *card = adapter->card;
2826 struct pci_dev *pdev = card->dev;
2827 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2828
2829 if (user_rmmod) {
2830 mwifiex_dbg(adapter, INFO,
2831 "Clearing driver ready signature\n");
2832 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
2833 mwifiex_dbg(adapter, ERROR,
2834 "Failed to write driver not-ready signature\n");
2835 }
2836
2837 if (pdev) {
2838 pci_iounmap(pdev, card->pci_mmap);
2839 pci_iounmap(pdev, card->pci_mmap1);
2840 pci_disable_device(pdev);
2841 pci_release_region(pdev, 2);
2842 pci_release_region(pdev, 0);
2843 pci_set_drvdata(pdev, NULL);
2844 }
2845 kfree(card);
2846}
2847
2848static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
2849{
2850 int ret, i, j;
2851 struct pcie_service_card *card = adapter->card;
2852 struct pci_dev *pdev = card->dev;
2853
2854 if (card->pcie.reg->msix_support) {
2855 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
2856 card->msix_entries[i].entry = i;
2857 ret = pci_enable_msix_exact(pdev, card->msix_entries,
2858 MWIFIEX_NUM_MSIX_VECTORS);
2859 if (!ret) {
2860 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
2861 card->msix_ctx[i].dev = pdev;
2862 card->msix_ctx[i].msg_id = i;
2863
2864 ret = request_irq(card->msix_entries[i].vector,
2865 mwifiex_pcie_interrupt, 0,
2866 "MWIFIEX_PCIE_MSIX",
2867 &card->msix_ctx[i]);
2868 if (ret)
2869 break;
2870 }
2871
2872 if (ret) {
2873 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
2874 ret);
2875 for (j = 0; j < i; j++)
2876 free_irq(card->msix_entries[j].vector,
2877 &card->msix_ctx[i]);
2878 pci_disable_msix(pdev);
2879 } else {
2880 mwifiex_dbg(adapter, MSG, "MSIx enabled!");
2881 card->msix_enable = 1;
2882 return 0;
2883 }
2884 }
2885 }
2886
2887 if (pci_enable_msi(pdev) != 0)
2888 pci_disable_msi(pdev);
2889 else
2890 card->msi_enable = 1;
2891
2892 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
2893
2894 card->share_irq_ctx.dev = pdev;
2895 card->share_irq_ctx.msg_id = -1;
2896 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2897 "MRVL_PCIE", &card->share_irq_ctx);
2898 if (ret) {
2899 pr_err("request_irq failed: ret=%d\n", ret);
2900 return -1;
2901 }
2902
2903 return 0;
2904}
2905
2906
2907
2908
2909
2910
2911static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
2912{
2913 int revision_id = 0;
2914 int version, magic;
2915 struct pcie_service_card *card = adapter->card;
2916
2917 switch (card->dev->device) {
2918 case PCIE_DEVICE_ID_MARVELL_88W8766P:
2919 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
2920 break;
2921 case PCIE_DEVICE_ID_MARVELL_88W8897:
2922 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
2923 mwifiex_read_reg(adapter, 0x0c58, &revision_id);
2924 revision_id &= 0xff00;
2925 switch (revision_id) {
2926 case PCIE8897_A0:
2927 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
2928 break;
2929 case PCIE8897_B0:
2930 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
2931 break;
2932 default:
2933 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
2934
2935 break;
2936 }
2937 break;
2938 case PCIE_DEVICE_ID_MARVELL_88W8997:
2939 mwifiex_read_reg(adapter, 0x8, &revision_id);
2940 mwifiex_read_reg(adapter, 0x0cd0, &version);
2941 mwifiex_read_reg(adapter, 0x0cd4, &magic);
2942 revision_id &= 0xff;
2943 version &= 0x7;
2944 magic &= 0xff;
2945 if (revision_id == PCIE8997_A1 &&
2946 magic == CHIP_MAGIC_VALUE &&
2947 version == CHIP_VER_PCIEUART)
2948 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
2949 else
2950 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
2951 break;
2952 default:
2953 break;
2954 }
2955}
2956
2957
2958
2959
2960
2961
2962static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2963{
2964 struct pcie_service_card *card = adapter->card;
2965 struct pci_dev *pdev = card->dev;
2966
2967
2968 card->adapter = adapter;
2969 adapter->dev = &pdev->dev;
2970
2971 if (mwifiex_pcie_request_irq(adapter))
2972 return -1;
2973
2974 adapter->tx_buf_size = card->pcie.tx_buf_size;
2975 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
2976 adapter->num_mem_types = card->pcie.num_mem_types;
2977 adapter->ext_scan = card->pcie.can_ext_scan;
2978 mwifiex_pcie_get_fw_name(adapter);
2979
2980 return 0;
2981}
2982
2983
2984
2985
2986
2987
2988
2989static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2990{
2991 struct pcie_service_card *card = adapter->card;
2992 struct pci_dev *pdev;
2993 int i;
2994
2995 if (card) {
2996 pdev = card->dev;
2997 if (card->msix_enable) {
2998 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
2999 synchronize_irq(card->msix_entries[i].vector);
3000
3001 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3002 free_irq(card->msix_entries[i].vector,
3003 &card->msix_ctx[i]);
3004
3005 card->msix_enable = 0;
3006 pci_disable_msix(pdev);
3007 } else {
3008 mwifiex_dbg(adapter, INFO,
3009 "%s(): calling free_irq()\n", __func__);
3010 free_irq(card->dev->irq, &card->share_irq_ctx);
3011
3012 if (card->msi_enable)
3013 pci_disable_msi(pdev);
3014 }
3015 }
3016}
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3029{
3030 struct pcie_service_card *card = adapter->card;
3031 int ret;
3032 struct pci_dev *pdev = card->dev;
3033 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3034
3035 card->cmdrsp_buf = NULL;
3036 ret = mwifiex_pcie_create_txbd_ring(adapter);
3037 if (ret) {
3038 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
3039 goto err_cre_txbd;
3040 }
3041
3042 ret = mwifiex_pcie_create_rxbd_ring(adapter);
3043 if (ret) {
3044 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
3045 goto err_cre_rxbd;
3046 }
3047
3048 ret = mwifiex_pcie_create_evtbd_ring(adapter);
3049 if (ret) {
3050 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
3051 goto err_cre_evtbd;
3052 }
3053
3054 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
3055 if (ret) {
3056 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
3057 goto err_alloc_cmdbuf;
3058 }
3059
3060 if (reg->sleep_cookie) {
3061 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
3062 if (ret) {
3063 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
3064 goto err_alloc_cookie;
3065 }
3066 } else {
3067 card->sleep_cookie_vbase = NULL;
3068 }
3069 return;
3070
3071err_alloc_cookie:
3072 mwifiex_pcie_delete_cmdrsp_buf(adapter);
3073err_alloc_cmdbuf:
3074 mwifiex_pcie_delete_evtbd_ring(adapter);
3075err_cre_evtbd:
3076 mwifiex_pcie_delete_rxbd_ring(adapter);
3077err_cre_rxbd:
3078 mwifiex_pcie_delete_txbd_ring(adapter);
3079err_cre_txbd:
3080 pci_iounmap(pdev, card->pci_mmap1);
3081}
3082
3083
3084
3085
3086
3087static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3088{
3089 struct pcie_service_card *card = adapter->card;
3090 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3091
3092 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3093 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3094
3095 adapter->seq_num = 0;
3096 adapter->tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
3097
3098 if (card) {
3099 if (reg->sleep_cookie)
3100 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
3101
3102 mwifiex_pcie_delete_cmdrsp_buf(adapter);
3103 mwifiex_pcie_delete_evtbd_ring(adapter);
3104 mwifiex_pcie_delete_rxbd_ring(adapter);
3105 mwifiex_pcie_delete_txbd_ring(adapter);
3106 card->cmdrsp_buf = NULL;
3107 }
3108
3109 return;
3110}
3111
3112static struct mwifiex_if_ops pcie_ops = {
3113 .init_if = mwifiex_pcie_init,
3114 .cleanup_if = mwifiex_pcie_cleanup,
3115 .check_fw_status = mwifiex_check_fw_status,
3116 .check_winner_status = mwifiex_check_winner_status,
3117 .prog_fw = mwifiex_prog_fw_w_helper,
3118 .register_dev = mwifiex_register_dev,
3119 .unregister_dev = mwifiex_unregister_dev,
3120 .enable_int = mwifiex_pcie_enable_host_int,
3121 .disable_int = mwifiex_pcie_disable_host_int_noerr,
3122 .process_int_status = mwifiex_process_int_status,
3123 .host_to_card = mwifiex_pcie_host_to_card,
3124 .wakeup = mwifiex_pm_wakeup_card,
3125 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
3126
3127
3128 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
3129 .event_complete = mwifiex_pcie_event_complete,
3130 .update_mp_end_port = NULL,
3131 .cleanup_mpa_buf = NULL,
3132 .init_fw_port = mwifiex_pcie_init_fw_port,
3133 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
3134 .reg_dump = mwifiex_pcie_reg_dump,
3135 .device_dump = mwifiex_pcie_device_dump,
3136 .down_dev = mwifiex_pcie_down_dev,
3137 .up_dev = mwifiex_pcie_up_dev,
3138};
3139
3140
3141
3142
3143
3144
3145
3146static int mwifiex_pcie_init_module(void)
3147{
3148 int ret;
3149
3150 pr_debug("Marvell PCIe Driver\n");
3151
3152 sema_init(&add_remove_card_sem, 1);
3153
3154
3155 user_rmmod = 0;
3156
3157 ret = pci_register_driver(&mwifiex_pcie);
3158 if (ret)
3159 pr_err("Driver register failed!\n");
3160 else
3161 pr_debug("info: Driver registered successfully!\n");
3162
3163 return ret;
3164}
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175static void mwifiex_pcie_cleanup_module(void)
3176{
3177 if (!down_interruptible(&add_remove_card_sem))
3178 up(&add_remove_card_sem);
3179
3180
3181 user_rmmod = 1;
3182
3183 cancel_work_sync(&pcie_work);
3184 pci_unregister_driver(&mwifiex_pcie);
3185}
3186
3187module_init(mwifiex_pcie_init_module);
3188module_exit(mwifiex_pcie_cleanup_module);
3189
3190MODULE_AUTHOR("Marvell International Ltd.");
3191MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3192MODULE_VERSION(PCIE_VERSION);
3193MODULE_LICENSE("GPL v2");
3194