LXR linux/drivers/pcmcia/soc

   1/*
   2 * linux/drivers/pcmcia/soc_common.h
   3 *
   4 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
   5 *
   6 * This file contains definitions for the PCMCIA support code common to
   7 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
   8 */
   9#ifndef _ASM_ARCH_PCMCIA
  10#define _ASM_ARCH_PCMCIA
  11
  12/* include the world */
  13#include <linux/clk.h>
  14#include <linux/cpufreq.h>
  15#include <pcmcia/ss.h>
  16#include <pcmcia/cistpl.h>
  17
  18
  19struct device;
  20struct gpio_desc;
  21struct pcmcia_low_level;
  22struct regulator;
  23
  24struct soc_pcmcia_regulator {
  25        struct regulator        *reg;
  26        bool                    on;
  27};
  28
  29/*
  30 * This structure encapsulates per-socket state which we might need to
  31 * use when responding to a Card Services query of some kind.
  32 */
  33struct soc_pcmcia_socket {
  34        struct pcmcia_socket    socket;
  35
  36        /*
  37         * Info from low level handler
  38         */
  39        unsigned int            nr;
  40        struct clk              *clk;
  41
  42        /*
  43         * Core PCMCIA state
  44         */
  45        const struct pcmcia_low_level *ops;
  46
  47        unsigned int            status;
  48        socket_state_t          cs_state;
  49
  50        unsigned short          spd_io[MAX_IO_WIN];
  51        unsigned short          spd_mem[MAX_WIN];
  52        unsigned short          spd_attr[MAX_WIN];
  53
  54        struct resource         res_skt;
  55        struct resource         res_io;
  56        struct resource         res_mem;
  57        struct resource         res_attr;
  58        void __iomem            *virt_io;
  59
  60        struct {
  61                int             gpio;
  62                struct gpio_desc *desc;
  63                unsigned int    irq;
  64                const char      *name;
  65        } stat[6];
  66#define SOC_STAT_CD             0       /* Card detect */
  67#define SOC_STAT_BVD1           1       /* BATDEAD / IOSTSCHG */
  68#define SOC_STAT_BVD2           2       /* BATWARN / IOSPKR */
  69#define SOC_STAT_RDY            3       /* Ready / Interrupt */
  70#define SOC_STAT_VS1            4       /* Voltage sense 1 */
  71#define SOC_STAT_VS2            5       /* Voltage sense 2 */
  72
  73        struct gpio_desc        *gpio_reset;
  74        struct gpio_desc        *gpio_bus_enable;
  75        struct soc_pcmcia_regulator vcc;
  76        struct soc_pcmcia_regulator vpp;
  77
  78        unsigned int            irq_state;
  79
  80#ifdef CONFIG_CPU_FREQ
  81        struct notifier_block   cpufreq_nb;
  82#endif
  83        struct timer_list       poll_timer;
  84        struct list_head        node;
  85        void *driver_data;
  86};
  87
  88struct skt_dev_info {
  89        int nskt;
  90        struct soc_pcmcia_socket skt[0];
  91};
  92
  93struct pcmcia_state {
  94  unsigned detect: 1,
  95            ready: 1,
  96             bvd1: 1,
  97             bvd2: 1,
  98           wrprot: 1,
  99            vs_3v: 1,
 100            vs_Xv: 1;
 101};
 102
 103struct pcmcia_low_level {
 104        struct module *owner;
 105
 106        /* first socket in system */
 107        int first;
 108        /* nr of sockets */
 109        int nr;
 110
 111        int (*hw_init)(struct soc_pcmcia_socket *);
 112        void (*hw_shutdown)(struct soc_pcmcia_socket *);
 113
 114        void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
 115        int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
 116
 117        /*
 118         * Enable card status IRQs on (re-)initialisation.  This can
 119         * be called at initialisation, power management event, or
 120         * pcmcia event.
 121         */
 122        void (*socket_init)(struct soc_pcmcia_socket *);
 123
 124        /*
 125         * Disable card status IRQs and PCMCIA bus on suspend.
 126         */
 127        void (*socket_suspend)(struct soc_pcmcia_socket *);
 128
 129        /*
 130         * Hardware specific timing routines.
 131         * If provided, the get_timing routine overrides the SOC default.
 132         */
 133        unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
 134        int (*set_timing)(struct soc_pcmcia_socket *);
 135        int (*show_timing)(struct soc_pcmcia_socket *, char *);
 136
 137#ifdef CONFIG_CPU_FREQ
 138        /*
 139         * CPUFREQ support.
 140         */
 141        int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
 142#endif
 143};
 144
 145
 146struct soc_pcmcia_timing {
 147        unsigned short io;
 148        unsigned short mem;
 149        unsigned short attr;
 150};
 151
 152extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
 153
 154void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
 155        const struct pcmcia_low_level *ops, struct device *dev);
 156void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
 157int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
 158int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket *skt);
 159
 160void soc_common_cf_socket_state(struct soc_pcmcia_socket *skt,
 161        struct pcmcia_state *state);
 162
 163int soc_pcmcia_regulator_set(struct soc_pcmcia_socket *skt,
 164        struct soc_pcmcia_regulator *r, int v);
 165
 166#ifdef CONFIG_PCMCIA_DEBUG
 167
 168extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
 169                             int lvl, const char *fmt, ...);
 170
 171#define debug(skt, lvl, fmt, arg...) \
 172        soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
 173
 174#else
 175#define debug(skt, lvl, fmt, arg...) do { } while (0)
 176#endif
 177
 178
 179/*
 180 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
 181 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
 182 * a minimum value of 165ns, as well. Section 4.7.2 (describing
 183 * common and attribute memory write timing) says that twWE has a
 184 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
 185 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
 186 * operation, also section 4.7.4). Section 4.7.3 says that taOE
 187 * has a maximum value of 150ns for a 300ns cycle time (for 5V
 188 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
 189 *
 190 * When configuring memory maps, Card Services appears to adopt the policy
 191 * that a memory access time of "0" means "use the default." The default
 192 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
 193 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
 194 * memory command width time is 300ns.
 195 */
 196#define SOC_PCMCIA_IO_ACCESS            (165)
 197#define SOC_PCMCIA_5V_MEM_ACCESS        (150)
 198#define SOC_PCMCIA_3V_MEM_ACCESS        (300)
 199#define SOC_PCMCIA_ATTR_MEM_ACCESS      (300)
 200
 201/*
 202 * The socket driver actually works nicely in interrupt-driven form,
 203 * so the (relatively infrequent) polling is "just to be sure."
 204 */
 205#define SOC_PCMCIA_POLL_PERIOD    (2*HZ)
 206
 207
 208/* I/O pins replacing memory pins
 209 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
 210 *
 211 * These signals change meaning when going from memory-only to
 212 * memory-or-I/O interface:
 213 */
 214#define iostschg bvd1
 215#define iospkr   bvd2
 216
 217#endif
 218