1
2
3
4
5
6
7
8
9
10
11
12
13
14
15#ifndef __DRIVERS_THERMAL_TEGRA_SOCTHERM_H
16#define __DRIVERS_THERMAL_TEGRA_SOCTHERM_H
17
18#define THERMCTL_LEVEL0_GROUP_CPU 0x0
19#define THERMCTL_LEVEL0_GROUP_GPU 0x4
20#define THERMCTL_LEVEL0_GROUP_MEM 0x8
21#define THERMCTL_LEVEL0_GROUP_TSENSE 0xc
22
23#define SENSOR_CONFIG2 8
24#define SENSOR_CONFIG2_THERMA_MASK (0xffff << 16)
25#define SENSOR_CONFIG2_THERMA_SHIFT 16
26#define SENSOR_CONFIG2_THERMB_MASK 0xffff
27#define SENSOR_CONFIG2_THERMB_SHIFT 0
28
29#define THERMCTL_THERMTRIP_CTL 0x80
30
31
32#define SENSOR_PDIV 0x1c0
33#define SENSOR_PDIV_CPU_MASK (0xf << 12)
34#define SENSOR_PDIV_GPU_MASK (0xf << 8)
35#define SENSOR_PDIV_MEM_MASK (0xf << 4)
36#define SENSOR_PDIV_PLLX_MASK (0xf << 0)
37
38#define SENSOR_HOTSPOT_OFF 0x1c4
39#define SENSOR_HOTSPOT_CPU_MASK (0xff << 16)
40#define SENSOR_HOTSPOT_GPU_MASK (0xff << 8)
41#define SENSOR_HOTSPOT_MEM_MASK (0xff << 0)
42
43#define SENSOR_TEMP1 0x1c8
44#define SENSOR_TEMP1_CPU_TEMP_MASK (0xffff << 16)
45#define SENSOR_TEMP1_GPU_TEMP_MASK 0xffff
46#define SENSOR_TEMP2 0x1cc
47#define SENSOR_TEMP2_MEM_TEMP_MASK (0xffff << 16)
48#define SENSOR_TEMP2_PLLX_TEMP_MASK 0xffff
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63struct tegra_tsensor_group {
64 const char *name;
65 u8 id;
66 u16 sensor_temp_offset;
67 u32 sensor_temp_mask;
68 u32 pdiv, pdiv_ate, pdiv_mask;
69 u32 pllx_hotspot_diff, pllx_hotspot_mask;
70 u32 thermtrip_enable_mask;
71 u32 thermtrip_any_en_mask;
72 u32 thermtrip_threshold_mask;
73 u16 thermctl_lvl0_offset;
74 u32 thermctl_lvl0_up_thresh_mask;
75 u32 thermctl_lvl0_dn_thresh_mask;
76};
77
78struct tegra_tsensor_configuration {
79 u32 tall, tiddq_en, ten_count, pdiv, pdiv_ate, tsample, tsample_ate;
80};
81
82struct tegra_tsensor {
83 const char *name;
84 const u32 base;
85 const struct tegra_tsensor_configuration *config;
86 const u32 calib_fuse_offset;
87
88
89
90
91 const s32 fuse_corr_alpha, fuse_corr_beta;
92 const struct tegra_tsensor_group *group;
93};
94
95struct tegra_soctherm_fuse {
96 u32 fuse_base_cp_mask, fuse_base_cp_shift;
97 u32 fuse_base_ft_mask, fuse_base_ft_shift;
98 u32 fuse_shift_ft_mask, fuse_shift_ft_shift;
99 u32 fuse_spare_realignment;
100};
101
102struct tsensor_shared_calib {
103 u32 base_cp, base_ft;
104 u32 actual_temp_cp, actual_temp_ft;
105};
106
107struct tegra_soctherm_soc {
108 const struct tegra_tsensor *tsensors;
109 const unsigned int num_tsensors;
110 const struct tegra_tsensor_group **ttgs;
111 const unsigned int num_ttgs;
112 const struct tegra_soctherm_fuse *tfuse;
113 const int thresh_grain;
114 const unsigned int bptt;
115 const bool use_ccroc;
116};
117
118int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse,
119 struct tsensor_shared_calib *shared);
120int tegra_calc_tsensor_calib(const struct tegra_tsensor *sensor,
121 const struct tsensor_shared_calib *shared,
122 u32 *calib);
123
124#ifdef CONFIG_ARCH_TEGRA_124_SOC
125extern const struct tegra_soctherm_soc tegra124_soctherm;
126#endif
127
128#ifdef CONFIG_ARCH_TEGRA_132_SOC
129extern const struct tegra_soctherm_soc tegra132_soctherm;
130#endif
131
132#ifdef CONFIG_ARCH_TEGRA_210_SOC
133extern const struct tegra_soctherm_soc tegra210_soctherm;
134#endif
135
136#endif
137
138